rtl8188e_hal_init.rar

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  • 2015-04-29 12:17
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disable initial offload for Linux v2.13.6.
rtl8188e_hal_init.rar
  • rtl8188e_hal_init.c
    22.3KB
内容介绍
/****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * ******************************************************************************/ #define _HAL_INIT_C_ #include <linux/firmware.h> #include <linux/vmalloc.h> #include <drv_types.h> #include <rtw_efuse.h> #include <phy.h> #include <rtl8188e_hal.h> #include <rtw_iol.h> void iol_mode_enable(struct adapter *padapter, u8 enable) { u8 reg_0xf0 = 0; if (enable) { /* Enable initial offload */ reg_0xf0 = usb_read8(padapter, REG_SYS_CFG); usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN); if (!padapter->bFWReady) { DBG_88E("bFWReady == false call reset 8051...\n"); _8051Reset88E(padapter); } } else { /* disable initial offload */ reg_0xf0 = usb_read8(padapter, REG_SYS_CFG); usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); } } s32 iol_execute(struct adapter *padapter, u8 control) { s32 status = _FAIL; u8 reg_0x88 = 0; u32 start = 0, passing_time = 0; control = control&0x0f; reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0); usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control); start = jiffies; while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control && (passing_time = rtw_get_passing_time_ms(start)) < 1000) { ; } reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0); status = (reg_0x88 & control) ? _FAIL : _SUCCESS; if (reg_0x88 & control<<4) status = _FAIL; return status; } static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) { s32 rst = _SUCCESS; iol_mode_enable(padapter, 1); usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); rst = iol_execute(padapter, CMD_INIT_LLT); iol_mode_enable(padapter, 0); return rst; } s32 rtl8188e_iol_efuse_patch(struct adapter *padapter) { s32 result = _SUCCESS; DBG_88E("==> %s\n", __func__); if (rtw_IOL_applied(padapter)) { iol_mode_enable(padapter, 1); result = iol_execute(padapter, CMD_READ_EFUSE_MAP); if (result == _SUCCESS) result = iol_execute(padapter, CMD_EFUSE_PATCH); iol_mode_enable(padapter, 0); } return result; } #define MAX_REG_BOLCK_SIZE 196 void _8051Reset88E(struct adapter *padapter) { u8 u1bTmp; u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1); usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n"); } void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) { struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); /* Init Fw LPS related. */ padapter->pwrctrlpriv.bFwCurrentInPSMode = false; /* Init H2C counter. by tynli. 2009.12.09. */ pHalData->LastHMEBoxNum = 0; } static void rtl8188e_free_hal_data(struct adapter *padapter) { kfree(padapter->HalData); padapter->HalData = NULL; } static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter) { u32 value32; struct HAL_VERSION ChipVersion; struct hal_data_8188e *pHalData; pHalData = GET_HAL_DATA(padapter); value32 = usb_read32(padapter, REG_SYS_CFG); ChipVersion.ICType = CHIP_8188E; ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); ChipVersion.RFType = RF_TYPE_1T1R; ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ /* For regulator mode. by tynli. 2011.01.14 */ pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); ChipVersion.ROMVer = 0; /* ROM code version. */ dump_chip_info(ChipVersion); pHalData->VersionID = ChipVersion; if (IS_1T2R(ChipVersion)) { pHalData->rf_type = RF_1T2R; pHalData->NumTotalRFPath = 2; } else if (IS_2T2R(ChipVersion)) { pHalData->rf_type = RF_2T2R; pHalData->NumTotalRFPath = 2; } else{ pHalData->rf_type = RF_1T1R; pHalData->NumTotalRFPath = 1; } MSG_88E("RF_Type is %x!!\n", pHalData->rf_type); return ChipVersion; } static void rtl8188e_read_chip_version(struct adapter *padapter) { ReadChipVersion8188E(padapter); } static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); struct odm_dm_struct *podmpriv = &pHalData->odmpriv; switch (eVariable) { case HAL_ODM_STA_INFO: { struct sta_info *psta = pValue1; if (bSet) { DBG_88E("### Set STA_(%d) info\n", psta->mac_id); ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta); ODM_RAInfo_Init(podmpriv, psta->mac_id); } else { DBG_88E("### Clean STA_(%d) info\n", psta->mac_id); ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL); } } break; case HAL_ODM_P2P_STATE: ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet); break; case HAL_ODM_WIFI_DISPLAY_STATE: ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet); break; default: break; } } static void hal_notch_filter_8188e(struct adapter *adapter, bool enable) { if (enable) { DBG_88E("Enable notch filter\n"); usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT1); } else { DBG_88E("Disable notch filter\n"); usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); } } void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) { pHalFunc->free_hal_data = &rtl8188e_free_hal_data; pHalFunc->dm_init = &rtl8188e_init_dm_priv; pHalFunc->read_chip_version = &rtl8188e_read_chip_version; pHalFunc->set_bwmode_handler = &phy_set_bw_mode; pHalFunc->set_channel_handler = &phy_sw_chnl; pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid; pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E; pHalFunc->AntDivCompareHandler = &AntDivCompare8188E; pHalFunc->read_rfreg = &phy_query_rf_reg; pHalFunc->write_rfreg = &phy_set_rf_reg; pHalFunc->sreset_init_value = &sreset_init_value; pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar; pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; } u8 GetEEPROMSize8188E(struct adapter *padapter) { u8 size = 0; u32 cr; cr = usb_read16(padapter, REG_9346CR); /* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */ size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; MSG_88E("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46"); return size; } /* */ /* */ /* LLT R/W/Init function */ /* */ /* */ static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data) { s32 status = _SUCCESS; s32 count = 0; u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); u16 LLTReg = REG_LLT_INIT; usb_write32(padapter, LLTReg, value); /* polling */ do { value = usb_read32(padapter, LLTReg); if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) break; if (count > POLLING_LLT_THRESHOLD) { RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address)); status = _FAIL; break; } } while (count++); return status; } s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) { s32 status = _FAIL; u32 i; u32 Las
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