omap-l138.zip_omap_DSP编程_嵌入式/单片机/硬件编程下载-pudn.com

<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/bg1.jpg"><div class="c x1 y1 w2 h2"><div class="t m0 x2 h3 y2 ff1 fs0 fc0 sc0 ls0 ws0">Product</div><div class="t m0 x2 h3 y3 ff1 fs0 fc0 sc0 ls0 ws0">Folder</div></div><div class="c x3 y1 w3 h4"><div class="t m0 x4 h5 y4 ff2 fs0 fc0 sc0 ls0 ws0">Sample &</div><div class="t m0 x4 h5 y5 ff2 fs0 fc0 sc0 ls0 ws0">Buy</div></div><div class="c x5 y1 w4 h2"><div class="t m0 x6 h3 y6 ff3 fs0 fc0 sc0 ls0 ws0">T<span class="_ _0"></span>echnical</div><div class="t m0 x6 h3 y7 ff3 fs0 fc0 sc0 ls0 ws0">Documents</div></div><div class="c x7 y1 w2 h6"><div class="t m0 x8 h5 y8 ff4 fs0 fc0 sc0 ls0 ws0">T<span class="_ _0"></span>ools &</div><div class="t m0 x8 h5 y9 ff4 fs0 fc0 sc0 ls0 ws0">Software</div></div><div class="c x9 y1 w5 h4"><div class="t m0 x4 h5 ya ff5 fs0 fc0 sc0 ls0 ws0">Support &</div><div class="t m0 x4 h5 yb ff5 fs0 fc0 sc0 ls0 ws0">Community</div></div><div class="t m1 xa h7 yc ff6 fs1 fc0 sc0 ls0 ws0">OMAP-L138</div><div class="t m1 xb h8 yd ff7 fs2 fc0 sc0 ls0 ws0">SPRS586I<span class="_ _1"> </span>–<span class="_ _2"></span>JUNE<span class="_ _3"> </span>2009<span class="_ _2"></span>–<span class="_ _2"></span>REVISED<span class="_ _3"> </span>SEPTEMBER<span class="_ _3"> </span>2014</div><div class="t m2 xc h9 ye ff6 fs3 fc0 sc0 ls0 ws0">OMAP-L138<span class="_ _4"> </span>C6000™<span class="_ _4"> </span>DSP+<span class="_ _4"> </span>ARM</div><div class="t m3 xd ha yf ff6 fs4 fc0 sc0 ls0 ws0">®</div><div class="t m2 xe h9 ye ff6 fs3 fc0 sc0 ls0 ws0">Processor</div><div class="t m1 xf ha y10 ff6 fs4 fc0 sc0 ls0 ws0">1<span class="_ _5"> </span>OMAP-L138<span class="_ _6"> </span>C6000<span class="_ _6"> </span>DSP+ARM<span class="_ _6"> </span>Processor</div><div class="t m1 xf hb y11 ff6 fs5 fc0 sc0 ls0 ws0">1.1<span class="_ _7"> </span>Features</div><div class="t m1 xf hc y12 ff7 fs6 fc1 sc0 ls0 ws0">1</div><div class="t m1 x10 hd y13 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Supports<span class="_ _9"> </span>32-Bit<span class="_ _9"> </span>Integer,<span class="_ _9"> </span>SP<span class="_ _9"> </span>(IEEE<span class="_ _9"> </span>Single</div><div class="t m1 xf hd y14 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Dual-Core<span class="_ _9"> </span>SoC</div><div class="t m1 x11 hd y15 ff7 fs1 fc0 sc0 ls0 ws0">Precision/32-Bit)<span class="_ _9"> </span>and<span class="_ _9"> </span>DP<span class="_ _9"> </span>(IEEE<span class="_ _9"> </span>Double</div><div class="t m1 x12 hd y16 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>375-<span class="_ _9"> </span>and<span class="_ _9"> </span>456-MHz<span class="_ _9"> </span>ARM926EJ-S™<span class="_ _9"> </span>RISC<span class="_ _9"> </span>MPU</div><div class="t m1 x11 hd y17 ff7 fs1 fc0 sc0 ls0 ws0">Precision/64-Bit)<span class="_ _9"> </span>Floating<span class="_ _9"> </span>Point</div><div class="t m1 x12 hd y18 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>375-<span class="_ _9"> </span>and<span class="_ _9"> </span>456-MHz<span class="_ _9"> </span>C674x<span class="_ _9"> </span>Fixed-<span class="_ _9"> </span>and<span class="_ _9"> </span>Floating-</div><div class="t m1 x10 hd y19 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Supports<span class="_ _9"> </span>up<span class="_ _9"> </span>to<span class="_ _9"> </span>Four<span class="_ _9"> </span>SP<span class="_ _9"> </span>Additions<span class="_ _9"> </span>Per<span class="_ _9"> </span>Clock,</div><div class="t m1 x13 hd y1a ff7 fs1 fc0 sc0 ls0 ws0">Point<span class="_ _9"> </span>VLIW<span class="_ _9"> </span>DSP</div><div class="t m1 x11 hd y1b ff7 fs1 fc0 sc0 ls0 ws0">Four<span class="_ _9"> </span>DP<span class="_ _9"> </span>Additions<span class="_ _9"> </span>Every<span class="_ _9"> </span>Two<span class="_ _9"> </span>Clocks</div><div class="t m1 xf hd y1c ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>ARM926EJ-S<span class="_ _9"> </span>Core</div><div class="t m1 x10 hd y1d ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Supports<span class="_ _9"> </span>up<span class="_ _9"> </span>to<span class="_ _9"> </span>Two<span class="_ _9"> </span>Floating-Point<span class="_ _9"> </span>(SP<span class="_ _9"> </span>or</div><div class="t m1 x12 hd y1e ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>32-<span class="_ _9"> </span>and<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>(<span class="_ _9"> </span>Thumb</div><div class="t m1 x14 h8 y1f ff7 fs2 fc0 sc0 ls0 ws0">®</div><div class="t m1 x15 hd y1e ff7 fs1 fc0 sc0 ls0 ws0">)<span class="_ _9"> </span>Instructions</div><div class="t m1 x11 hd y20 ff7 fs1 fc0 sc0 ls0 ws0">DP)<span class="_ _9"> </span>Reciprocal<span class="_ _9"> </span>Approximation<span class="_ _9"> </span>(RCPxP)<span class="_ _9"> </span>and</div><div class="t m1 x12 hd y21 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>DSP<span class="_ _9"> </span>Instruction<span class="_ _9"> </span>Extensions</div><div class="t m1 x11 hd y22 ff7 fs1 fc0 sc0 ls0 ws0">Square-Root<span class="_ _9"> </span>Reciprocal<span class="_ _9"> </span>Approximation</div><div class="t m1 x12 hd y23 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Single-Cycle<span class="_ _9"> </span>MAC</div><div class="t m1 x11 hd y24 ff7 fs1 fc0 sc0 ls0 ws0">(RSQRxP)<span class="_ _9"> </span>Operations<span class="_ _9"> </span>Per<span class="_ _9"> </span>Cycle</div><div class="t m1 x12 hd y25 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>ARM<span class="_ _9"> </span>Jazelle</div><div class="t m1 x16 h8 y26 ff7 fs2 fc0 sc0 ls0 ws0">®</div><div class="t m1 x17 hd y25 ff7 fs1 fc0 sc0 ls0 ws0">Technology</div><div class="t m1 x18 hd y27 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Two<span class="_ _9"> </span>Multiply<span class="_ _9"> </span>Functional<span class="_ _9"> </span>Units:</div><div class="t m1 x12 hd y28 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Embedded<span class="_ _9"> </span>ICE-RT™<span class="_ _9"> </span>for<span class="_ _9"> </span>Real-Time<span class="_ _9"> </span>Debug</div><div class="t m1 x10 hd y29 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Mixed-Precision<span class="_ _9"> </span>IEEE<span class="_ _9"> </span>Floating-Point<span class="_ _9"> </span>Multiply</div><div class="t m1 xf hd y2a ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>ARM9™<span class="_ _9"> </span>Memory<span class="_ _9"> </span>Architecture</div><div class="t m1 x11 hd y2b ff7 fs1 fc0 sc0 ls0 ws0">Supported<span class="_ _9"> </span>up<span class="_ _9"> </span>to:</div><div class="t m1 x12 hd y2c ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>16KB<span class="_ _9"> </span>of<span class="_ _9"> </span>Instruction<span class="_ _9"> </span>Cache</div><div class="t m1 x11 hd y2d ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _c"> </span>2<span class="_ _9"> </span>SP<span class="_ _9"> </span>x<span class="_ _9"> </span>SP<span class="_ _9"> </span><span class="ff8">→<span class="_ _9"> </span></span>SP<span class="_ _9"> </span>Per<span class="_ _9"> </span>Clock</div><div class="t m1 x12 hd y2e ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>16KB<span class="_ _9"> </span>of<span class="_ _9"> </span>Data<span class="_ _9"> </span>Cache</div><div class="t m1 x11 hd y2f ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _c"> </span>2<span class="_ _9"> </span>SP<span class="_ _9"> </span>x<span class="_ _9"> </span>SP<span class="_ _9"> </span><span class="ff8">→<span class="_ _9"> </span></span>DP<span class="_ _9"> </span>Every<span class="_ _9"> </span>Two<span class="_ _9"> </span>Clocks</div><div class="t m1 x12 hd y30 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>8KB<span class="_ _9"> </span>of<span class="_ _9"> </span>RAM<span class="_ _9"> </span>(Vector<span class="_ _9"> </span>Table)</div><div class="t m1 x11 hd y31 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _c"> </span>2<span class="_ _9"> </span>SP<span class="_ _9"> </span>x<span class="_ _9"> </span>DP<span class="_ _9"> </span><span class="ff8">→<span class="_ _9"> </span></span>DP<span class="_ _9"> </span>Every<span class="_ _9"> </span>Three<span class="_ _9"> </span>Clocks</div><div class="t m1 x12 hd y32 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>64KB<span class="_ _9"> </span>of<span class="_ _9"> </span>ROM</div><div class="t m1 x11 hd y33 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _c"> </span>2<span class="_ _9"> </span>DP<span class="_ _9"> </span>x<span class="_ _9"> </span>DP<span class="_ _9"> </span><span class="ff8">→<span class="_ _9"> </span></span>DP<span class="_ _9"> </span>Every<span class="_ _9"> </span>Four<span class="_ _9"> </span>Clocks</div><div class="t m1 xf hd y34 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>C674x<span class="_ _9"> </span>Instruction<span class="_ _9"> </span>Set<span class="_ _9"> </span>Features</div><div class="t m1 x10 hd y35 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Fixed-Point<span class="_ _9"> </span>Multiply<span class="_ _9"> </span>Supports<span class="_ _9"> </span>Two<span class="_ _9"> </span>32<span class="_ _9"> </span>x<span class="_ _9"> </span>32-</div><div class="t m1 x11 hd y36 ff7 fs1 fc0 sc0 ls0 ws0">Bit<span class="_ _9"> </span>Multiplies,<span class="_ _9"> </span>Four<span class="_ _9"> </span>16<span class="_ _9"> </span>x<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>Multiplies,<span class="_ _9"> </span>or</div><div class="t m1 x12 hd y37 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Superset<span class="_ _9"> </span>of<span class="_ _9"> </span>the<span class="_ _9"> </span>C67x+<span class="_ _9"> </span>and<span class="_ _9"> </span>C64x+<span class="_ _9"> </span>ISAs</div><div class="t m1 x11 hd y38 ff7 fs1 fc0 sc0 ls0 ws0">Eight<span class="_ _9"> </span>8<span class="_ _9"> </span>x<span class="_ _9"> </span>8-Bit<span class="_ _9"> </span>Multiplies<span class="_ _9"> </span>per<span class="_ _9"> </span>Clock<span class="_ _9"> </span>Cycle,</div><div class="t m1 x12 hd y39 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Up<span class="_ _9"> </span>to<span class="_ _9"> </span>3648<span class="_ _9"> </span>MIPS<span class="_ _9"> </span>and<span class="_ _9"> </span>2746<span class="_ _9"> </span>MFLOPS</div><div class="t m1 x11 hd y3a ff7 fs1 fc0 sc0 ls0 ws0">and<span class="_ _9"> </span>Complex<span class="_ _9"> </span>Multiples</div><div class="t m1 x12 hd y3b ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Byte-Addressable<span class="_ _9"> </span>(8-,<span class="_ _9"> </span>16-,<span class="_ _9"> </span>32-,<span class="_ _9"> </span>and<span class="_ _9"> </span>64-Bit<span class="_ _9"> </span>Data)</div><div class="t m1 x18 hd y3c ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Instruction<span class="_ _9"> </span>Packing<span class="_ _9"> </span>Reduces<span class="_ _9"> </span>Code<span class="_ _9"> </span>Size</div><div class="t m1 x12 hd y3d ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>8-Bit<span class="_ _9"> </span>Overflow<span class="_ _9"> </span>Protection</div><div class="t m1 x18 hd y3e ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>All<span class="_ _9"> </span>Instructions<span class="_ _9"> </span>Conditional</div><div class="t m1 x12 hd y3f ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Bit-Field<span class="_ _9"> </span>Extract,<span class="_ _9"> </span>Set,<span class="_ _9"> </span>Clear</div><div class="t m1 x18 hd y40 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Hardware<span class="_ _9"> </span>Support<span class="_ _9"> </span>for<span class="_ _9"> </span>Modulo<span class="_ _9"> </span>Loop<span class="_ _9"> </span>Operation</div><div class="t m1 x12 hd y41 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Normalization,<span class="_ _9"> </span>Saturation,<span class="_ _9"> </span>Bit-Counting</div><div class="t m1 x18 hd y42 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Protected<span class="_ _9"> </span>Mode<span class="_ _9"> </span>Operation</div><div class="t m1 x12 hd y43 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Compact<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>Instructions</div><div class="t m1 x18 hd y44 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Exceptions<span class="_ _9"> </span>Support<span class="_ _9"> </span>for<span class="_ _9"> </span>Error<span class="_ _9"> </span>Detection<span class="_ _9"> </span>and</div><div class="t m1 xf hd y45 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>C674x<span class="_ _9"> </span>Two-Level<span class="_ _9"> </span>Cache<span class="_ _9"> </span>Memory<span class="_ _9"> </span>Architecture</div><div class="t m1 x10 hd y46 ff7 fs1 fc0 sc0 ls0 ws0">Program<span class="_ _9"> </span>Redirection</div><div class="t m1 x12 hd y47 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>32KB<span class="_ _9"> </span>of<span class="_ _9"> </span>L1P<span class="_ _9"> </span>Program<span class="_ _9"> </span>RAM/Cache</div><div class="t m1 x19 hd y48 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Software<span class="_ _9"> </span>Support</div><div class="t m1 x12 hd y49 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>32KB<span class="_ _9"> </span>of<span class="_ _9"> </span>L1D<span class="_ _9"> </span>Data<span class="_ _9"> </span>RAM/Cache</div><div class="t m1 x18 hd y4a ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>TI<span class="_ _9"> </span>DSP<span class="_ _9"> </span>BIOS™</div><div class="t m1 x12 hd y4b ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>256KB<span class="_ _9"> </span>of<span class="_ _9"> </span>L2<span class="_ _9"> </span>Unified<span class="_ _9"> </span>Mapped<span class="_ _9"> </span>RAM/Cache</div><div class="t m1 x18 hd y4c ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Chip<span class="_ _9"> </span>Support<span class="_ _9"> </span>Library<span class="_ _9"> </span>and<span class="_ _9"> </span>DSP<span class="_ _9"> </span>Library</div><div class="t m1 x12 hd y4d ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Flexible<span class="_ _9"> </span>RAM/Cache<span class="_ _9"> </span>Partition<span class="_ _9"> </span>(L1<span class="_ _9"> </span>and<span class="_ _9"> </span>L2)</div><div class="t m1 x19 hd y4e ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>128KB<span class="_ _9"> </span>of<span class="_ _9"> </span>RAM<span class="_ _9"> </span>Shared<span class="_ _9"> </span>Memory</div><div class="t m1 xf hd y4f ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Enhanced<span class="_ _9"> </span>Direct<span class="_ _9"> </span>Memory<span class="_ _9"> </span>Access<span class="_ _9"> </span>Controller<span class="_ _9"> </span>3</div><div class="t m1 x19 hd y50 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>1.8-V<span class="_ _9"> </span>or<span class="_ _9"> </span>3.3-V<span class="_ _9"> </span>LVCMOS<span class="_ _9"> </span>I/Os<span class="_ _9"> </span>(Except<span class="_ _9"> </span>for<span class="_ _9"> </span>USB<span class="_ _9"> </span>and</div><div class="t m1 x12 hd y51 ff7 fs1 fc0 sc0 ls0 ws0">(EDMA3):</div><div class="t m1 x18 hd y52 ff7 fs1 fc0 sc0 ls0 ws0">DDR2<span class="_ _9"> </span>Interfaces)</div><div class="t m1 x12 hd y53 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>2<span class="_ _9"> </span>Channel<span class="_ _9"> </span>Controllers</div><div class="t m1 x19 hd y54 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _9"> </span>External<span class="_ _9"> </span>Memory<span class="_ _9"> </span>Interfaces:</div><div class="t m1 x12 hd y55 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>3<span class="_ _9"> </span>Transfer<span class="_ _9"> </span>Controllers</div><div class="t m1 x18 hd y56 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>EMIFA</div><div class="t m1 x12 hd y57 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>64<span class="_ _9"> </span>Independent<span class="_ _9"> </span>DMA<span class="_ _9"> </span>Channels</div><div class="t m1 x10 hd y58 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>NOR<span class="_ _9"> </span>(8-<span class="_ _9"> </span>or<span class="_ _9"> </span>16-Bit-Wide<span class="_ _9"> </span>Data)</div><div class="t m1 x12 hd y59 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>16<span class="_ _9"> </span>Quick<span class="_ _9"> </span>DMA<span class="_ _9"> </span>Channels</div><div class="t m1 x10 hd y5a ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>NAND<span class="_ _9"> </span>(8-<span class="_ _9"> </span>or<span class="_ _9"> </span>16-Bit-Wide<span class="_ _9"> </span>Data)</div><div class="t m1 x12 hd y5b ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Programmable<span class="_ _9"> </span>Transfer<span class="_ _9"> </span>Burst<span class="_ _9"> </span>Size</div><div class="t m1 x10 hd y5c ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>16-Bit<span class="_ _9"> </span>SDRAM<span class="_ _9"> </span>with<span class="_ _9"> </span>128-MB<span class="_ _9"> </span>Address<span class="_ _9"> </span>Space</div><div class="t m1 xf hd y5d ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>TMS320C674x<span class="_ _9"> </span>Floating-Point<span class="_ _9"> </span>VLIW<span class="_ _9"> </span>DSP<span class="_ _9"> </span>Core</div><div class="t m1 x18 hd y5e ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>DDR2/Mobile<span class="_ _9"> </span>DDR<span class="_ _9"> </span>Memory<span class="_ _9"> </span>Controller<span class="_ _9"> </span>with<span class="_ _9"> </span>one</div><div class="t m1 x12 hd y5f ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Load-Store<span class="_ _9"> </span>Architecture<span class="_ _9"> </span>with<span class="_ _9"> </span>Nonaligned</div><div class="t m1 x10 hd y60 ff7 fs1 fc0 sc0 ls0 ws0">of<span class="_ _9"> </span>the<span class="_ _9"> </span>following:</div><div class="t m1 x13 hd y61 ff7 fs1 fc0 sc0 ls0 ws0">Support</div><div class="t m1 x10 hd y62 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>16-Bit<span class="_ _9"> </span>DDR2<span class="_ _9"> </span>SDRAM<span class="_ _9"> </span>with<span class="_ _9"> </span>256-MB<span class="_ _9"> </span>Address</div><div class="t m1 x12 hd y63 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>64<span class="_ _9"> </span>General-Purpose<span class="_ _9"> </span>Registers<span class="_ _9"> </span>(32-Bit)</div><div class="t m1 x11 hd y64 ff7 fs1 fc0 sc0 ls0 ws0">Space</div><div class="t m1 x12 hd y65 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Six<span class="_ _9"> </span>ALU<span class="_ _9"> </span>(32-<span class="_ _9"> </span>and<span class="_ _9"> </span>40-Bit)<span class="_ _9"> </span>Functional<span class="_ _9"> </span>Units</div><div class="t m1 xf hc y66 ff7 fs6 fc1 sc0 ls0 ws0">1</div><div class="t m1 x1a he y67 ff7 fs7 fc0 sc0 ls0 ws0">An<span class="_ _9"> </span>IMPORTANT<span class="_ _9"> </span>NOTICE<span class="_ _d"> </span>at<span class="_ _d"> </span>the<span class="_ _9"> </span>end<span class="_ _9"> </span>of<span class="_ _d"> </span>this<span class="_ _9"> </span>data<span class="_ _9"> </span>sheet<span class="_ _d"> </span>addresses<span class="_ _9"> </span>availability,<span class="_ _9"> </span>warranty,<span class="_ _d"> </span>changes,<span class="_ _9"> </span>use<span class="_ _9"> </span>in<span class="_ _d"> </span>safety-critical<span class="_ _9"> </span>applications,</div><div class="t m1 x1a he y68 ff7 fs7 fc0 sc0 ls0 ws0">intellectual<span class="_ _e"> </span>property<span class="_ _e"> </span>matters<span class="_ _e"> </span>and<span class="_ _e"> </span>other<span class="_ _e"> </span>important<span class="_ _e"> </span>disclaimers.<span class="_ _e"> </span>PRODUCTION<span class="_ _e"> </span>DATA.</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>

<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/bg2.jpg"><div class="t m1 xf h7 y69 ff6 fs1 fc0 sc0 ls0 ws0">OMAP-L138</div><div class="t m1 xf h8 y6a ff7 fs2 fc0 sc0 ls0 ws0">SPRS586I<span class="_ _1"> </span>–<span class="_ _2"></span>JUNE<span class="_ _3"> </span>2009<span class="_ _2"></span>–<span class="_ _2"></span>REVISED<span class="_ _3"> </span>SEPTEMBER<span class="_ _3"> </span>2014</div><div class="t m5 x1b hf y6a ff6 fs2 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m1 x13 hd y6b ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>16-Bit<span class="_ _9"> </span>mDDR<span class="_ _9"> </span>SDRAM<span class="_ _9"> </span>with<span class="_ _9"> </span>256-MB<span class="_ _9"> </span>Address<span class="_ _f"> </span>–<span class="_ _b"> </span>IEEE<span class="_ _9"> </span>802.3<span class="_ _9"> </span>Compliant</div><div class="t m1 x1c hd y6c ff7 fs1 fc0 sc0 ls0 ws0">Space</div><div class="t m1 x18 hd y6d ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>MII<span class="_ _9"> </span>Media-Independent<span class="_ _9"> </span>Interface</div><div class="t m1 xf hd y6e ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Three<span class="_ _9"> </span>Configurable<span class="_ _9"> </span>16550-Type<span class="_ _9"> </span>UART<span class="_ _9"> </span>Modules:</div><div class="t m1 x18 hd y6f ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>RMII<span class="_ _9"> </span>Reduced<span class="_ _9"> </span>Media-Independent<span class="_ _9"> </span>Interface</div><div class="t m1 x12 hd y70 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>With<span class="_ _9"> </span>Modem<span class="_ _9"> </span>Control<span class="_ _9"> </span>Signals</div><div class="t m1 x18 hd y71 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Management<span class="_ _9"> </span>Data<span class="_ _9"> </span>I/O<span class="_ _9"> </span>(MDIO)<span class="_ _9"> </span>Module</div><div class="t m1 x12 hd y72 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>16-Byte<span class="_ _9"> </span>FIFO</div><div class="t m1 x19 hd y73 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Video<span class="_ _9"> </span>Port<span class="_ _9"> </span>Interface<span class="_ _9"> </span>(VPIF):</div><div class="t m1 x12 hd y74 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>16x<span class="_ _9"> </span>or<span class="_ _9"> </span>13x<span class="_ _9"> </span>Oversampling<span class="_ _9"> </span>Option</div><div class="t m1 x18 hd y75 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Two<span class="_ _9"> </span>8-Bit<span class="_ _9"> </span>SD<span class="_ _9"> </span>(BT.656),<span class="_ _9"> </span>Single<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>or<span class="_ _9"> </span>Single</div><div class="t m1 xf hd y76 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>LCD<span class="_ _9"> </span>Controller<span class="_ _10"> </span>Raw<span class="_ _9"> </span>(8-,<span class="_ _9"> </span>10-,<span class="_ _9"> </span>and<span class="_ _9"> </span>12-Bit)<span class="_ _9"> </span>Video<span class="_ _9"> </span>Capture</div><div class="t m1 x10 hd y77 ff7 fs1 fc0 sc0 ls0 ws0">Channels</div><div class="t m1 xf hd y78 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _9"> </span>Serial<span class="_ _9"> </span>Peripheral<span class="_ _9"> </span>Interfaces<span class="_ _9"> </span>(SPIs)<span class="_ _9"> </span>Each<span class="_ _9"> </span>with</div><div class="t m1 x12 hd y79 ff7 fs1 fc0 sc0 ls0 ws0">Multiple<span class="_ _9"> </span>Chip<span class="_ _9"> </span>Selects<span class="_ _11"> </span>–<span class="_ _b"> </span>Two<span class="_ _9"> </span>8-Bit<span class="_ _9"> </span>SD<span class="_ _9"> </span>(BT.656),<span class="_ _9"> </span>Single<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>Video</div><div class="t m1 x10 hd y7a ff7 fs1 fc0 sc0 ls0 ws0">Display<span class="_ _9"> </span>Channels</div><div class="t m1 xf hd y7b ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _9"> </span>Multimedia<span class="_ _9"> </span>Card<span class="_ _9"> </span>(MMC)/Secure<span class="_ _9"> </span>Digital<span class="_ _9"> </span>(SD)</div><div class="t m1 x12 hd y7c ff7 fs1 fc0 sc0 ls0 ws0">Card<span class="_ _9"> </span>Interfaces<span class="_ _9"> </span>with<span class="_ _9"> </span>Secure<span class="_ _9"> </span>Data<span class="_ _9"> </span>I/O<span class="_ _9"> </span>(SDIO)<span class="_ _12"> </span>•<span class="_ _a"> </span>Universal<span class="_ _9"> </span>Parallel<span class="_ _9"> </span>Port<span class="_ _9"> </span>(uPP):</div><div class="t m1 x12 hd y7d ff7 fs1 fc0 sc0 ls0 ws0">Interfaces</div><div class="t m1 x18 hd y7e ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>High-Speed<span class="_ _9"> </span>Parallel<span class="_ _9"> </span>Interface<span class="_ _9"> </span>to<span class="_ _9"> </span>FPGAs<span class="_ _9"> </span>and</div><div class="t m1 xf hd y7f ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _9"> </span>Master<span class="_ _9"> </span>and<span class="_ _9"> </span>Slave<span class="_ _9"> </span>Inter-Integrated<span class="_ _9"> </span>Circuits<span class="_ _13"> </span>Data<span class="_ _9"> </span>Converters</div><div class="t m1 x12 hd y80 ff7 fs1 fc0 sc0 ls0 ws0">(<span class="_ _9"> </span>I</div><div class="t m1 x1d h8 y81 ff7 fs2 fc0 sc0 ls0 ws0">2</div><div class="t m1 x1e hd y80 ff7 fs1 fc0 sc0 ls0 ws0">C<span class="_ _9"> </span>Bus™)</div><div class="t m1 x18 hd y82 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Data<span class="_ _9"> </span>Width<span class="_ _9"> </span>on<span class="_ _9"> </span>Both<span class="_ _9"> </span>Channels<span class="_ _9"> </span>is<span class="_ _9"> </span>8-<span class="_ _9"> </span>to<span class="_ _9"> </span>16-Bit</div><div class="t m1 xf hd y83 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>One<span class="_ _9"> </span>Host-Port<span class="_ _9"> </span>Interface<span class="_ _9"> </span>(HPI)<span class="_ _9"> </span>with<span class="_ _9"> </span>16-Bit-Wide<span class="_ _14"> </span>Inclusive</div><div class="t m1 x12 hd y84 ff7 fs1 fc0 sc0 ls0 ws0">Muxed<span class="_ _9"> </span>Address<span class="_ _9"> </span>and<span class="_ _9"> </span>Data<span class="_ _9"> </span>Bus<span class="_ _9"> </span>For<span class="_ _9"> </span>High<span class="_ _9"> </span>Bandwidth</div><div class="t m1 x18 hd y85 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Single-Data<span class="_ _9"> </span>Rate<span class="_ _9"> </span>or<span class="_ _9"> </span>Dual-Data<span class="_ _9"> </span>Rate<span class="_ _9"> </span>Transfers</div><div class="t m1 xf hd y86 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Programmable<span class="_ _9"> </span>Real-Time<span class="_ _9"> </span>Unit<span class="_ _9"> </span>Subsystem</div><div class="t m1 x18 hd y87 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>Multiple<span class="_ _9"> </span>Interfaces<span class="_ _9"> </span>with<span class="_ _9"> </span>START,</div><div class="t m1 x12 hd y88 ff7 fs1 fc0 sc0 ls0 ws0">(PRUSS)</div><div class="t m1 x10 hd y89 ff7 fs1 fc0 sc0 ls0 ws0">ENABLE,<span class="_ _9"> </span>and<span class="_ _9"> </span>WAIT<span class="_ _9"> </span>Controls</div><div class="t m1 x12 hd y8a ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Two<span class="_ _9"> </span>Independent<span class="_ _9"> </span>Programmable<span class="_ _9"> </span>Real-Time<span class="_ _9"> </span>Unit</div><div class="t m1 x19 hd y8b ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Serial<span class="_ _9"> </span>ATA<span class="_ _9"> </span>(SATA)<span class="_ _9"> </span>Controller:</div><div class="t m1 x13 hd y8c ff7 fs1 fc0 sc0 ls0 ws0">(PRU)<span class="_ _9"> </span>Cores</div><div class="t m1 x18 hd y8d ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>SATA<span class="_ _9"> </span>I<span class="_ _9"> </span>(1.5<span class="_ _9"> </span>Gbps)<span class="_ _9"> </span>and<span class="_ _9"> </span>SATA<span class="_ _9"> </span>II</div><div class="t m1 x13 hd y8e ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>32-Bit<span class="_ _9"> </span>Load-Store<span class="_ _9"> </span>RISC<span class="_ _9"> </span>Architecture</div><div class="t m1 x10 hd y8f ff7 fs1 fc0 sc0 ls0 ws0">(3.0<span class="_ _9"> </span>Gbps)</div><div class="t m1 x13 hd y90 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>4KB<span class="_ _9"> </span>of<span class="_ _9"> </span>Instruction<span class="_ _9"> </span>RAM<span class="_ _9"> </span>Per<span class="_ _9"> </span>Core</div><div class="t m1 x18 hd y91 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>All<span class="_ _9"> </span>SATA<span class="_ _9"> </span>Power-Management</div><div class="t m1 x10 hd y92 ff7 fs1 fc0 sc0 ls0 ws0">Features</div><div class="t m1 x13 hd y93 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>512<span class="_ _9"> </span>Bytes<span class="_ _9"> </span>of<span class="_ _9"> </span>Data<span class="_ _9"> </span>RAM<span class="_ _9"> </span>Per<span class="_ _9"> </span>Core</div><div class="t m1 x18 hd y94 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Hardware-Assisted<span class="_ _9"> </span>Native<span class="_ _9"> </span>Command<span class="_ _9"> </span>Queueing</div><div class="t m1 x13 hd y95 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>PRUSS<span class="_ _9"> </span>can<span class="_ _9"> </span>be<span class="_ _9"> </span>Disabled<span class="_ _9"> </span>via<span class="_ _9"> </span>Software<span class="_ _9"> </span>to</div><div class="t m1 x10 hd y96 ff7 fs1 fc0 sc0 ls0 ws0">(NCQ)<span class="_ _9"> </span>for<span class="_ _9"> </span>up<span class="_ _9"> </span>to<span class="_ _9"> </span>32<span class="_ _9"> </span>Entries</div><div class="t m1 x1c hd y97 ff7 fs1 fc0 sc0 ls0 ws0">Save<span class="_ _9"> </span>Power</div><div class="t m1 x18 hd y98 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>Port<span class="_ _9"> </span>Multiplier<span class="_ _9"> </span>and<span class="_ _9"> </span>Command-Based</div><div class="t m1 x13 hd y99 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Register<span class="_ _9"> </span>30<span class="_ _9"> </span>of<span class="_ _9"> </span>Each<span class="_ _9"> </span>PRU<span class="_ _9"> </span>is<span class="_ _9"> </span>Exported<span class="_ _9"> </span>From</div><div class="t m1 x10 hd y9a ff7 fs1 fc0 sc0 ls0 ws0">Switching</div><div class="t m1 x1c hd y9b ff7 fs1 fc0 sc0 ls0 ws0">the<span class="_ _9"> </span>Subsystem<span class="_ _9"> </span>in<span class="_ _9"> </span>Addition<span class="_ _9"> </span>to<span class="_ _9"> </span>the<span class="_ _9"> </span>Normal<span class="_ _9"> </span>R31</div><div class="t m1 x1c hd y9c ff7 fs1 fc0 sc0 ls0 ws0">Output<span class="_ _9"> </span>of<span class="_ _9"> </span>the<span class="_ _9"> </span>PRU<span class="_ _9"> </span>Cores.</div><div class="t m1 x19 hd y9d ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Real-Time<span class="_ _9"> </span>Clock<span class="_ _9"> </span>(RTC)<span class="_ _9"> </span>with<span class="_ _9"> </span>32-kHz<span class="_ _9"> </span>Oscillator<span class="_ _9"> </span>and</div><div class="t m1 x18 hd y9e ff7 fs1 fc0 sc0 ls0 ws0">Separate<span class="_ _9"> </span>Power<span class="_ _9"> </span>Rail</div><div class="t m1 x12 hd y9f ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Standard<span class="_ _9"> </span>Power-Management<span class="_ _9"> </span>Mechanism</div><div class="t m1 x19 hd ya0 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Three<span class="_ _9"> </span>64-Bit<span class="_ _9"> </span>General-Purpose<span class="_ _9"> </span>Timers<span class="_ _9"> </span>(Each</div><div class="t m1 x13 hd ya1 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Clock<span class="_ _9"> </span>Gating</div><div class="t m1 x18 hd ya2 ff7 fs1 fc0 sc0 ls0 ws0">Configurable<span class="_ _9"> </span>as<span class="_ _9"> </span>Two<span class="_ _9"> </span>32-Bit<span class="_ _9"> </span>Timers)</div><div class="t m1 x13 hd ya3 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Entire<span class="_ _9"> </span>Subsystem<span class="_ _9"> </span>Under<span class="_ _9"> </span>a<span class="_ _9"> </span>Single<span class="_ _9"> </span>PSC<span class="_ _9"> </span>Clock</div><div class="t m1 x19 hd ya4 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>One<span class="_ _9"> </span>64-Bit<span class="_ _9"> </span>General-Purpose<span class="_ _9"> </span>or<span class="_ _9"> </span>Watchdog<span class="_ _9"> </span>Timer</div><div class="t m1 x1c hd ya5 ff7 fs1 fc0 sc0 ls0 ws0">Gating<span class="_ _9"> </span>Domain</div><div class="t m1 x18 hd ya6 ff7 fs1 fc0 sc0 ls0 ws0">(Configurable<span class="_ _9"> </span>as<span class="_ _9"> </span>Two<span class="_ _9"> </span>32-Bit<span class="_ _9"> </span>General-Purpose</div><div class="t m1 x12 hd ya7 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Dedicated<span class="_ _9"> </span>Interrupt<span class="_ _9"> </span>Controller</div><div class="t m1 x18 hd ya8 ff7 fs1 fc0 sc0 ls0 ws0">Timers)</div><div class="t m1 x12 hd ya9 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Dedicated<span class="_ _9"> </span>Switched<span class="_ _9"> </span>Central<span class="_ _9"> </span>Resource</div><div class="t m1 x19 hd yaa ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _9"> </span>Enhanced<span class="_ _9"> </span>High-Resolution<span class="_ _9"> </span>Pulse<span class="_ _9"> </span>Width</div><div class="t m1 xf hd yab ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>USB<span class="_ _9"> </span>1.1<span class="_ _9"> </span>OHCI<span class="_ _9"> </span>(Host)<span class="_ _9"> </span>with<span class="_ _9"> </span>Integrated<span class="_ _9"> </span>PHY<span class="_ _9"> </span>(USB1)</div><div class="t m1 x18 hd yac ff7 fs1 fc0 sc0 ls0 ws0">Modulators<span class="_ _9"> </span>(eHRPWMs):</div><div class="t m1 xf hd yad ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>USB<span class="_ _9"> </span>2.0<span class="_ _9"> </span>OTG<span class="_ _9"> </span>Port<span class="_ _9"> </span>with<span class="_ _9"> </span>Integrated<span class="_ _9"> </span>PHY<span class="_ _9"> </span>(USB0)</div><div class="t m1 x18 hd yae ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Dedicated<span class="_ _9"> </span>16-Bit<span class="_ _9"> </span>Time-Base<span class="_ _9"> </span>Counter<span class="_ _9"> </span>with</div><div class="t m1 x12 hd yaf ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>USB<span class="_ _9"> </span>2.0<span class="_ _9"> </span>High-<span class="_ _9"> </span>and<span class="_ _9"> </span>Full-Speed<span class="_ _9"> </span>Client</div><div class="t m1 x10 hd yb0 ff7 fs1 fc0 sc0 ls0 ws0">Period<span class="_ _9"> </span>and<span class="_ _9"> </span>Frequency<span class="_ _9"> </span>Control</div><div class="t m1 x12 hd yb1 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>USB<span class="_ _9"> </span>2.0<span class="_ _9"> </span>High-,<span class="_ _9"> </span>Full-,<span class="_ _9"> </span>and<span class="_ _9"> </span>Low-Speed<span class="_ _9"> </span>Host</div><div class="t m1 x18 hd yb2 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>6<span class="_ _9"> </span>Single-Edge<span class="_ _9"> </span>Outputs,<span class="_ _9"> </span>6<span class="_ _9"> </span>Dual-Edge<span class="_ _9"> </span>Symmetric</div><div class="t m1 x12 hd yb3 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>End<span class="_ _9"> </span>Point<span class="_ _9"> </span>0<span class="_ _9"> </span>(Control)</div><div class="t m1 x10 hd yb4 ff7 fs1 fc0 sc0 ls0 ws0">Outputs,<span class="_ _9"> </span>or<span class="_ _9"> </span>3<span class="_ _9"> </span>Dual-Edge<span class="_ _9"> </span>Asymmetric<span class="_ _9"> </span>Outputs</div><div class="t m1 x12 hd yb5 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>End<span class="_ _9"> </span>Points<span class="_ _9"> </span>1,2,3,4<span class="_ _9"> </span>(Control,<span class="_ _9"> </span>Bulk,<span class="_ _9"> </span>Interrupt,<span class="_ _9"> </span>or</div><div class="t m1 x18 hd yb6 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Dead-Band<span class="_ _9"> </span>Generation</div><div class="t m1 x13 hd yb7 ff7 fs1 fc0 sc0 ls0 ws0">ISOC)<span class="_ _9"> </span>RX<span class="_ _9"> </span>and<span class="_ _9"> </span>TX</div><div class="t m1 x18 hd yb8 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>PWM<span class="_ _9"> </span>Chopping<span class="_ _9"> </span>by<span class="_ _9"> </span>High-Frequency<span class="_ _9"> </span>Carrier</div><div class="t m1 xf hd yb9 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>One<span class="_ _9"> </span>Multichannel<span class="_ _9"> </span>Audio<span class="_ _9"> </span>Serial<span class="_ _9"> </span>Port<span class="_ _9"> </span>(McASP):</div><div class="t m1 x18 hd yba ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Trip<span class="_ _9"> </span>Zone<span class="_ _9"> </span>Input</div><div class="t m1 x12 hd ybb ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Two<span class="_ _9"> </span>Clock<span class="_ _9"> </span>Zones<span class="_ _9"> </span>and<span class="_ _9"> </span>16<span class="_ _9"> </span>Serial<span class="_ _9"> </span>Data<span class="_ _9"> </span>Pins</div><div class="t m1 x19 hd ybc ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Three<span class="_ _9"> </span>32-Bit<span class="_ _9"> </span>Enhanced<span class="_ _9"> </span>Capture<span class="_ _9"> </span>(eCAP)<span class="_ _9"> </span>Modules:</div><div class="t m1 x12 hd ybd ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>TDM,<span class="_ _9"> </span>I2S,<span class="_ _9"> </span>and<span class="_ _9"> </span>Similar<span class="_ _9"> </span>Formats</div><div class="t m1 x18 hd ybe ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Configurable<span class="_ _9"> </span>as<span class="_ _9"> </span>3<span class="_ _9"> </span>Capture<span class="_ _9"> </span>Inputs<span class="_ _9"> </span>or<span class="_ _9"> </span>3<span class="_ _9"> </span>Auxiliary</div><div class="t m1 x12 hd ybf ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>DIT-Capable</div><div class="t m1 x10 hd yc0 ff7 fs1 fc0 sc0 ls0 ws0">Pulse<span class="_ _9"> </span>Width<span class="_ _9"> </span>Modulator<span class="_ _9"> </span>(APWM)<span class="_ _9"> </span>Outputs</div><div class="t m1 x12 hd yc1 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>FIFO<span class="_ _9"> </span>Buffers<span class="_ _9"> </span>for<span class="_ _9"> </span>Transmit<span class="_ _9"> </span>and<span class="_ _9"> </span>Receive</div><div class="t m1 x18 hd yc2 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Single-Shot<span class="_ _9"> </span>Capture<span class="_ _9"> </span>of<span class="_ _9"> </span>up<span class="_ _9"> </span>to<span class="_ _9"> </span>Four<span class="_ _9"> </span>Event<span class="_ _9"> </span>Time-</div><div class="t m1 xf hd yc3 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Two<span class="_ _d"> </span>Multichannel<span class="_ _9"> </span>Buffered<span class="_ _9"> </span>Serial<span class="_ _9"> </span>Ports<span class="_ _9"> </span>(McBSPs):</div><div class="t m1 x10 hd yc4 ff7 fs1 fc0 sc0 ls0 ws0">Stamps</div><div class="t m1 x12 hd yc5 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Supports<span class="_ _9"> </span>TDM,<span class="_ _9"> </span>I2S,<span class="_ _9"> </span>and<span class="_ _9"> </span>Similar<span class="_ _9"> </span>Formats</div><div class="t m1 x19 hd yc6 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Packages:</div><div class="t m1 x12 hd yc7 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>AC97<span class="_ _9"> </span>Audio<span class="_ _9"> </span>Codec<span class="_ _9"> </span>Interface</div><div class="t m1 x18 hd yc8 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>361-Ball<span class="_ _9"> </span>Pb-Free<span class="_ _9"> </span>Plastic<span class="_ _9"> </span>Ball<span class="_ _9"> </span>Grid<span class="_ _9"> </span>Array<span class="_ _9"> </span>(PBGA)</div><div class="t m1 x12 hd yc9 ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>Telecom<span class="_ _9"> </span>Interfaces<span class="_ _9"> </span>(ST-Bus,<span class="_ _9"> </span>H100)</div><div class="t m1 x10 hd yca ff7 fs1 fc0 sc0 ls0 ws0">[ZCE<span class="_ _9"> </span>Suffix],<span class="_ _9"> </span>0.65-mm<span class="_ _9"> </span>Ball<span class="_ _9"> </span>Pitch</div><div class="t m1 x12 hd ycb ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>128-Channel<span class="_ _9"> </span>TDM</div><div class="t m1 x18 hd ycc ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>361-Ball<span class="_ _9"> </span>Pb-Free<span class="_ _9"> </span>PBGA<span class="_ _9"> </span>[ZWT<span class="_ _9"> </span>Suffix],</div><div class="t m1 x10 hd ycd ff7 fs1 fc0 sc0 ls0 ws0">0.80-mm<span class="_ _9"> </span>Ball<span class="_ _9"> </span>Pitch</div><div class="t m1 x12 hd yce ff7 fs1 fc0 sc0 ls0 ws0">–<span class="_ _b"> </span>FIFO<span class="_ _9"> </span>Buffers<span class="_ _9"> </span>for<span class="_ _9"> </span>Transmit<span class="_ _9"> </span>and<span class="_ _9"> </span>Receive</div><div class="t m1 x19 hd ycf ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>Commercial,<span class="_ _9"> </span>Extended,<span class="_ _9"> </span>or<span class="_ _9"> </span>Industrial<span class="_ _9"> </span>Temperature</div><div class="t m1 xf hd yd0 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _a"> </span>10/100<span class="_ _9"> </span>Mbps<span class="_ _9"> </span>Ethernet<span class="_ _9"> </span>MAC<span class="_ _9"> </span>(EMAC):</div><div class="t m1 xf h10 yd1 ff7 fs7 fc0 sc0 ls0 ws0">2<span class="_ _15"> </span><span class="ff9">OMAP-L138<span class="_ _e"> </span>C6000<span class="_ _e"> </span>DSP+ARM<span class="_ _e"> </span>Processor<span class="_ _16"> </span></span><span class="fs2">Copyright<span class="_ _3"> </span>©<span class="_ _3"> </span>2009–2014,<span class="_ _3"> </span>Texas<span class="_ _3"> </span>Instruments<span class="_ _3"> </span>Incorporated</span></div><div class="t m1 x1f h10 yd2 ff9 fs7 fc2 sc0 ls0 ws0">Submit<span class="_ _e"> </span>Documentation<span class="_ _e"> </span>Feedback</div><div class="t m1 x20 h10 yd3 ff7 fs7 fc0 sc0 ls0 ws0">Product<span class="_ _e"> </span>Folder<span class="_ _e"> </span>Links:<span class="_ _e"> </span><span class="ff9 fc2">OMAP-L138</span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/bg3.jpg"><div class="t m1 xa h7 y69 ff6 fs1 fc0 sc0 ls0 ws0">OMAP-L138</div><div class="t m5 xf hf y6a ff6 fs2 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m1 xb h8 y6a ff7 fs2 fc0 sc0 ls0 ws0">SPRS586I<span class="_ _1"> </span>–<span class="_ _2"></span>JUNE<span class="_ _3"> </span>2009<span class="_ _2"></span>–<span class="_ _2"></span>REVISED<span class="_ _3"> </span>SEPTEMBER<span class="_ _3"> </span>2014</div><div class="t m1 xf hb y6b ff6 fs5 fc0 sc0 ls0 ws0">1.2<span class="_ _7"> </span>Applications</div><div class="t m1 xf hd yf ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Professional<span class="_ _9"> </span>or<span class="_ _9"> </span>Private<span class="_ _9"> </span>Mobile<span class="_ _9"> </span>Radio<span class="_ _9"> </span>(PMR)<span class="_ _17"> </span>•<span class="_ _8"> </span>Biometric<span class="_ _9"> </span>Identification</div><div class="t m1 xf hd yd4 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Remote<span class="_ _9"> </span>Radio<span class="_ _9"> </span>Unit<span class="_ _9"> </span>(RRU)<span class="_ _18"> </span>•<span class="_ _8"> </span>Machine<span class="_ _9"> </span>Vision<span class="_ _9"> </span>(Low-End)</div><div class="t m1 xf hd yd5 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Remote<span class="_ _9"> </span>Radio<span class="_ _9"> </span>Head<span class="_ _9"> </span>(RRH)<span class="_ _19"> </span>•<span class="_ _8"> </span>Smart<span class="_ _9"> </span>Grid<span class="_ _9"> </span>Substation<span class="_ _9"> </span>Protection</div><div class="t m1 xf hd yd6 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Industrial<span class="_ _9"> </span>Automation<span class="_ _1a"> </span>•<span class="_ _8"> </span>Industrial<span class="_ _9"> </span>Portable<span class="_ _9"> </span>Navigation<span class="_ _9"> </span>Devices</div><div class="t m1 xf hd yd7 ff7 fs1 fc0 sc0 ls0 ws0">•<span class="_ _8"> </span>Currency<span class="_ _9"> </span>Inspection</div><div class="t m1 xf hb yd8 ff6 fs5 fc0 sc0 ls0 ws0">1.3<span class="_ _7"> </span>Description</div><div class="t m1 x1a hd yd9 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _b"> </span>OMAP-L138<span class="_ _b"> </span>C6000<span class="_ _b"> </span>DSP+ARM<span class="_ _b"> </span>processor<span class="_ _b"> </span>is<span class="_ _b"> </span>a<span class="_ _b"> </span>low-power<span class="_ _1b"> </span>applications<span class="_ _1b"> </span>processor<span class="_ _b"> </span>based<span class="_ _b"> </span>on<span class="_ _b"> </span>an</div><div class="t m1 x1a hd yda ff7 fs1 fc0 sc0 ls0 ws0">ARM926EJ-S<span class="_ _1c"> </span>and<span class="_ _1c"> </span>a<span class="_ _1c"> </span>C674x<span class="_ _1c"> </span>DSP<span class="_ _1c"> </span>core.<span class="_ _1c"> </span>This<span class="_ _1c"> </span>processor<span class="_ _1c"> </span>provides<span class="_ _1c"> </span>significantly<span class="_ _1c"> </span>lower<span class="_ _1c"> </span>power<span class="_ _1c"> </span>than<span class="_ _1c"> </span>other</div><div class="t m1 x1a hd ydb ff7 fs1 fc0 sc0 ls0 ws0">members<span class="_ _9"> </span>of<span class="_ _9"> </span>the<span class="_ _9"> </span>TMS320C6000™<span class="_ _9"> </span>platform<span class="_ _9"> </span>of<span class="_ _9"> </span>DSPs.</div><div class="t m1 x1a hd ydc ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _6"> </span>device<span class="_ _6"> </span>enables<span class="_ _1d"> </span>original-equipment<span class="_ _1d"> </span>manufacturers<span class="_ _6"> </span>(OEMs)<span class="_ _6"> </span>and<span class="_ _1d"> </span>original-design<span class="_ _6"> </span>manufacturers<span class="_ _6"> </span>(ODMs)</div><div class="t m1 x1a hd ydd ff7 fs1 fc0 sc0 ls0 ws0">to<span class="_ _1d"> </span>quickly<span class="_ _1d"> </span>bring<span class="_ _6"> </span>to<span class="_ _1d"> </span>market<span class="_ _1d"> </span>devices<span class="_ _6"> </span>with<span class="_ _1d"> </span>robust<span class="_ _1d"> </span>operating<span class="_ _6"> </span>systems,<span class="_ _1d"> </span>rich<span class="_ _1d"> </span>user<span class="_ _6"> </span>interfaces,<span class="_ _1d"> </span>and<span class="_ _1d"> </span>high<span class="_ _6"> </span>processor</div><div class="t m1 x1a hd yde ff7 fs1 fc0 sc0 ls0 ws0">performance<span class="_ _9"> </span>through<span class="_ _9"> </span>the<span class="_ _9"> </span>maximum<span class="_ _9"> </span>flexibility<span class="_ _9"> </span>of<span class="_ _9"> </span>a<span class="_ _9"> </span>fully<span class="_ _9"> </span>integrated,<span class="_ _9"> </span>mixed<span class="_ _9"> </span>processor<span class="_ _9"> </span>solution.</div><div class="t m1 x1a hd ydf ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _1c"> </span>dual-core<span class="_ _1c"> </span>architecture<span class="_ _1c"> </span>of<span class="_ _1c"> </span>the<span class="_ _1c"> </span>device<span class="_ _1c"> </span>provides<span class="_ _1c"> </span>benefits<span class="_ _1c"> </span>of<span class="_ _1c"> </span>both<span class="_ _1c"> </span>DSP<span class="_ _1c"> </span>and<span class="_ _1c"> </span>reduced<span class="_ _1c"> </span>instruction<span class="_ _1c"> </span>set</div><div class="t m1 x1a hd ye0 ff7 fs1 fc0 sc0 ls0 ws0">computer<span class="_ _1e"> </span>(RISC)<span class="_ _1e"> </span>technologies,<span class="_ _1e"> </span>incorporating<span class="_ _1e"> </span>a<span class="_ _1e"> </span>high-performance<span class="_ _1e"> </span>TMS320C674x<span class="_ _1e"> </span>DSP<span class="_ _1e"> </span>core<span class="_ _1e"> </span>and<span class="_ _1e"> </span>an</div><div class="t m1 x1a hd ye1 ff7 fs1 fc0 sc0 ls0 ws0">ARM926EJ-S<span class="_ _9"> </span>core.</div><div class="t m1 x1a hd ye2 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _b"> </span>ARM926EJ-S<span class="_ _b"> </span>is<span class="_ _b"> </span>a<span class="_ _b"> </span>32-bit<span class="_ _1e"> </span>RISC<span class="_ _b"> </span>processor<span class="_ _b"> </span>core<span class="_ _b"> </span>that<span class="_ _b"> </span>performs<span class="_ _b"> </span>32-bit<span class="_ _1e"> </span>or<span class="_ _b"> </span>16-bit<span class="_ _b"> </span>instructions<span class="_ _b"> </span>and</div><div class="t m1 x1a hd ye3 ff7 fs1 fc0 sc0 ls0 ws0">processes<span class="_ _4"> </span>32-bit,<span class="_ _4"> </span>16-bit,<span class="_ _4"> </span>or<span class="_ _4"> </span>8-bit<span class="_ _4"> </span>data.<span class="_ _1f"> </span>The<span class="_ _1f"> </span>core<span class="_ _4"> </span>uses<span class="_ _4"> </span>pipelining<span class="_ _4"> </span>so<span class="_ _4"> </span>that<span class="_ _4"> </span>all<span class="_ _1f"> </span>parts<span class="_ _4"> </span>of<span class="_ _4"> </span>the<span class="_ _4"> </span>processor<span class="_ _4"> </span>and</div><div class="t m1 x1a hd ye4 ff7 fs1 fc0 sc0 ls0 ws0">memory<span class="_ _9"> </span>system<span class="_ _9"> </span>can<span class="_ _9"> </span>operate<span class="_ _9"> </span>continuously.</div><div class="t m1 x1a hd ye5 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _1c"> </span>ARM9<span class="_ _1b"> </span>core<span class="_ _1c"> </span>has<span class="_ _1b"> </span>a<span class="_ _1b"> </span>coprocessor<span class="_ _1c"> </span>15<span class="_ _1b"> </span>(CP15),<span class="_ _1c"> </span>protection<span class="_ _1b"> </span>module,<span class="_ _1c"> </span>and<span class="_ _1b"> </span>data<span class="_ _1c"> </span>and<span class="_ _1b"> </span>program<span class="_ _1c"> </span>memory</div><div class="t m1 x1a hd ye6 ff7 fs1 fc0 sc0 ls0 ws0">management<span class="_ _6"> </span>units<span class="_ _6"> </span>(MMUs)<span class="_ _6"> </span>with<span class="_ _6"> </span>table<span class="_ _6"> </span>look-aside<span class="_ _6"> </span>buffers.<span class="_ _6"> </span>The<span class="_ _6"> </span>ARM9<span class="_ _6"> </span>core<span class="_ _6"> </span>has<span class="_ _6"> </span>separate<span class="_ _6"> </span>16-KB<span class="_ _6"> </span>instruction</div><div class="t m1 x1a hd ye7 ff7 fs1 fc0 sc0 ls0 ws0">and<span class="_ _6"> </span>16-KB<span class="_ _6"> </span>data<span class="_ _20"> </span>caches.<span class="_ _6"> </span>Both<span class="_ _6"> </span>are<span class="_ _20"> </span>4-way<span class="_ _6"> </span>associative<span class="_ _6"> </span>with<span class="_ _20"> </span>virtual<span class="_ _6"> </span>index<span class="_ _6"> </span>virtual<span class="_ _20"> </span>tag<span class="_ _6"> </span>(VIVT).<span class="_ _6"> </span>The<span class="_ _20"> </span>ARM9<span class="_ _6"> </span>core</div><div class="t m1 x1a hd ye8 ff7 fs1 fc0 sc0 ls0 ws0">also<span class="_ _9"> </span>has<span class="_ _9"> </span>8KB<span class="_ _9"> </span>of<span class="_ _9"> </span>RAM<span class="_ _9"> </span>(Vector<span class="_ _9"> </span>Table)<span class="_ _9"> </span>and<span class="_ _9"> </span>64KB<span class="_ _9"> </span>of<span class="_ _9"> </span>ROM.</div><div class="t m1 x1a hd ye9 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _1d"> </span>device<span class="_ _6"> </span>DSP<span class="_ _6"> </span>core<span class="_ _1d"> </span>uses<span class="_ _6"> </span>a<span class="_ _6"> </span>2-level<span class="_ _1d"> </span>cache-based<span class="_ _6"> </span>architecture.<span class="_ _6"> </span>The<span class="_ _1d"> </span>level<span class="_ _6"> </span>1<span class="_ _6"> </span>program<span class="_ _1d"> </span>cache<span class="_ _6"> </span>(L1P)<span class="_ _6"> </span>is<span class="_ _1d"> </span>a<span class="_ _6"> </span>32-</div><div class="t m1 x1a hd yea ff7 fs1 fc0 sc0 ls0 ws0">KB<span class="_ _1d"> </span>direct<span class="_ _6"> </span>mapped<span class="_ _6"> </span>cache,<span class="_ _1d"> </span>and<span class="_ _6"> </span>the<span class="_ _6"> </span>level<span class="_ _1d"> </span>1<span class="_ _6"> </span>data<span class="_ _6"> </span>cache<span class="_ _1d"> </span>(L1D)<span class="_ _6"> </span>is<span class="_ _6"> </span>a<span class="_ _1d"> </span>32-KB<span class="_ _6"> </span>2-way,<span class="_ _6"> </span>set-associative<span class="_ _1d"> </span>cache.<span class="_ _6"> </span>The</div><div class="t m1 x1a hd yeb ff7 fs1 fc0 sc0 ls0 ws0">level<span class="_ _20"> </span>2<span class="_ _1f"> </span>program<span class="_ _20"> </span>cache<span class="_ _20"> </span>(L2P)<span class="_ _1f"> </span>consists<span class="_ _20"> </span>of<span class="_ _21"> </span>a<span class="_ _20"> </span>256-KB<span class="_ _21"> </span>memory<span class="_ _21"> </span>space<span class="_ _21"> </span>that<span class="_ _20"> </span>is<span class="_ _21"> </span>shared<span class="_ _21"> </span>between<span class="_ _21"> </span>program<span class="_ _20"> </span>and</div><div class="t m1 x1a hd yec ff7 fs1 fc0 sc0 ls0 ws0">data<span class="_ _22"> </span>space.<span class="_ _22"> </span>L2<span class="_ _22"> </span>memory<span class="_ _22"> </span>can<span class="_ _22"> </span>be<span class="_ _22"> </span>configured<span class="_ _22"> </span>as<span class="_ _22"> </span>mapped<span class="_ _22"> </span>memory,<span class="_ _22"> </span>cache,<span class="_ _22"> </span>or<span class="_ _22"> </span>combinations<span class="_ _22"> </span>of<span class="_ _22"> </span>the<span class="_ _22"> </span>two.</div><div class="t m1 x1a hd yed ff7 fs1 fc0 sc0 ls0 ws0">Although<span class="_ _20"> </span>the<span class="_ _20"> </span>DSP<span class="_ _20"> </span>L2<span class="_ _20"> </span>is<span class="_ _20"> </span>accessible<span class="_ _20"> </span>by<span class="_ _20"> </span>the<span class="_ _20"> </span>ARM9<span class="_ _20"> </span>and<span class="_ _20"> </span>other<span class="_ _20"> </span>hosts<span class="_ _20"> </span>in<span class="_ _20"> </span>the<span class="_ _20"> </span>system,<span class="_ _20"> </span>an<span class="_ _20"> </span>additional<span class="_ _20"> </span>128KB<span class="_ _20"> </span>of</div><div class="t m1 x1a hd yee ff7 fs1 fc0 sc0 ls0 ws0">RAM<span class="_ _9"> </span>shared<span class="_ _9"> </span>memory<span class="_ _9"> </span>is<span class="_ _9"> </span>available<span class="_ _9"> </span>for<span class="_ _9"> </span>use<span class="_ _9"> </span>by<span class="_ _9"> </span>other<span class="_ _9"> </span>hosts<span class="_ _9"> </span>without<span class="_ _9"> </span>affecting<span class="_ _9"> </span>DSP<span class="_ _9"> </span>performance.</div><div class="t m1 x1a hd yef ff7 fs1 fc0 sc0 ls0 ws0">For<span class="_ _21"> </span>security-enabled<span class="_ _1f"> </span>devices,<span class="_ _1f"> </span>TI’s<span class="_ _1f"> </span>Basic<span class="_ _21"> </span>Secure<span class="_ _1f"> </span>Boot<span class="_ _1f"> </span>lets<span class="_ _1f"> </span>users<span class="_ _1f"> </span>protect<span class="_ _21"> </span>proprietary<span class="_ _1f"> </span>intellectual<span class="_ _1f"> </span>property</div><div class="t m1 x1a hd yf0 ff7 fs1 fc0 sc0 ls0 ws0">and<span class="_ _1f"> </span>prevents<span class="_ _4"> </span>external<span class="_ _1f"> </span>entities<span class="_ _1f"> </span>from<span class="_ _4"> </span>modifying<span class="_ _1f"> </span>user-developed<span class="_ _4"> </span>algorithms.<span class="_ _1f"> </span>By<span class="_ _4"> </span>starting<span class="_ _1f"> </span>from<span class="_ _4"> </span>a<span class="_ _1f"> </span>hardware-</div><div class="t m1 x1a hd yf1 ff7 fs1 fc0 sc0 ls0 ws0">based<span class="_ _21"> </span>“root-of-trust”,<span class="_ _1f"> </span>the<span class="_ _1f"> </span>secure<span class="_ _1f"> </span>boot<span class="_ _21"> </span>flow<span class="_ _1f"> </span>ensures<span class="_ _1f"> </span>a<span class="_ _1f"> </span>known<span class="_ _21"> </span>good<span class="_ _1f"> </span>starting<span class="_ _1f"> </span>point<span class="_ _1f"> </span>for<span class="_ _21"> </span>code<span class="_ _1f"> </span>execution.<span class="_ _1f"> </span>By</div><div class="t m1 x1a hd yf2 ff7 fs1 fc0 sc0 ls0 ws0">default,<span class="_ _20"> </span>the<span class="_ _20"> </span>JTAG<span class="_ _20"> </span>port<span class="_ _20"> </span>is<span class="_ _20"> </span>locked<span class="_ _20"> </span>down<span class="_ _20"> </span>to<span class="_ _20"> </span>prevent<span class="_ _20"> </span>emulation<span class="_ _20"> </span>and<span class="_ _20"> </span>debug<span class="_ _20"> </span>attacks;<span class="_ _20"> </span>however,<span class="_ _20"> </span>the<span class="_ _20"> </span>JTAG<span class="_ _20"> </span>port</div><div class="t m1 x1a hd yf3 ff7 fs1 fc0 sc0 ls0 ws0">can<span class="_ _21"> </span>be<span class="_ _1f"> </span>enabled<span class="_ _21"> </span>during<span class="_ _21"> </span>the<span class="_ _1f"> </span>secure<span class="_ _21"> </span>boot<span class="_ _1f"> </span>process<span class="_ _21"> </span>during<span class="_ _1f"> </span>application<span class="_ _21"> </span>development.<span class="_ _21"> </span>The<span class="_ _1f"> </span>boot<span class="_ _21"> </span>modules<span class="_ _1f"> </span>are</div><div class="t m1 x1a hd yf4 ff7 fs1 fc0 sc0 ls0 ws0">encrypted<span class="_ _1d"> </span>while<span class="_ _1d"> </span>sitting<span class="_ _6"> </span>in<span class="_ _1d"> </span>external<span class="_ _1d"> </span>nonvolatile<span class="_ _6"> </span>memory,<span class="_ _1d"> </span>such<span class="_ _1d"> </span>as<span class="_ _6"> </span>flash<span class="_ _1d"> </span>or<span class="_ _1d"> </span>EEPROM,<span class="_ _6"> </span>and<span class="_ _1d"> </span>are<span class="_ _1d"> </span>decrypted<span class="_ _6"> </span>and</div><div class="t m1 x1a hd yf5 ff7 fs1 fc0 sc0 ls0 ws0">authenticated<span class="_ _6"> </span>when<span class="_ _6"> </span>loaded<span class="_ _20"> </span>during<span class="_ _6"> </span>secure<span class="_ _6"> </span>boot.<span class="_ _20"> </span>Encryption<span class="_ _6"> </span>and<span class="_ _6"> </span>decryption<span class="_ _20"> </span>protects<span class="_ _6"> </span>the<span class="_ _6"> </span>users’<span class="_ _20"> </span>IP<span class="_ _6"> </span>and<span class="_ _6"> </span>lets</div><div class="t m1 x1a hd yf6 ff7 fs1 fc0 sc0 ls0 ws0">them<span class="_ _9"> </span>securely<span class="_ _9"> </span>set<span class="_ _9"> </span>up<span class="_ _9"> </span>the<span class="_ _9"> </span>system<span class="_ _9"> </span>and<span class="_ _9"> </span>begin<span class="_ _9"> </span>device<span class="_ _9"> </span>operation<span class="_ _9"> </span>with<span class="_ _9"> </span>known,<span class="_ _9"> </span>trusted<span class="_ _9"> </span>code.</div><div class="t m1 x1a hd yf7 ff7 fs1 fc0 sc0 ls0 ws0">Basic<span class="_ _1d"> </span>Secure<span class="_ _6"> </span>Boot<span class="_ _6"> </span>uses<span class="_ _1d"> </span>either<span class="_ _6"> </span>SHA-1<span class="_ _6"> </span>or<span class="_ _1d"> </span>SHA-256,<span class="_ _6"> </span>and<span class="_ _6"> </span>AES-128<span class="_ _1d"> </span>for<span class="_ _6"> </span>boot<span class="_ _6"> </span>image<span class="_ _1d"> </span>validation.<span class="_ _6"> </span>Basic<span class="_ _6"> </span>Secure</div><div class="t m1 x1a hd yf8 ff7 fs1 fc0 sc0 ls0 ws0">Boot<span class="_ _1d"> </span>also<span class="_ _1d"> </span>uses<span class="_ _1d"> </span>AES-128<span class="_ _1d"> </span>for<span class="_ _1d"> </span>boot<span class="_ _1d"> </span>image<span class="_ _1d"> </span>encryption.<span class="_ _1d"> </span>The<span class="_ _1d"> </span>secure<span class="_ _1d"> </span>boot<span class="_ _1d"> </span>flow<span class="_ _1d"> </span>employs<span class="_ _1d"> </span>a<span class="_ _1d"> </span>multilayer<span class="_ _1d"> </span>encryption</div><div class="t m1 x1a hd yf9 ff7 fs1 fc0 sc0 ls0 ws0">scheme<span class="_ _23"> </span>which<span class="_ _23"> </span>not<span class="_ _23"> </span>only<span class="_ _23"> </span>protects<span class="_ _23"> </span>the<span class="_ _23"> </span>boot<span class="_ _23"> </span>process<span class="_ _23"> </span>but<span class="_ _23"> </span>offers<span class="_ _23"> </span>the<span class="_ _23"> </span>ability<span class="_ _23"> </span>to<span class="_ _23"> </span>securely<span class="_ _23"> </span>upgrade<span class="_ _23"> </span>boot<span class="_ _23"> </span>and</div><div class="t m1 x1a hd yfa ff7 fs1 fc0 sc0 ls0 ws0">application<span class="_ _20"> </span>software<span class="_ _20"> </span>code.<span class="_ _20"> </span>A<span class="_ _20"> </span>128-bit<span class="_ _20"> </span>device-specific<span class="_ _20"> </span>cipher<span class="_ _20"> </span>key,<span class="_ _20"> </span>known<span class="_ _20"> </span>only<span class="_ _20"> </span>to<span class="_ _20"> </span>the<span class="_ _20"> </span>device<span class="_ _20"> </span>and<span class="_ _20"> </span>generated</div><div class="t m1 x1a hd yfb ff7 fs1 fc0 sc0 ls0 ws0">using<span class="_ _20"> </span>a<span class="_ _20"> </span>NIST-800-22<span class="_ _21"> </span>certified<span class="_ _20"> </span>random<span class="_ _20"> </span>number<span class="_ _21"> </span>generator,<span class="_ _20"> </span>is<span class="_ _21"> </span>used<span class="_ _20"> </span>to<span class="_ _20"> </span>protect<span class="_ _21"> </span>user<span class="_ _20"> </span>encryption<span class="_ _21"> </span>keys.<span class="_ _20"> </span>When</div><div class="t m1 x1a hd yfc ff7 fs1 fc0 sc0 ls0 ws0">an<span class="_ _6"> </span>update<span class="_ _6"> </span>is<span class="_ _6"> </span>needed,<span class="_ _6"> </span>the<span class="_ _6"> </span>customer<span class="_ _6"> </span>uses<span class="_ _6"> </span>the<span class="_ _6"> </span>encryption<span class="_ _6"> </span>keys<span class="_ _6"> </span>to<span class="_ _6"> </span>create<span class="_ _6"> </span>a<span class="_ _6"> </span>new<span class="_ _6"> </span>encrypted<span class="_ _6"> </span>image.<span class="_ _6"> </span>Then<span class="_ _6"> </span>the</div><div class="t m1 x1a hd yfd ff7 fs1 fc0 sc0 ls0 ws0">device<span class="_ _6"> </span>can<span class="_ _6"> </span>acquire<span class="_ _20"> </span>the<span class="_ _6"> </span>image<span class="_ _6"> </span>through<span class="_ _20"> </span>an<span class="_ _6"> </span>external<span class="_ _6"> </span>interface,<span class="_ _20"> </span>such<span class="_ _6"> </span>as<span class="_ _6"> </span>Ethernet,<span class="_ _20"> </span>and<span class="_ _6"> </span>overwrite<span class="_ _6"> </span>the<span class="_ _20"> </span>existing</div><div class="t m1 x1a hd yfe ff7 fs1 fc0 sc0 ls0 ws0">code.<span class="_ _1b"> </span>For<span class="_ _1c"> </span>more<span class="_ _1b"> </span>details<span class="_ _1b"> </span>on<span class="_ _1b"> </span>the<span class="_ _1b"> </span>supported<span class="_ _1b"> </span>security<span class="_ _1c"> </span>features<span class="_ _1b"> </span>or<span class="_ _1b"> </span>TI’s<span class="_ _1b"> </span>Basic<span class="_ _1b"> </span>Secure<span class="_ _1b"> </span>Boot,<span class="_ _1c"> </span>refer<span class="_ _1b"> </span>to<span class="_ _1b"> </span>the</div><div class="t m1 x1a h11 yff ff9 fs1 fc0 sc0 ls0 ws0">TMS320C674x/OMAP-L1x<span class="_ _9"> </span>Processor<span class="_ _9"> </span>Security<span class="_ _9"> </span>User’s<span class="_ _9"> </span>Guide<span class="_ _9"> </span><span class="ff7">(SPRUGQ9).</span></div><div class="t m1 xf h10 yd1 ff7 fs2 fc0 sc0 ls0 ws0">Copyright<span class="_ _3"> </span>©<span class="_ _3"> </span>2009–2014,<span class="_ _3"> </span>Texas<span class="_ _3"> </span>Instruments<span class="_ _3"> </span>Incorporated<span class="_ _16"> </span><span class="ff9 fs7">OMAP-L138<span class="_ _e"> </span>C6000<span class="_ _e"> </span>DSP+ARM<span class="_ _e"> </span>Processor<span class="_ _15"> </span><span class="ff7">3</span></span></div><div class="t m1 x1f h10 yd2 ff9 fs7 fc2 sc0 ls0 ws0">Submit<span class="_ _e"> </span>Documentation<span class="_ _e"> </span>Feedback</div><div class="t m1 x20 h10 yd3 ff7 fs7 fc0 sc0 ls0 ws0">Product<span class="_ _e"> </span>Folder<span class="_ _e"> </span>Links:<span class="_ _e"> </span><span class="ff9 fc2">OMAP-L138</span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/bg4.jpg"><div class="t m1 xf h7 y69 ff6 fs1 fc0 sc0 ls0 ws0">OMAP-L138</div><div class="t m1 xf h8 y6a ff7 fs2 fc0 sc0 ls0 ws0">SPRS586I<span class="_ _1"> </span>–<span class="_ _2"></span>JUNE<span class="_ _3"> </span>2009<span class="_ _2"></span>–<span class="_ _2"></span>REVISED<span class="_ _3"> </span>SEPTEMBER<span class="_ _3"> </span>2014</div><div class="t m5 x1b hf y6a ff6 fs2 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m1 x1a hd y100 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _9"> </span>peripheral<span class="_ _9"> </span>set<span class="_ _1d"> </span>includes:<span class="_ _9"> </span>a<span class="_ _9"> </span>10/100<span class="_ _1d"> </span>Mbps<span class="_ _9"> </span>Ethernet<span class="_ _9"> </span>media<span class="_ _1d"> </span>access<span class="_ _9"> </span>controller<span class="_ _9"> </span>(EMAC)<span class="_ _1d"> </span>with<span class="_ _9"> </span>a<span class="_ _9"> </span>management</div><div class="t m1 x1a hd y101 ff7 fs1 fc0 sc0 ls0 ws0">data<span class="_ _20"> </span>input/output<span class="_ _20"> </span>(MDIO)<span class="_ _21"> </span>module;<span class="_ _20"> </span>one<span class="_ _20"> </span>USB2.0<span class="_ _21"> </span>OTG<span class="_ _20"> </span>interface;<span class="_ _21"> </span>one<span class="_ _20"> </span>USB1.1<span class="_ _20"> </span>OHCI<span class="_ _21"> </span>interface;<span class="_ _20"> </span>two<span class="_ _21"> </span>I</div><div class="t m1 x21 h8 y102 ff7 fs2 fc0 sc0 ls0 ws0">2</div><div class="t m1 x22 hd y101 ff7 fs1 fc0 sc0 ls0 ws0">C<span class="_ _20"> </span>Bus</div><div class="t m1 x1a hd y103 ff7 fs1 fc0 sc0 ls0 ws0">interfaces;<span class="_ _1e"> </span>one<span class="_ _1e"> </span>multichannel<span class="_ _24"> </span>audio<span class="_ _1e"> </span>serial<span class="_ _1e"> </span>port<span class="_ _24"> </span>(McASP)<span class="_ _1e"> </span>with<span class="_ _1e"> </span>16<span class="_ _24"> </span>serializers<span class="_ _1e"> </span>and<span class="_ _1e"> </span>FIFO<span class="_ _24"> </span>buffers;<span class="_ _1e"> </span>two</div><div class="t m1 x1a hd y104 ff7 fs1 fc0 sc0 ls0 ws0">multichannel<span class="_ _1d"> </span>buffered<span class="_ _1d"> </span>serial<span class="_ _1d"> </span>ports<span class="_ _1d"> </span>(McBSPs)<span class="_ _1d"> </span>with<span class="_ _1d"> </span>FIFO<span class="_ _1d"> </span>buffers;<span class="_ _1d"> </span>two<span class="_ _1d"> </span>serial<span class="_ _1d"> </span>peripheral<span class="_ _1d"> </span>interfaces<span class="_ _1d"> </span>(SPIs)<span class="_ _1d"> </span>with</div><div class="t m1 x1a hd y105 ff7 fs1 fc0 sc0 ls0 ws0">multiple<span class="_ _1f"> </span>chip<span class="_ _4"> </span>selects;<span class="_ _1f"> </span>a<span class="_ _1f"> </span>configurable<span class="_ _4"> </span>16-bit<span class="_ _1f"> </span>host-port<span class="_ _4"> </span>interface<span class="_ _1f"> </span>(HPI);<span class="_ _4"> </span>up<span class="_ _1f"> </span>to<span class="_ _4"> </span>9<span class="_ _1f"> </span>banks<span class="_ _4"> </span>of<span class="_ _1f"> </span>general-purpose</div><div class="t m1 x1a hd y106 ff7 fs1 fc0 sc0 ls0 ws0">input/output<span class="_ _22"> </span>(GPIO)<span class="_ _1c"> </span>pins,<span class="_ _1c"> </span>with<span class="_ _22"> </span>each<span class="_ _1c"> </span>bank<span class="_ _1c"> </span>containing<span class="_ _22"> </span>16<span class="_ _1c"> </span>pins<span class="_ _1c"> </span>with<span class="_ _22"> </span>programmable<span class="_ _1c"> </span>interrupt<span class="_ _1c"> </span>and<span class="_ _22"> </span>event</div><div class="t m1 x1a hd y107 ff7 fs1 fc0 sc0 ls0 ws0">generation<span class="_ _20"> </span>modes,<span class="_ _20"> </span>multiplexed<span class="_ _20"> </span>with<span class="_ _20"> </span>other<span class="_ _20"> </span>peripherals;<span class="_ _20"> </span>three<span class="_ _20"> </span>UART<span class="_ _20"> </span>interfaces<span class="_ _20"> </span>(each<span class="_ _20"> </span>with<span class="_ _20"> </span>RTS<span class="_ _20"> </span>and<span class="_ _20"> </span>CTS);</div><div class="t m1 x1a hd y108 ff7 fs1 fc0 sc0 ls0 ws0">two<span class="_ _1b"> </span>enhanced<span class="_ _b"> </span>high-resolution<span class="_ _b"> </span>pulse<span class="_ _b"> </span>width<span class="_ _b"> </span>modulator<span class="_ _b"> </span>(eHRPWM)<span class="_ _b"> </span>peripherals;<span class="_ _1b"> </span>three<span class="_ _b"> </span>32-bit<span class="_ _b"> </span>enhanced</div><div class="t m1 x1a hd y109 ff7 fs1 fc0 sc0 ls0 ws0">capture<span class="_ _1d"> </span>(eCAP)<span class="_ _1d"> </span>module<span class="_ _1d"> </span>peripherals<span class="_ _1d"> </span>which<span class="_ _1d"> </span>can<span class="_ _1d"> </span>be<span class="_ _1d"> </span>configured<span class="_ _1d"> </span>as<span class="_ _1d"> </span>3<span class="_ _1d"> </span>capture<span class="_ _1d"> </span>inputs<span class="_ _1d"> </span>or<span class="_ _1d"> </span>3<span class="_ _1d"> </span>APWM<span class="_ _1d"> </span>outputs;<span class="_ _1d"> </span>two</div><div class="t m1 x1a hd y10a ff7 fs1 fc0 sc0 ls0 ws0">external<span class="_ _1d"> </span>memory<span class="_ _6"> </span>interfaces:<span class="_ _6"> </span>an<span class="_ _1d"> </span>asynchronous<span class="_ _6"> </span>and<span class="_ _6"> </span>SDRAM<span class="_ _1d"> </span>external<span class="_ _6"> </span>memory<span class="_ _6"> </span>interface<span class="_ _1d"> </span>(EMIFA)<span class="_ _6"> </span>for<span class="_ _6"> </span>slower</div><div class="t m1 x1a hd y10b ff7 fs1 fc0 sc0 ls0 ws0">memories<span class="_ _9"> </span>or<span class="_ _9"> </span>peripherals;<span class="_ _9"> </span>and<span class="_ _9"> </span>a<span class="_ _9"> </span>higher<span class="_ _9"> </span>speed<span class="_ _9"> </span>DDR2/Mobile<span class="_ _9"> </span>DDR<span class="_ _9"> </span>controller.</div><div class="t m1 x1a hd y10c ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _20"> </span>EMAC<span class="_ _21"> </span>provides<span class="_ _21"> </span>an<span class="_ _21"> </span>efficient<span class="_ _20"> </span>interface<span class="_ _21"> </span>between<span class="_ _21"> </span>the<span class="_ _21"> </span>device<span class="_ _20"> </span>and<span class="_ _21"> </span>a<span class="_ _21"> </span>network.<span class="_ _21"> </span>The<span class="_ _20"> </span>EMAC<span class="_ _21"> </span>supports<span class="_ _21"> </span>both</div><div class="t m1 x1a hd y10d ff7 fs1 fc0 sc0 ls0 ws0">10Base-T<span class="_ _1d"> </span>and<span class="_ _1d"> </span>100Base-TX,<span class="_ _1d"> </span>or<span class="_ _1d"> </span>10<span class="_ _1d"> </span>Mbps<span class="_ _1d"> </span>and<span class="_ _1d"> </span>100<span class="_ _1d"> </span>Mbps<span class="_ _1d"> </span>in<span class="_ _1d"> </span>either<span class="_ _1d"> </span>half-<span class="_ _1d"> </span>or<span class="_ _1d"> </span>full-duplex<span class="_ _1d"> </span>mode.<span class="_ _1d"> </span>Additionally,<span class="_ _1d"> </span>an</div><div class="t m1 x1a hd y10e ff7 fs1 fc0 sc0 ls0 ws0">MDIO<span class="_ _9"> </span>interface<span class="_ _9"> </span>is<span class="_ _9"> </span>available<span class="_ _9"> </span>for<span class="_ _9"> </span>PHY<span class="_ _9"> </span>configuration.<span class="_ _9"> </span>The<span class="_ _9"> </span>EMAC<span class="_ _9"> </span>supports<span class="_ _9"> </span>both<span class="_ _9"> </span>MII<span class="_ _9"> </span>and<span class="_ _9"> </span>RMII<span class="_ _9"> </span>interfaces.</div><div class="t m1 x1a hd y10f ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _6"> </span>SATA<span class="_ _6"> </span>controller<span class="_ _20"> </span>provides<span class="_ _6"> </span>a<span class="_ _6"> </span>high-speed<span class="_ _20"> </span>interface<span class="_ _6"> </span>to<span class="_ _6"> </span>mass<span class="_ _20"> </span>data<span class="_ _6"> </span>storage<span class="_ _6"> </span>devices.<span class="_ _20"> </span>The<span class="_ _6"> </span>SATA<span class="_ _6"> </span>controller</div><div class="t m1 x1a hd y86 ff7 fs1 fc0 sc0 ls0 ws0">supports<span class="_ _9"> </span>both<span class="_ _9"> </span>SATA<span class="_ _9"> </span>I<span class="_ _9"> </span>(1.5<span class="_ _9"> </span>Gbps)<span class="_ _9"> </span>and<span class="_ _9"> </span>SATA<span class="_ _9"> </span>II<span class="_ _9"> </span>(3.0<span class="_ _9"> </span>Gbps).</div><div class="t m1 x1a hd y110 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _4"> </span>uPP<span class="_ _23"> </span>provides<span class="_ _4"> </span>a<span class="_ _23"> </span>high-speed<span class="_ _23"> </span>interface<span class="_ _4"> </span>to<span class="_ _23"> </span>many<span class="_ _4"> </span>types<span class="_ _23"> </span>of<span class="_ _23"> </span>data<span class="_ _4"> </span>converters,<span class="_ _23"> </span>FPGAs,<span class="_ _4"> </span>or<span class="_ _23"> </span>other<span class="_ _23"> </span>parallel</div><div class="t m1 x1a hd y111 ff7 fs1 fc0 sc0 ls0 ws0">devices.<span class="_ _21"> </span>The<span class="_ _1f"> </span>uPP<span class="_ _21"> </span>supports<span class="_ _21"> </span>programmable<span class="_ _1f"> </span>data<span class="_ _21"> </span>widths<span class="_ _1f"> </span>between<span class="_ _21"> </span>8-<span class="_ _1f"> </span>to<span class="_ _21"> </span>16-bits<span class="_ _21"> </span>on<span class="_ _1f"> </span>both<span class="_ _21"> </span>channels.<span class="_ _1f"> </span>Single-</div><div class="t m1 x1a hd y112 ff7 fs1 fc0 sc0 ls0 ws0">data<span class="_ _1d"> </span>rate<span class="_ _1d"> </span>and<span class="_ _6"> </span>double-data<span class="_ _1d"> </span>rate<span class="_ _1d"> </span>transfers<span class="_ _6"> </span>are<span class="_ _1d"> </span>supported<span class="_ _1d"> </span>as<span class="_ _6"> </span>well<span class="_ _1d"> </span>as<span class="_ _1d"> </span>START,<span class="_ _6"> </span>ENABLE,<span class="_ _1d"> </span>and<span class="_ _1d"> </span>WAIT<span class="_ _6"> </span>signals<span class="_ _1d"> </span>to</div><div class="t m1 x1a hd y113 ff7 fs1 fc0 sc0 ls0 ws0">provide<span class="_ _9"> </span>control<span class="_ _9"> </span>for<span class="_ _9"> </span>a<span class="_ _9"> </span>variety<span class="_ _9"> </span>of<span class="_ _9"> </span>data<span class="_ _9"> </span>converters.</div><div class="t m1 x1a hd y114 ff7 fs1 fc0 sc0 ls0 ws0">A<span class="_ _9"> </span>video<span class="_ _9"> </span>port<span class="_ _9"> </span>interface<span class="_ _9"> </span>(VPIF)<span class="_ _9"> </span>is<span class="_ _9"> </span>included<span class="_ _9"> </span>providing<span class="_ _9"> </span>a<span class="_ _9"> </span>flexible<span class="_ _9"> </span>video<span class="_ _9"> </span>I/O<span class="_ _9"> </span>port.</div><div class="t m1 x1a hd y115 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _21"> </span>rich<span class="_ _21"> </span>peripheral<span class="_ _21"> </span>set<span class="_ _21"> </span>provides<span class="_ _21"> </span>the<span class="_ _21"> </span>ability<span class="_ _21"> </span>to<span class="_ _1f"> </span>control<span class="_ _20"> </span>external<span class="_ _1f"> </span>peripheral<span class="_ _21"> </span>devices<span class="_ _21"> </span>and<span class="_ _21"> </span>communicate<span class="_ _21"> </span>with</div><div class="t m1 x1a hd y116 ff7 fs1 fc0 sc0 ls0 ws0">external<span class="_ _1d"> </span>processors.<span class="_ _1d"> </span>For<span class="_ _1d"> </span>details<span class="_ _1d"> </span>on<span class="_ _1d"> </span>each<span class="_ _1d"> </span>of<span class="_ _1d"> </span>the<span class="_ _1d"> </span>peripherals,<span class="_ _1d"> </span>see<span class="_ _1d"> </span>the<span class="_ _1d"> </span>related<span class="_ _1d"> </span>sections<span class="_ _1d"> </span>in<span class="_ _1d"> </span>this<span class="_ _1d"> </span>document<span class="_ _1d"> </span>and</div><div class="t m1 x1a hd y39 ff7 fs1 fc0 sc0 ls0 ws0">the<span class="_ _9"> </span>associated<span class="_ _9"> </span>peripheral<span class="_ _9"> </span>reference<span class="_ _9"> </span>guides.</div><div class="t m1 x1a hd y117 ff7 fs1 fc0 sc0 ls0 ws0">The<span class="_ _4"> </span>device<span class="_ _23"> </span>has<span class="_ _4"> </span>a<span class="_ _23"> </span>complete<span class="_ _23"> </span>set<span class="_ _4"> </span>of<span class="_ _23"> </span>development<span class="_ _4"> </span>tools<span class="_ _23"> </span>for<span class="_ _23"> </span>the<span class="_ _23"> </span>ARM9<span class="_ _4"> </span>and<span class="_ _23"> </span>DSP.<span class="_ _4"> </span>These<span class="_ _23"> </span>tools<span class="_ _23"> </span>include<span class="_ _4"> </span>C</div><div class="t m1 x1a hd y118 ff7 fs1 fc0 sc0 ls0 ws0">compilers,<span class="_ _9"> </span>a<span class="_ _9"> </span>DSP<span class="_ _1d"> </span>assembly<span class="_ _9"> </span>optimizer<span class="_ _9"> </span>to<span class="_ _1d"> </span>simplify<span class="_ _9"> </span>programming<span class="_ _9"> </span>and<span class="_ _1d"> </span>scheduling,<span class="_ _9"> </span>and<span class="_ _9"> </span>a<span class="_ _1d"> </span>Windows</div><div class="t m1 x23 h8 y119 ff7 fs2 fc0 sc0 ls0 ws0">®</div><div class="t m1 x24 hd y118 ff7 fs1 fc0 sc0 ls0 ws0">debugger</div><div class="t m1 x1a hd y11a ff7 fs1 fc0 sc0 ls0 ws0">interface<span class="_ _9"> </span>for<span class="_ _9"> </span>visibility<span class="_ _9"> </span>into<span class="_ _9"> </span>source<span class="_ _9"> </span>code<span class="_ _9"> </span>execution.</div><div class="t m1 x25 h7 y11b ff6 fs1 fc0 sc0 ls0 ws0">Device<span class="_ _9"> </span>Information</div><div class="t m1 x26 h12 y11c ff6 fs7 fc0 sc0 ls0 ws0">PART<span class="_ _e"> </span>NUMBER<span class="_ _25"> </span>PACKAGE<span class="_ _26"> </span>BODY<span class="_ _e"> </span>SIZE</div><div class="t m1 x27 he y11d ff7 fs7 fc0 sc0 ls0 ws0">OMAPL138ZCE<span class="_ _27"> </span>NFBGA<span class="_ _e"> </span>(361)<span class="_ _28"> </span>13,00<span class="_ _e"> </span>mm<span class="_ _e"> </span>x<span class="_ _e"> </span>13,00<span class="_ _e"> </span>mm</div><div class="t m1 x27 he y11e ff7 fs7 fc0 sc0 ls0 ws0">OMAPL138ZWT<span class="_ _29"> </span>NFBGA<span class="_ _e"> </span>(361)<span class="_ _28"> </span>16,00<span class="_ _e"> </span>mm<span class="_ _e"> </span>x<span class="_ _e"> </span>16,00<span class="_ _e"> </span>mm</div><div class="t m1 xf h10 yd1 ff7 fs7 fc0 sc0 ls0 ws0">4<span class="_ _15"> </span><span class="ff9">OMAP-L138<span class="_ _e"> </span>C6000<span class="_ _e"> </span>DSP+ARM<span class="_ _e"> </span>Processor<span class="_ _16"> </span></span><span class="fs2">Copyright<span class="_ _3"> </span>©<span class="_ _3"> </span>2009–2014,<span class="_ _3"> </span>Texas<span class="_ _3"> </span>Instruments<span class="_ _3"> </span>Incorporated</span></div><div class="t m1 x1f h10 yd2 ff9 fs7 fc2 sc0 ls0 ws0">Submit<span class="_ _e"> </span>Documentation<span class="_ _e"> </span>Feedback</div><div class="t m1 x20 h10 yd3 ff7 fs7 fc0 sc0 ls0 ws0">Product<span class="_ _e"> </span>Folder<span class="_ _e"> </span>Links:<span class="_ _e"> </span><span class="ff9 fc2">OMAP-L138</span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m4"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6259eb6992dc900e62cd3678/bg5.jpg"><div class="c x28 y11f w6 h13"><div class="t m1 x29 h14 y120 ffa fs8 fc0 sc0 ls0 ws0">Switched Central Resource (SCR)</div><div class="t m1 x2a h14 y121 ffa fs8 fc0 sc0 ls0 ws0">BOOT ROM</div><div class="t m1 x2b h14 y122 ffa fs8 fc0 sc0 ls0 ws0">256KB L2 RAM</div><div class="t m1 x2c h14 y123 ffa fs8 fc0 sc0 ls0 ws0">32KB</div><div class="t m1 x2d h14 y124 ffa fs8 fc0 sc0 ls0 ws0">L1 RAM</div><div class="t m1 x2e h14 y125 ffa fs8 fc0 sc0 ls0 ws0">32KB</div><div class="t m1 x2f h14 y126 ffa fs8 fc0 sc0 ls0 ws0">L1 Pgm</div><div class="t m1 x30 h14 y125 ffa fs8 fc0 sc0 ls0 ws0">16KB</div><div class="t m1 x31 h14 y126 ffa fs8 fc0 sc0 ls0 ws0">I-Cache</div><div class="t m1 x32 h14 y127 ffa fs8 fc0 sc0 ls0 ws0">16KB</div><div class="t m1 x33 h14 y128 ffa fs8 fc0 sc0 ls0 ws0">D-Cache</div><div class="t m1 x34 h14 y129 ffa fs8 fc0 sc0 ls0 ws0">AET</div><div class="t m1 x35 h14 y12a ffa fs8 fc0 sc0 ls0 ws0">4KB ETB</div><div class="t m1 x36 h14 y12b ffa fs8 fc0 sc0 ls0 ws0">C674x™</div><div class="t m1 x37 h14 y12c ffa fs8 fc0 sc0 ls0 ws0">DSP<span class="_"> </span>CPU</div><div class="t m1 x31 h14 y12d ffa fs8 fc0 sc0 ls0 ws0">ARM926EJ-S CPU</div><div class="t m1 x38 h14 y12e ffa fs8 fc0 sc0 ls0 ws0">With MMU</div><div class="t m1 x39 h14 y12f ffa fs8 fc0 sc0 ls0 ws0">DSP<span class="_"> </span>Subsystem</div><div class="t m1 x3a h14 y130 ffa fs8 fc0 sc0 ls0 ws0">ARM Subsystem</div><div class="t m1 x3b h14 y131 ffa fs8 fc0 sc0 ls0 ws0">JT<span class="_ _2a"></span>AG Interface</div><div class="t m1 x13 h14 y132 ffa fs8 fc0 sc0 ls0 ws0">System Control</div><div class="t m1 x3c h14 y133 ffa fs8 fc0 sc0 ls0 ws0">Input</div><div class="t m1 x3d h14 y134 ffa fs8 fc0 sc0 ls0 ws0">Clock(s)</div><div class="t m1 x3e h14 y135 ffa fs8 fc0 sc0 ls0 ws0">64KB ROM</div><div class="t m1 x3f h14 y136 ffa fs8 fc0 sc0 ls0 ws0">8KB RAM</div><div class="t m1 x40 h14 y137 ffa fs8 fc0 sc0 ls0 ws0">(V<span class="_ _2a"></span>ector T<span class="_ _2a"></span>able)</div><div class="t m1 x41 h14 y138 ffa fs8 fc0 sc0 ls0 ws0">Power/Sleep</div><div class="t m1 x42 h14 y139 ffa fs8 fc0 sc0 ls0 ws0">Controller</div><div class="t m1 x26 h14 y13a ffa fs8 fc0 sc0 ls0 ws0">Pin</div><div class="t m1 x41 h14 y13b ffa fs8 fc0 sc0 ls0 ws0">Multiplexing</div><div class="t m1 x43 h14 y13c ffa fs8 fc0 sc0 ls0 ws0">PLL/Clock</div><div class="t m1 x43 h14 y13d ffa fs8 fc0 sc0 ls0 ws0">Generator</div><div class="t m1 x28 h14 y13e ffa fs8 fc0 sc0 ls0 ws0">w/OSC</div><div class="t m1 x44 h14 y13f ffa fs8 fc0 sc0 ls0 ws0">General-</div><div class="t m1 x44 h14 y140 ffa fs8 fc0 sc0 ls0 ws0">Purpose</div><div class="t m1 x43 h14 y141 ffa fs8 fc0 sc0 ls0 ws0">Timer (x4)</div><div class="t m1 x45 h14 y142 ffa fs8 fc0 sc0 ls0 ws0">Serial Interfaces</div><div class="t m1 x46 h14 y143 ffa fs8 fc0 sc0 ls0 ws0">Audio Ports</div><div class="t m1 x47 h14 y144 ffa fs8 fc0 sc0 ls0 ws0">McASP</div><div class="t m1 x47 h14 y145 ffa fs8 fc0 sc0 ls0 ws0">w/FIFO</div><div class="t m1 x48 h14 y146 ffa fs8 fc0 sc0 ls0 ws0">DMA</div><div class="t m1 x49 h15 y147 ffa fs9 fc0 sc0 ls0 ws0">Peripherals</div><div class="t m1 x4a h14 y146 ffa fs8 fc0 sc0 ls0 ws0">Display<span class="_ _2b"> </span>Internal Memory</div><div class="t m1 x4b h14 y148 ffa fs8 fc0 sc0 ls0 ws0">LCD</div><div class="t m1 x4c h14 y149 ffa fs8 fc0 sc0 ls0 ws0">Ctlr</div><div class="t m1 x18 h14 y14a ffa fs8 fc0 sc0 ls0 ws0">128KB</div><div class="t m1 x4d h14 y14b ffa fs8 fc0 sc0 ls0 ws0">RAM</div><div class="t m1 x4e h14 y14c ffa fs8 fc0 sc0 ls0 ws0">External Memory Interfaces<span class="_ _2c"></span>Connectivity</div><div class="t m1 x4f h14 y14d ffa fs8 fc0 sc0 ls0 ws0">EDMA3</div><div class="t m1 x50 h14 y14e ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x48 h14 y14f ffa fs8 fc0 sc0 ls0 ws0">Control Timers</div><div class="t m1 x51 h14 y150 ffa fs8 fc0 sc0 ls0 ws0">ePWM</div><div class="t m1 x50 h14 y151 ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x52 h14 y152 ffa fs8 fc0 sc0 ls0 ws0">eCAP</div><div class="t m1 x53 h14 y153 ffa fs8 fc0 sc0 ls0 ws0">(x3)</div><div class="t m1 x54 h14 y154 ffa fs8 fc0 sc0 ls0 ws0">EMIF<span class="_ _2a"></span>A(8b/16B)</div><div class="t m1 x55 h14 y155 ffa fs8 fc0 sc0 ls0 ws0">NAND/Flash</div><div class="t m1 x55 h14 y156 ffa fs8 fc0 sc0 ls0 ws0">16b SDRAM</div><div class="t m1 x56 h14 y157 ffa fs8 fc0 sc0 ls0 ws0">DDR2/MDDR</div><div class="t m1 x57 h14 y158 ffa fs8 fc0 sc0 ls0 ws0">Controller</div><div class="t m1 x58 h14 y159 ffa fs8 fc0 sc0 ls0 ws0">RTC/</div><div class="t m1 x59 h14 y15a ffa fs8 fc0 sc0 ls0 ws0">32-kHz</div><div class="t m1 x58 h14 y15b ffa fs8 fc0 sc0 ls0 ws0">OSC</div><div class="t m1 x5a h14 y15c ffa fs8 fc0 sc0 ls0 ws0">I<span class="_ _d"> </span>C</div><div class="t m1 x5b h14 y15d ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x5c h16 y15e ffa fsa fc0 sc0 ls0 ws0">2</div><div class="t m1 x5d h14 y15f ffa fs8 fc0 sc0 ls0 ws0">SPI</div><div class="t m1 x5d h14 y160 ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x5e h14 y161 ffa fs8 fc0 sc0 ls0 ws0">UART</div><div class="t m1 x14 h14 y162 ffa fs8 fc0 sc0 ls0 ws0">(x3)</div><div class="t m1 x1a h14 y163 ffa fs8 fc0 sc0 ls0 ws0">McBSP</div><div class="t m1 x5f h14 y164 ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x60 h14 y165 ffa fs8 fc0 sc0 ls0 ws0">Video</div><div class="t m1 x61 h14 y166 ffa fs8 fc0 sc0 ls0 ws0">VPIF</div><div class="t m1 x62 h14 y165 ffa fs8 fc0 sc0 ls0 ws0">Parallel Port</div><div class="t m1 x2c h14 y167 ffa fs8 fc0 sc0 ls0 ws0">uPP</div><div class="t m1 x63 h14 y168 ffa fs8 fc0 sc0 ls0 ws0">EMAC</div><div class="t m1 x63 h14 y169 ffa fs8 fc0 sc0 ls0 ws0">10/100</div><div class="t m1 x3b h14 y16a ffa fs8 fc0 sc0 ls0 ws0">(MII/RMII)</div><div class="t m1 x64 h14 y16b ffa fs8 fc0 sc0 ls0 ws0">MDIO</div><div class="t m1 x65 h14 y16c ffa fs8 fc0 sc0 ls0 ws0">USB1.1</div><div class="t m1 x66 h14 y16d ffa fs8 fc0 sc0 ls0 ws0">OHCI Ctlr</div><div class="t m1 x67 h14 y16e ffa fs8 fc0 sc0 ls0 ws0">PHY</div><div class="t m1 x68 h14 y16f ffa fs8 fc0 sc0 ls0 ws0">USB2.0</div><div class="t m1 x1d h14 y170 ffa fs8 fc0 sc0 ls0 ws0">OTG Ctlr</div><div class="t m1 x69 h14 y171 ffa fs8 fc0 sc0 ls0 ws0">PHY</div><div class="t m1 x3 h14 y172 ffa fs8 fc0 sc0 ls0 ws0">HPI</div><div class="t m1 x6a h14 y173 ffa fs8 fc0 sc0 ls0 ws0">MMC/SD</div><div class="t m1 x6b h14 y174 ffa fs8 fc0 sc0 ls0 ws0">(8b)</div><div class="t m1 x6b h14 y175 ffa fs8 fc0 sc0 ls0 ws0">(x2)</div><div class="t m1 x6c h14 y176 ffa fs8 fc0 sc0 ls0 ws0">SA<span class="_ _2a"></span>T<span class="_ _2a"></span>A</div><div class="t m1 x6d h14 y177 ffa fs8 fc0 sc0 ls0 ws0">Customizable Interface</div><div class="t m1 x6e h14 y178 ffa fs8 fc0 sc0 ls0 ws0">PRU Subsystem</div><div class="t m1 x6f h14 y179 ffa fs8 fc0 sc0 ls0 ws0">Memory</div><div class="t m1 x70 h14 y17a ffa fs8 fc0 sc0 ls0 ws0">Protection</div></div><div class="t m1 xa h7 y69 ff6 fs1 fc0 sc0 ls0 ws0">OMAP-L138</div><div class="t m5 xf hf y6a ff6 fs2 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m1 xb h8 y6a ff7 fs2 fc0 sc0 ls0 ws0">SPRS586I<span class="_ _1"> </span>–<span class="_ _2"></span>JUNE<span class="_ _3"> </span>2009<span class="_ _2"></span>–<span class="_ _2"></span>REVISED<span class="_ _3"> </span>SEPTEMBER<span class="_ _3"> </span>2014</div><div class="t m1 xf hb y6b ff6 fs5 fc0 sc0 ls0 ws0">1.4<span class="_ _7"> </span>Functional<span class="_ _1d"> </span>Block<span class="_ _1d"> </span>Diagram</div><div class="t m1 x1a hd y17b ff7 fs1 fc2 sc0 ls0 ws0">Figure<span class="_ _9"> </span>1-1<span class="_ _d"> </span><span class="fc0">shows<span class="_ _9"> </span>the<span class="_ _9"> </span>functional<span class="_ _9"> </span>block<span class="_ _9"> </span>diagram<span class="_ _9"> </span>of<span class="_ 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