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内容介绍
<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/625c8e8c92dc900e6249deb5/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c8e8c92dc900e6249deb5/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0"> <span class="_ _0"> </span><span class="fs2 fc1">www.cypress.com</span> <span class="_ _1"> </span>Document No. <span class="ls1">001</span>-<span class="ls1">19979</span> Rev. <span class="ls2">*E</span> <span class="_ _2"> </span>1 </div><div class="c x3 y3 w2 h4"><div class="t m0 x4 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">AN1042 </div></div><div class="c x3 y5 w2 h6"><div class="t m0 x5 h7 y6 ff2 fs4 fc2 sc0 ls0 ws0">Understanding S<span class="_ _3"></span>ynchronous FIFOs<span class="_ _3"></span> </div></div><div class="c x6 y7 w3 h8"><div class="t m0 x7 h9 y8 ff2 fs5 fc0 sc0 ls0 ws0">Au<span class="_ _3"></span>t<span class="_ _3"></span>h<span class="_ _3"></span>o<span class="_ _3"></span>r<span class="_ _3"></span>:<span class="_ _3"></span> <span class="_ _3"></span>C<span class="_ _3"></span>yp<span class="_ _3"></span>r<span class="_ _3"></span>e<span class="_ _3"></span>s<span class="_ _3"></span>s<span class="_ _3"></span> </div></div><div class="c x6 y9 w3 h8"><div class="t m0 x8 h9 y8 ff2 fs5 fc0 sc0 ls0 ws0">As<span class="_ _3"></span>s<span class="_ _3"></span>o<span class="_ _3"></span>c<span class="_ _3"></span>i<span class="_ _3"></span>a<span class="_ _3"></span>te<span class="_ _3"></span>d<span class="_ _3"></span> <span class="_ _3"></span>P<span class="_ _3"></span>a<span class="_ _3"></span>rt<span class="_ _3"></span> <span class="_ _3"></span>F<span class="_ _3"></span>a<span class="_ _3"></span>m<span class="_ _3"></span>il<span class="_ _4"></span>y<span class="_ _3"></span><span class="ls3">: </span><span class="fc1">CY<span class="_ _3"></span>7<span class="_ _3"></span>C<span class="_ _3"></span>4<span class="_ _3"></span>2<span class="_ _3"></span>x5<span class="_ _3"></span></span> <span class="_ _3"></span><span class="ls4">/ </span><span class="fc1">C<span class="_ _3"></span>Y<span class="_ _3"></span>7<span class="_ _3"></span>C<span class="_ _3"></span>4<span class="_ _3"></span>2<span class="_ _3"></span>x1<span class="_ _4"></span></span> </div></div><div class="c x3 y5 w2 h6"><div class="t m0 x5 ha ya ff2 fs6 fc0 sc0 ls0 ws0"> <span class="_ _5"> </span> </div></div><div class="c x6 yb w4 hb"><div class="t m0 x9 h3 yc ff1 fs2 fc0 sc0 ls0 ws0">AN1042 gi<span class="_ _3"></span>ves a <span class="_ _3"></span>brief introduction <span class="_ _3"></span>of the <span class="_ _3"></span>features and <span class="_ _3"></span>functionalities <span class="_ _3"></span>provided by s<span class="_ _3"></span>ynchrono<span class="_ _6"></span>us <span class="_ _3"></span>FIFOs. The ap<span class="_ _3"></span>plic<span class="_ _6"></span>ation </div><div class="t m0 x9 h3 yd ff1 fs2 fc0 sc0 ls0 ws0">note also discusses width and depth ex<span class="_ _6"></span>pansion of synchronous FIFOs<span class="_ _3"></span>. </div></div><div class="t m0 xa h3 ye ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 x6 h7 yf ff2 fs4 fc0 sc0 ls0 ws0">1 <span class="_ _7"> </span><span class="ls5">Introduction<span class="_ _3"></span></span> </div><div class="t m0 xa h3 y10 ff1 fs2 fc0 sc0 ls0 ws0">Synchronous <span class="_ _8"></span>FIFOs <span class="_ _4"></span>are<span class="_ _3"></span> <span class="_ _4"></span>the <span class="_ _8"></span>ideal <span class="_ _8"></span>choice <span class="_ _8"></span>for <span class="_ _4"></span>h<span class="_ _3"></span>igh-performance <span class="_ _8"></span>systems <span class="_ _4"></span>du<span class="_ _3"></span>e <span class="_ _4"></span>to <span class="_ _8"></span>high <span class="_ _8"></span>operating <span class="_ _4"></span>speed.<span class="_ _3"></span> <span class="_ _8"></span>Synchronous </div><div class="t m0 xa h3 y11 ff1 fs2 fc0 sc0 ls0 ws0">FIFOs <span class="_ _8"></span>also <span class="_ _9"> </span>offer <span class="_ _8"></span>many <span class="_ _8"></span>oth<span class="_ _3"></span>er <span class="_ _8"></span>advantages <span class="_ _8"></span>that <span class="_ _8"></span>improve <span class="_ _9"> </span>system <span class="_ _8"></span>performance <span class="_ _8"></span>and <span class="_ _9"> </span>reduce <span class="_ _9"> </span>comple<span class="_ _3"></span>x<span class="_ _6"></span>ity. <span class="_ _8"></span>These <span class="_ _9"> </span>include </div><div class="t m0 xa h3 y12 ff1 fs2 fc0 sc0 ls0 ws0">status flags: s<span class="_ _3"></span>ynchronous flags, half-full<span class="ls6">, <span class="_ _3"></span></span>programmable almost-empty and al<span class="_ _3"></span>most-full flags. These FIFOs <span class="_ _3"></span>also include </div><div class="t m0 xa h3 y13 ff1 fs2 fc0 sc0 ls0 ws0">features <span class="_ _4"></span>s<span class="_ _3"></span>uch <span class="_ _4"></span>as, <span class="_ _8"></span>width <span class="_ _4"></span>expansion, <span class="_ _8"></span>depth <span class="_ _8"></span>expansion, <span class="_ _4"></span>and <span class="_ _8"></span>retransmit. <span class="_ _4"></span>Synchronous <span class="_ _8"></span>FIFOs <span class="_ _4"></span>are <span class="_ _8"></span>easier <span class="_ _4"></span>to <span class="_ _8"></span>use <span class="_ _4"></span>at <span class="_ _8"></span>high </div><div class="t m0 xa h3 y14 ff1 fs2 fc0 sc0 ls0 ws0">speeds <span class="_ _3"></span>because<span class="_ _3"></span> <span class="_ _3"></span>they <span class="_ _3"></span>use <span class="_ _3"></span>free-running <span class="_ _3"></span>c<span class="_ _3"></span>locks <span class="_ _3"></span>to <span class="_ _3"></span>time <span class="_ _3"></span>internal <span class="_ _3"></span>operations <span class="_ _3"></span>whereas <span class="_ _8"></span>asynchronous <span class="_ _3"></span>FIFOs <span class="_ _3"></span>require <span class="_ _3"></span>rea<span class="_ _3"></span>d </div><div class="t m0 xa h3 y15 ff1 fs2 fc0 sc0 ls0 ws0">and write pulses to be generated without an external clock reference. </div><div class="t m0 x6 h7 y16 ff2 fs4 fc0 sc0 ls0 ws0">2 <span class="_ _7"> </span><span class="ls7">Scope</span> </div><div class="t m0 xa h3 y17 ff1 fs2 fc0 sc0 ls0 ws0">This <span class="_ _3"></span>application no<span class="_ _3"></span>t<span class="_ _6"></span>e <span class="_ _3"></span>gives <span class="_ _3"></span>an o<span class="_ _3"></span>verview<span class="_ _6"></span> <span class="_ _3"></span>of <span class="_ _3"></span>the architectu<span class="_ _3"></span>r<span class="_ _6"></span>e <span class="_ _3"></span>of s<span class="_ _3"></span>ynchronous <span class="_ _3"></span>FIFOs and <span class="_ _3"></span>discusses <span class="_ _3"></span>key features, <span class="_ _3"></span>usage </div><div class="t m0 xa h3 y18 ff1 fs2 fc0 sc0 ls0 ws0">guidelines, and typical applications. </div><div class="t m0 xa h3 y19 ff1 fs2 fc0 sc0 ls0 ws0">This <span class="_ _a"> </span>application <span class="_ _a"> </span>note <span class="_ _9"> </span>d<span class="_ _3"></span>oes <span class="_ _9"> </span>not <span class="_ _a"> </span>discuss <span class="_ _a"> </span>features <span class="_ _9"> </span>o<span class="_ _3"></span>f<span class="_ _6"></span> <span class="_ _a"> </span>individual <span class="_ _9"> </span>Cypress <span class="_ _b"> </span>sync <span class="_ _a"> </span>FIFO <span class="_ _9"> </span>de<span class="_ _3"></span>vi<span class="_ _6"></span>ces <span class="_ _9"> </span>but <span class="_ _a"> </span>provides <span class="_ _a"> </span>a <span class="_ _a"> </span>general </div><div class="t m0 xa h3 y1a ff1 fs2 fc0 sc0 ls0 ws0">overview. <span class="_ _9"> </span>For <span class="_ _a"> </span>info<span class="_ _3"></span>r<span class="_ _6"></span>mation <span class="_ _9"> </span>o<span class="_ _3"></span>n <span class="_ _9"> </span>individual <span class="_ _a"> </span>devices, <span class="_ _9"> </span>review <span class="_ _a"> </span>the <span class="_ _b"> </span>associated <span class="_ _a"> </span>device <span class="_ _9"> </span>datasheet <span class="_ _a"> </span><span class="ls8">on <span class="_ _a"> </span></span>the <span class="_ _a"> </span>Cypress <span class="_ _a"> </span>website </div><div class="t m0 xa h3 y1b ff1 fs2 fc0 sc0 ls0 ws0">(<span class="fc1">www.cypress.com</span>). </div><div class="t m0 x6 h7 y1c ff2 fs4 fc0 sc0 ls0 ws0">3 <span class="_ _7"> </span>Synchronous <span class="_ _c"></span>FIFO Architecture </div><div class="t m0 xa h3 y1d ff1 fs2 fc0 sc0 ls0 ws0">The <span class="_ _3"></span>basic <span class="_ _3"></span>building blocks <span class="_ _3"></span>of <span class="_ _3"></span>a s<span class="_ _3"></span>ynchronous FIFO <span class="_ _3"></span>are: <span class="_ _3"></span>memory array, <span class="_ _3"></span>flag <span class="_ _3"></span>logic, <span class="_ _3"></span>and <span class="_ _4"></span>expansion <span class="_ _3"></span>logic<span class="ls9">. <span class="_ _3"></span></span><span class="fc1">Figure 1</span> <span class="_ _3"></span>shows </div><div class="t m0 xa h3 y1e ff1 fs2 fc0 sc0 ls0 ws0">the <span class="_ _4"></span>logic <span class="_ _3"></span>block <span class="_ _4"></span>diagram <span class="_ _3"></span>of <span class="_ _4"></span>a <span class="_ _3"></span>synchron<span class="_ _3"></span>o<span class="_ _6"></span>us <span class="_ _3"></span>FIFO. <span class="_ _4"></span>The <span class="_ _3"></span>memo<span class="_ _3"></span>r<span class="_ _6"></span>y<span class="_ _3"></span> <span class="_ _3"></span>array <span class="_ _3"></span>is<span class="_ _3"></span> <span class="_ _3"></span>built <span class="_ _3"></span>from <span class="_ _4"></span>dual-port <span class="_ _3"></span>m<span class="_ _3"></span>emory <span class="_ _3"></span>cells. <span class="_ _3"></span>These <span class="_ _3"></span>c<span class="_ _3"></span>ell<span class="_ _6"></span>s </div><div class="t m0 xa h3 y1f ff1 fs2 fc0 sc0 ls8 ws0">allow<span class="ls0"> <span class="_ _4"></span>s<span class="_ _3"></span>imultaneous <span class="_ _4"></span>access <span class="_ _8"></span>between <span class="_ _8"></span>the <span class="_ _8"></span>write <span class="_ _8"></span>port <span class="_ _8"></span>and <span class="_ _8"></span>the <span class="_ _8"></span>read <span class="_ _8"></span>port. <span class="_ _8"></span>This <span class="_ _8"></span>simultaneous <span class="_ _4"></span>access <span class="_ _8"></span>gi<span class="_ _3"></span>ve<span class="_ _6"></span>s <span class="_ _8"></span>the <span class="_ _8"></span>FIFO <span class="_ _8"></span>its </span></div><div class="t m0 xa h3 y20 ff1 fs2 fc0 sc0 ls0 ws0">inherent <span class="_ _3"></span>synchronization <span class="_ _3"></span>prop<span class="_ _6"></span>erty. <span class="_ _3"></span>There <span class="_ _3"></span>are no <span class="_ _4"></span>timing <span class="_ _3"></span>or <span class="_ _3"></span>phase <span class="_ _3"></span>restrictions <span class="_ _3"></span>betw<span class="_ _6"></span>een <span class="_ _3"></span>accesses o<span class="_ _3"></span>f the <span class="_ _3"></span>two <span class="_ _3"></span>ports. <span class="_ _3"></span>This </div><div class="t m0 xa h3 y21 ff1 fs2 fc0 sc0 ls0 ws0">means <span class="_ _3"></span>that <span class="_ _4"></span>while <span class="_ _3"></span>one <span class="_ _3"></span>po<span class="_ _3"></span>rt <span class="_ _3"></span>writ<span class="ls8">es</span> <span class="_ _3"></span>to <span class="_ _3"></span>th<span class="_ _3"></span>e <span class="_ _3"></span>memory <span class="_ _3"></span>at <span class="_ _3"></span>one <span class="_ _3"></span>ra<span class="_ _3"></span>te, <span class="_ _3"></span>the <span class="_ _3"></span>other <span class="_ _3"></span>port <span class="_ _4"></span>can <span class="_ _3"></span>read <span class="_ _3"></span>at <span class="_ _4"></span>another <span class="_ _3"></span>rate<span class="_ _4"></span>, <span class="_ _3"></span>independent <span class="_ _3"></span>of </div><div class="t m0 xa h3 y22 ff1 fs2 fc0 sc0 ls0 ws0">one <span class="_ _3"></span>another. This <span class="_ _3"></span>also enables <span class="_ _3"></span>optimization of <span class="_ _3"></span>the <span class="_ _3"></span>speed at which <span class="_ _3"></span>data <span class="_ _3"></span>is written <span class="_ _3"></span>to a<span class="_ _3"></span>nd read <span class="_ _3"></span>from the <span class="_ _3"></span>memory array. </div><div class="t m0 xa h3 y23 ff1 fs2 fc0 sc0 ls0 ws0">Cypress <span class="_ _4"></span>offers <span class="_ _4"></span>the <span class="_ _4"></span>synch<span class="_ _3"></span>ro<span class="_ _6"></span>nous <span class="_ _4"></span>FIFO <span class="_ _4"></span>CY7C42x5 <span class="_ _8"></span>in <span class="_ _4"></span>x9 <span class="_ _4"></span>&amp; <span class="_ _4"></span>CY7C42<span class="_ _3"></span>x<span class="_ _6"></span>5 <span class="_ _3"></span>i<span class="_ _3"></span>n <span class="_ _4"></span>x18 <span class="_ _3"></span>bi<span class="_ _3"></span>t <span class="_ _4"></span>width. <span class="_ _4"></span>Both <span class="_ _4"></span>provide <span class="_ _8"></span>a <span class="_ _4"></span>high <span class="_ _4"></span>speed <span class="_ _4"></span>of </div><div class="t m0 xa h3 y24 ff1 fs2 fc0 sc0 ls8 ws0">66<span class="ls0"> MHz </span>and<span class="ls0"> </span>100<span class="ls0"> M<span class="_ _6"></span>Hz operation respectively. </span></div><div class="t m0 xa hc y25 ff1 fs6 fc0 sc0 ls0 ws0"> </div><div class="t m0 xa h3 y26 ff1 fs2 fc0 sc0 ls0 ws0">Data <span class="_ _3"></span>is <span class="_ _4"></span>steered <span class="_ _3"></span>into <span class="_ _3"></span>and <span class="_ _3"></span>ou<span class="_ _3"></span>t <span class="_ _3"></span>of <span class="_ _3"></span>the <span class="_ _3"></span>memory <span class="_ _3"></span>array <span class="_ _3"></span>by <span class="_ _3"></span>t<span class="_ _3"></span>w<span class="_ _6"></span>o <span class="_ _3"></span>pointers<span class="_ _3"></span>, <span class="_ _3"></span>a <span class="_ _3"></span>read <span class="_ _3"></span>address <span class="_ _3"></span>pointer <span class="_ _3"></span>and <span class="_ _3"></span>write <span class="_ _3"></span>ad<span class="_ _3"></span>dress <span class="_ _3"></span>pointer. </div><div class="t m0 xa h3 y27 ff1 fs2 fc0 sc0 ls0 ws0">After <span class="_ _8"></span>each <span class="_ _8"></span>operation, <span class="_ _8"></span>the <span class="_ _8"></span>respective <span class="_ _8"></span>pointer <span class="_ _4"></span>i<span class="_ _3"></span>s <span class="_ _4"></span>incremented <span class="_ _8"></span>to <span class="_ _8"></span>allow <span class="_ _8"></span>access <span class="_ _4"></span>to<span class="_ _3"></span> <span class="_ _4"></span>the <span class="_ _8"></span>next <span class="_ _8"></span>address <span class="_ _8"></span>sequentially <span class="_ _4"></span>i<span class="_ _3"></span>n <span class="_ _4"></span>the </div><div class="t m0 xa h3 y28 ff1 fs2 fc0 sc0 ls0 ws0">array. See the tutorial on <span class="fc1">synchronous FIFOs</span> for more information. </div><div class="t m0 xa h3 y29 ff1 fs2 fc0 sc0 ls0 ws0">The <span class="_ _3"></span>flag <span class="_ _4"></span>logic <span class="_ _4"></span>compares <span class="_ _4"></span>the <span class="_ _4"></span>value <span class="_ _3"></span>in <span class="_ _4"></span>each <span class="_ _4"></span>of <span class="_ _3"></span>the <span class="_ _4"></span>two <span class="_ _3"></span>a<span class="_ _3"></span>ddress <span class="_ _3"></span>pointers. <span class="_ _4"></span>If <span class="_ _3"></span>the <span class="_ _4"></span>difference <span class="_ _3"></span>between <span class="_ _4"></span>th<span class="_ _3"></span>e <span class="_ _4"></span>two <span class="_ _3"></span>poin<span class="_ _3"></span>ters <span class="_ _3"></span>is </div><div class="t m0 xa h3 y2a ff1 fs2 fc0 sc0 ls0 ws0">zero, the <span class="_ _3"></span>FIFO is <span class="_ _3"></span>empty and the <span class="_ _3"></span>empty flag <span class="_ _3"></span>is asserted. If <span class="_ _3"></span>the difference be<span class="_ _3"></span>tw<span class="_ _6"></span>een the<span class="_ _3"></span> two values i<span class="_ _3"></span>s equal to <span class="_ _3"></span>the depth </div><div class="t m0 xa h3 y2b ff1 fs2 fc0 sc0 ls0 ws0">of the part, the FIFO is full a<span class="_ _3"></span>nd<span class="_ _6"></span> the full fl<span class="_ _3"></span>ag is asserted. Other flags, such as half-fu<span class="_ _3"></span>ll, progra<span class="_ _6"></span>mmable almost-empt<span class="_ _3"></span>y an<span class="_ _6"></span>d </div><div class="t m0 xa h3 y2c ff1 fs2 fc0 sc0 ls0 ws0">programmable <span class="_ _b"> </span>almost-full <span class="_"> </span>fla<span class="_ _6"></span>gs, <span class="_ _b"> </span>are <span class="_"> </span>g<span class="_ _6"></span>enerated <span class="_ _b"> </span>by <span class="_ _b"> </span>the <span class="_ _b"> </span>same <span class="_"> </span>mean<span class="_ _6"></span>s. <span class="_ _b"> </span>The <span class="_ _b"> </span>programmable <span class="_ _b"> </span>flags <span class="_"> </span>are <span class="_ _a"> </span>generated <span class="_"> </span>by<span class="_ _6"></span> </div><div class="t m0 xa h3 y2d ff1 fs2 fc0 sc0 ls0 ws0">comparing the values programmed in an offset register w<span class="_ _6"></span>ith<span class="_ _3"></span> the number of words in the FIFO. </div><div class="t m0 xa h3 y2e ff1 fs2 fc0 sc0 ls0 ws0">Finally, <span class="_ _3"></span>expansion <span class="_ _3"></span>l<span class="_ _3"></span>ogic <span class="_ _3"></span>is <span class="_ _3"></span>used <span class="_ _3"></span>to <span class="_ _4"></span>create <span class="_ _3"></span>logically <span class="_ _4"></span>deeper <span class="_ _3"></span>FIFOs, <span class="_ _4"></span>by <span class="_ _3"></span>cascading <span class="_ _3"></span>multiple <span class="_ _4"></span>parts <span class="_ _3"></span>in <span class="_ _3"></span>d<span class="_ _3"></span>epth <span class="_ _3"></span>expansion. <span class="_ _3"></span>In </div><div class="t m0 xa h3 y2f ff1 fs2 fc0 sc0 ls0 ws0">the <span class="_ _8"></span><span class="ff3">normal <span class="_ _9"> </span>&#8220;non</span>-<span class="ff3">depth <span class="_ _8"></span>cascading&#8221; <span class="_ _8"> </span>operation, <span class="_ _8"> </span>each <span class="_ _8"> </span>of <span class="_ _9"> </span>the <span class="_ _4"></span>add<span class="_ _3"></span>re<span class="_ _6"></span>ss <span class="_ _8"> </span>pointers <span class="_ _8"> </span>wrap<span class="_ _3"></span><span class="ff1">s <span class="_ _8"></span>back <span class="_ _8"></span>to <span class="_ _9"> </span>zero <span class="_ _8"></span>when <span class="_ _8"></span><span class="lsa">it</span> <span class="_ _8"></span>re<span class="_ _3"></span>ach<span class="lsb">es</span> <span class="_ _8"></span>its </span></span></div><div class="t m0 xa h3 y30 ff1 fs2 fc0 sc0 ls0 ws0">maximum <span class="_ _9"> </span>value. <span class="_ _9"> </span>In<span class="_ _3"></span> <span class="_ _9"> </span>the <span class="_ _9"> </span>depth <span class="_ _9"> </span>expansion <span class="_ _9"> </span>mode, <span class="_ _9"> </span>when <span class="_ _9"> </span>an <span class="_ _9"> </span>a<span class="_ _3"></span>ddress <span class="_ _9"> </span>pointer <span class="_ _9"> </span>reaches <span class="_ _9"> </span>its <span class="_ _9"> </span>maximum <span class="_ _9"> </span>value, <span class="_ _a"> </span>a <span class="_ _9"> </span>pulse <span class="_ _9"> </span>is </div><div class="t m0 xa h3 y31 ff1 fs2 fc0 sc0 ls0 ws0">driven <span class="_ _8"></span>to <span class="_ _8"></span>an <span class="_ _4"></span>e<span class="_ _3"></span>x<span class="_ _6"></span>pansion <span class="_ _8"></span>pin, <span class="_ _8"></span>which<span class="_ _3"></span> <span class="_ _4"></span>passes <span class="_ _8"></span>a <span class="_ _8"></span>token <span class="_ _8"></span>to <span class="_ _4"></span>an<span class="_ _3"></span>oth<span class="_ _6"></span>er <span class="_ _4"></span>FI<span class="_ _3"></span>FO. <span class="_ _8"></span>After <span class="_ _8"></span>the <span class="_ _8"></span>token <span class="_ _4"></span>i<span class="_ _3"></span>s <span class="_ _4"></span>passed, <span class="_ _8"></span>the <span class="_ _8"></span>address <span class="_ _8"></span>pointer </div><div class="t m0 xa h3 y32 ff1 fs2 fc0 sc0 ls0 ws0">does <span class="_ _8"></span>not <span class="_ _4"></span>increment <span class="_ _8"></span>until <span class="_ _8"></span>the <span class="_ _4"></span>token <span class="_ _8"></span>returns. <span class="_ _8"></span>Essentially, <span class="_ _8"></span>the <span class="_ _4"></span>resp<span class="_ _3"></span>o<span class="_ _6"></span>nsibility <span class="_ _4"></span>fo<span class="_ _3"></span>r <span class="_ _4"></span>handling <span class="_ _8"></span>the <span class="_ _4"></span>write <span class="_ _8"></span>or <span class="_ _4"></span>rea<span class="_ _3"></span>d <span class="_ _4"></span>operation <span class="_ _8"></span>is </div><div class="t m0 xa h3 y33 ff1 fs2 fc0 sc0 ls0 ws0">passed <span class="_"> </span>to <span class="_ _a"> </span>another <span class="_"> </span>device. <span class="_ _b"> </span>At <span class="_ _b"> </span>any <span class="_ _b"> </span>given <span class="_"> </span>time, <span class="_"> </span>only <span class="_ _a"> </span>o<span class="_ _3"></span>ne <span class="_ _a"> </span>FI<span class="_ _3"></span>FO <span class="_ _b"> </span>in <span class="_ _b"> </span>a <span class="_"> </span>depth <span class="_ _b"> </span>expansion <span class="_ _b"> </span>configuration <span class="_ _b"> </span>handl<span class="_ _3"></span><span class="lsb">es</span> <span class="_"> </span>read<span class="_ _6"></span> </div><div class="t m0 xa h3 y34 ff1 fs2 fc0 sc0 ls0 ws0">operations <span class="_ _3"></span>a<span class="_ _3"></span>nd <span class="_ _3"></span>only <span class="_ _4"></span>one <span class="_ _4"></span>handl<span class="ls8">es</span> <span class="_ _4"></span>write <span class="_ _3"></span>op<span class="_ _3"></span>erations. W<span class="_ _3"></span>hen <span class="_ _4"></span>the <span class="_ _3"></span>tok<span class="_ _3"></span>en <span class="_ _3"></span>retur<span class="_ _3"></span><span class="ls8">ns<span class="_ _6"></span><span class="ls0">, <span class="_ _3"></span>th<span class="_ _3"></span>e <span class="_ _3"></span>address <span class="_ _3"></span>po<span class="_ _3"></span>inter <span class="_ _3"></span>is <span class="_ _4"></span>reset <span class="_ _3"></span>to <span class="_ _4"></span>zero <span class="_ _4"></span>and </span></span></div><div class="t m0 xa h3 y35 ff1 fs2 fc0 sc0 ls0 ws0">the operation resumes. </div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>
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