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ADV7511 Hardware Users Guide

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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h3 y2 ff2 fs0 fc0 sc0 ls1 ws1">Page 1</div><div class="t m0 x2 h4 y3 ff3 fs1 fc0 sc0 ls2 ws2"> of 58<span class="ff4 fs0 ls0 ws0"> </span></div><div class="t m0 x3 h5 y4 ff3 fs1 fc0 sc0 ls3 ws3">Rev D</div><div class="t m0 x1 h6 y5 ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y6 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h7 y7 ff5 fs3 fc0 sc1 ls0 ws0"> </div><div class="t m0 x4 h8 y8 ff2 fs4 fc0 sc0 ls0 ws0"> </div><div class="t m0 x5 h8 y9 ff2 fs4 fc0 sc0 ls4 ws0">ADV7511</div><div class="t m0 x6 h9 ya ff2 fs5 fc0 sc0 ls0 ws0"> </div><div class="t m0 x7 ha yb ff2 fs6 fc0 sc0 ls5 ws3">Low-Power HDMI<span class="ff6 ls0 ws0">®</span> Transmitter </div><div class="t m0 x8 ha yc ff2 fs6 fc0 sc0 ls5 ws4">with Audio Return Channel </div><div class="t m0 x9 hb yd ff2 fs7 fc0 sc0 ls0 ws0"> </div><div class="t m0 xa hb ye ff2 fs7 fc0 sc0 ls6 ws5">HARDWARE USER’S </div><div class="t m0 xb hb yf ff2 fs7 fc0 sc0 ls7 ws0">GUIDE </div><div class="t m0 x9 hb y10 ff2 fs7 fc0 sc0 ls0 ws0"> </div><div class="t m0 xc hc y11 ff2 fs8 fc0 sc0 ls8 ws6">- Revision D – </div><div class="t m0 x9 hc y12 ff2 fs8 fc0 sc0 ls0 ws0"> </div><div class="t m0 xd hc y13 ff2 fs8 fc0 sc0 ls9 ws7">July 2011 </div><div class="t m0 xe hd y14 ff7 fs9 fc0 sc0 lsa ws0"> <span class="_ _0"></span> <span class="_ _1"> </span> </div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>

<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/bg2.jpg"><div class="t m0 xf he y15 ff4 fsa fc0 sc0 lsb ws8">ADV7511 <span class="_ _2"> </span>HARDWARE USER’S GUIDE</div><div class="t m0 xf he y16 ff4 fsa fc0 sc0 lsc ws9"> Rev.D</div><div class="t m0 xf h2 y17 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h3 y18 ff2 fs0 fc0 sc0 ls1 ws1">Page 2</div><div class="t m0 x10 h4 y3 ff3 fs1 fc0 sc0 ls2 ws2"> of 58<span class="ff4 fs0 ls0 ws0"> </span></div><div class="t m0 x11 h5 y4 ff3 fs1 fc0 sc0 ls3 ws3">Rev D</div><div class="t m0 xf h6 y5 ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h2 y6 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf he y19 ff4 fsa fc0 sc0 lsd wsa">REVISION HISTOR<span class="_ _3"></span>Y </div><div class="t m0 xf h2 y1a ff1 fs0 fc0 sc0 lse wsb">2/10Rev 0 </div><div class="t m0 xf h2 y1b ff1 fs0 fc0 sc0 lsf wsc">5/10 Rev A <span class="_ _4"> </span> </div><div class="t m0 xf h2 y1c ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf hf y1d ff8 fs0 fc0 sc0 ls10 wsd">Section Change <span class="_ _5"></span>Description </div><div class="t m0 xf h2 y1e ff1 fs0 fc0 sc0 ls1 wse"> <span class="_ _6"> </span>Throughout document S/PDIF to SPDIF for consistency </div><div class="t m0 xf h10 y1f ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs0 ls11 wsf">Section 4:<span class="ls0 ws0"> <span class="_ _8"> </span><span class="ffa fsb"> <span class="_ _7"></span><span class="ff1 fs0 ls11 wsf">Table 1<span class="ls12 ws10"> – under DIGITAL OUTPUTS, l<span class="_ _3"></span>isted SPDIF_OUT referenced to <span class="_ _3"></span>3.3V MVDD </span></span></span></span></span></div><div class="t m0 xf h11 y20 ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs0 ls11 wsf">Section 5:<span class="ls0 ws0"> <span class="_ _8"> </span><span class="ff9 fsb"> <span class="_ _7"></span><span class="ff1 fs0 ls13 ws11">Figure 6 - <span class="ls14 ws12">Changed DVDD_3V to MVDD </span></span></span></span></span></div><div class="t m0 xf h12 y21 ff9 fs0 fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 ls15 ws13">Section 5<span class="ls16 ws0">: <span class="_ _9"> </span><span class="ffa ls0"> <span class="_ _7"></span><span class="ff1 ls11 wsf">Table 3<span class="ws14"> – Add description to SPDIF_OUT showing it to be 3.3V logic </span></span></span></span></span></div><div class="t m0 xf h11 y22 ff1 fs0 fc0 sc0 ls17 ws0">Section<span class="ls0"> <span class="ff9 fsb"> <span class="_ _7"></span><span class="ff1 fs0 lsf">6.1.3<span class="ls0"> </span></span></span></span></div><div class="t m0 x12 h2 y23 ff1 fs0 fc0 sc0 lse wsb">Edited to add mention of AES3 support </div><div class="t m0 xf h11 y24 ff1 fs0 fc0 sc0 ls15 ws0">Section <span class="ff9 fsb ls0"> <span class="_ _7"></span><span class="ff1 fs0 lsf">6.1.3.3<span class="ls0"> </span></span></span></div><div class="t m0 x12 h2 y25 ff1 fs0 fc0 sc0 ls0 ws15">Expanded description of MC<span class="ls13 ws11">LK internal ge<span class="_ _3"></span>neration </span></div><div class="t m0 xf h11 y26 ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs0 ls11 wsf">Section 6.2.1<span class="ls0 ws0"> </span></span></div><div class="t m0 x12 h2 y27 ff1 fs0 fc0 sc0 lse wsb">Edited to indicate that SPDIF_OUT is 3.3V logic level. </div><div class="t m0 xf h11 y28 ff1 fs0 fc0 sc0 ls17 ws0">Section<span class="ls0"> <span class="ff9 fsb"> <span class="_ _7"></span><span class="ff1 fs0 lsf">6.8<span class="ls0"> </span></span></span></span></div><div class="t m0 x12 h2 y29 ff1 fs0 fc0 sc0 ls12 ws16">Moved Power Supply Domain figure to this section.<span class="ws10"> Edited description to <span class="_ _3"></span>add PVDD, BGVDD and PLVDD. </span></div><div class="t m0 xf h11 y2a ff1 fs0 fc0 sc0 ls15 ws0">Section <span class="ff9 fsb ls0"> <span class="_ _7"></span><span class="ff1 fs0 lsf">6.8.2<span class="ls0"> </span></span></span></div><div class="t m0 x12 h2 y2b ff1 fs0 fc0 sc0 ls18 ws14">Edited to explain SPDIF high pow<span class="_ _3"></span>er and low power </div><div class="t m0 xf h11 y2c ff1 fs0 fc0 sc0 ls15 ws0">Section <span class="ff9 fsb ls0"> <span class="_ _7"></span><span class="ff1 fs0 lsf">7.4<span class="lse">, </span></span></span></div><div class="t m0 xf h2 y2d ff1 fs0 fc0 sc0 ls15 ws0">Section </div><div class="t m0 x13 h11 y2e ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs0 lsf">7.5<span class="ls0"> </span></span></div><div class="t m0 x12 h2 y2f ff1 fs0 fc0 sc0 ls18 ws14">Added text to show that both pins require <span class="_ _3"></span>pull up. </div><div class="t m0 xf h10 y30 ff1 fs0 fc0 sc0 ls15 ws0">Section <span class="ff9 fsb ls0"> <span class="_ _7"></span><span class="ff1 fs0 lsf">7.7<span class="ls0"> <span class="_ _a"> </span><span class="ffa fsb"> <span class="_ _7"></span><span class="ff1 fs0 ls12 ws10">Figure 26 – edited to correct CEC <span class="_ _3"></span>pin name. </span></span></span></span></span></div><div class="t m0 xf h2 y31 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h2 y32 ff1 fs0 fc0 sc0 ls19 ws17">Rev B 8/10 </div><div class="t m0 xf h13 y33 ff1 fs1 fc0 sc0 ls1a ws18">Section Change <span class="_ _b"></span>Description </div><div class="t m0 xf h13 y34 ff1 fs1 fc0 sc0 ls1b ws5">Front page<span class="ls0 ws0"> </span></div><div class="t m0 x12 h14 y35 ff1 fs1 fc0 sc0 ls7 ws0">Add <span class="ffb fs3 ls0">®<span class="ffc"><span class="ff1 ws19">after HDMI; remove reference to HDMI revision</span></span></span><span class="ls0"> </span></div><div class="t m0 xf h11 y36 ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs1 ls1c ws1a">Last page<span class="ls0 ws0"> </span></span></div><div class="t m0 x12 h13 y37 ff1 fs1 fc0 sc0 ls1d ws1b">Add statement regarding I2C, Philips, NXT and HDMI </div><div class="t m0 xf h2 y38 ff1 fs0 fc0 sc0 ls1e ws1c">Rev C 3/11 </div><div class="t m0 xf h13 y39 ff1 fs1 fc0 sc0 ls1a ws18">Section Change <span class="_ _b"></span>Description </div><div class="t m0 xf h13 y3a ff1 fs1 fc0 sc0 ls0 ws1d">All document<span class="ls1d ws1b"> <span class="_ _c"> </span>Removed ADI Confidential reference </span></div><div class="t m0 xf h13 y3b ff1 fs1 fc0 sc0 ls1f ws1e">Table 1<span class="ls1b ws5"> <span class="_ _d"> </span>Added footnote to setup and hold times </span></div><div class="t m0 xf h2 y3c ff1 fs0 fc0 sc0 ls11 wsf">Rev D 7/11 </div><div class="t m0 xf h13 y3d ff1 fs1 fc0 sc0 ls1a ws18">Section Change <span class="_ _b"></span>Description </div><div class="t m0 xf h11 y3e ff9 fsb fc0 sc0 ls0 ws0"> <span class="_ _7"></span><span class="ff1 fs1 ls1b ws5">Figure 19<span class="ls0 ws0"> </span></span></div><div class="t m0 x12 h13 y3f ff1 fs1 fc0 sc0 ls2 ws1f">Corrected Mux select bit table </div><div class="t m0 xf h2 y40 ff1 fs0 fc0 sc0 ls0 ws0"> </div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" 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<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/bg3.jpg"><div class="t m0 x1 he y41 ff4 fsa fc0 sc0 lsb ws8">ADV7511 <span class="_ _2"> </span>HARDWARE USER’S GUIDE</div><div class="t m0 x1 he y42 ff4 fsa fc0 sc0 ls20 ws20"> Rev. <span class="_ _e"></span>D</div><div class="t m0 x1 h2 y17 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h3 y18 ff2 fs0 fc0 sc0 ls1 ws1">Page 3</div><div class="t m0 x2 h4 y3 ff3 fs1 fc0 sc0 ls2 ws2"> of 58<span class="ff4 fs0 ls0 ws0"> </span></div><div class="t m0 x3 h5 y4 ff3 fs1 fc0 sc0 ls3 ws3">Rev D</div><div class="t m0 x1 h6 y5 ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y6 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 he y19 ff4 fsa fc0 sc0 ls21 ws21">T<span class="_ _3"></span>ABLE OF CONTENTS </div><div class="t m0 x1 h2 y1a ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y43 ff1 fs0 fc0 sc0 lse wsb">Section 1: Introduction <span class="_ _f"></span>.......................................................................................................<span class="ws0">.................................................................................. <span class="_ _f"></span><span class="ls0">7</span></span></div><div class="t m0 x14 h15 y44 ffd fsb fc0 sc0 ls0 ws0"></div><div class="t m0 x1 h15 y45 ff1 fs0 fc0 sc0 lsf ws0">1.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Scope and Organization <span class="_ _11"></span>........................................................................................................<span class="ws0">............................................................... <span class="_ _11"></span><span class="ls0">7<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y46 ff1 fs0 fc0 sc0 lsf ws0">1.1.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse ws22">Links .........................................................................................................................<span class="ws0">....................................................................... <span class="_ _f"></span><span class="ls0">7<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y47 ff1 fs0 fc0 sc0 lsf ws0">1.1.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse ws23">Symbols .......................................................................................................................<span class="ws0">.................................................................... <span class="_ _f"></span><span class="ls0">7<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y48 ff1 fs0 fc0 sc0 lsf ws0">1.1.3<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Format Standards <span class="_ _12"></span>..............................................................................................................<span class="ws0">............................................................. <span class="_ _11"></span><span class="ls0">7<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y49 ff1 fs0 fc0 sc0 lsf ws0">1.2<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse ws24">Overview ......................................................................................................................<span class="ws0">.......................................................................... <span class="_ _11"></span><span class="ls0">8<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y4a ff1 fs0 fc0 sc0 lsf ws0">1.3<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Hardware Features <span class="_ _12"></span>.............................................................................................................<span class="ws0">................................................................... <span class="_ _f"></span><span class="ls0">8<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y4b ff1 fs0 fc0 sc0 lsf ws0">1.4<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Supported Input Formats <span class="_ _13"></span>.......................................................................................................<span class="ws0">............................................................. <span class="_ _f"></span><span class="ls0">8<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y4c ff1 fs0 fc0 sc0 lsf ws0">1.5<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls11 wsf">Supported Output Formats <span class="_ _13"></span>......................................................................................................<span class="lse ws0">........................................................... <span class="_ _11"></span><span class="ls0">8<span class="ffd fsb"></span></span></span></span></div><div class="t m0 x1 h15 y4d ff1 fs0 fc0 sc0 lse ws25">Section 2: Reference Documents <span class="_ _f"></span>................................................................................................<span class="ws0">....................................................................... <span class="_ _11"></span><span class="ls1">10<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y4e ff1 fs0 fc0 sc0 lsf ws0">2.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">ADI Documents <span class="_ _f"></span>.................................................................................................................<span class="ws0">................................................................. <span class="_ _11"></span><span class="ls1">10<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4f ff1 fs0 fc0 sc0 lsf ws0">2.2<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls11 wsf">Industry Specifications <span class="_ _12"></span>.......................................................................................................<span class="lse ws0">................................................................ <span class="_ _11"></span><span class="ls1">10<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y50 ff1 fs0 fc0 sc0 lse wsb">Section 3: Block diagram <span class="_ _13"></span>......................................................................................................<span class="ws0">.............................................................................. <span class="_ _11"></span><span class="ls1">11<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y51 ff1 fs0 fc0 sc0 lse wsb">Section 4: Specifications......................................................................................................<span class="ws0">................................................................................ <span class="_ _11"></span><span class="ls1">12<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y52 ff1 fs0 fc0 sc0 lsf ws0">4.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws11">Explanation of Test Levels <span class="_ _11"></span>....................................................................................................<span class="_ _14"></span><span class="lse ws0">............................................................. <span class="_ _11"></span><span class="ls1">17<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y53 ff1 fs0 fc0 sc0 lsf ws0">4.2<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls11 wsf">ESD Caution <span class="_ _f"></span>...................................................................................................................<span class="lse ws0">..................................................................... <span class="_ _11"></span><span class="ls1">17<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y54 ff1 fs0 fc0 sc0 lse ws25">Section 5: Pin and package information <span class="_ _12"></span>........................................................................................<span class="_ _14"></span><span class="ws0">................................................................... <span class="_ _12"></span><span class="ls1">18<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y55 ff1 fs0 fc0 sc0 lsf ws0">5.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls1e ws1c">Mechanical Drawings an<span class="lse wsb">d Outline Dimensions <span class="_ _3"></span>....................................................................................<span class="ws0">........................................ <span class="_ _11"></span><span class="ls1">21<span class="ffd fsb ls0"></span></span></span></span></span></div><div class="t m0 x1 h15 y56 ff1 fs0 fc0 sc0 lse wsb">Section 6: Functional Description <span class="_ _11"></span>.............................................................................................<span class="ws0">........................................................................ <span class="_ _11"></span><span class="ls1">22<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y57 ff1 fs0 fc0 sc0 lsf ws0">6.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Input Connections <span class="_ _11"></span>.............................................................................................................<span class="ws0">................................................................. <span class="_ _11"></span><span class="ls1">22<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y58 ff1 fs0 fc0 sc0 lsf ws0">6.1.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">Unused Inputs <span class="_ _f"></span>.................................................................................................................<span class="lse ws0">............................................................. <span class="_ _12"></span><span class="ls1">22<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y59 ff1 fs0 fc0 sc0 lsf ws0">6.1.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls13 ws11">Video Data Capture Block <span class="_ _11"></span>......................................................................................................<span class="lse ws0">.................................................... <span class="_ _11"></span><span class="ls1">22<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5a ff1 fs0 fc0 sc0 lsf ws0">6.1.2.1<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="lse wsb">Video Input Connections <span class="_ _13"></span>.......................................................................................................<span class="ws0">............................................ <span class="_ _11"></span><span class="ls1">22<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5b ff1 fs0 fc0 sc0 lsf ws0">6.1.3<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls13 ws11">Audio Data Capture Block ......................................................................................................</span><span class="lse">................................................... <span class="_ _12"></span><span class="ls1">35<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 x1 h15 y5c ff1 fs0 fc0 sc0 lsf ws0">6.1.3.1<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="lse wsb">Supported Audio Input Format and Implementation <span class="_ _12"></span>...............................................................................<span class="ws0">..................... <span class="_ _12"></span><span class="ls1">36<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5d ff1 fs0 fc0 sc0 lsf ws0">6.1.3.2<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="ls11 wsf">Inter-IC Sound (I2S) Audio <span class="_ _13"></span>....................................................................................................<span class="lse ws0">........................................... <span class="_ _11"></span><span class="ls1">37<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5e ff1 fs0 fc0 sc0 lsf ws0">6.1.3.3<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="ls13 ws11">Sony/Philips Digital Interface (SPDIF) <span class="_ _12"></span>........................................................................................<span class="lse ws0">..................................... <span class="_ _11"></span><span class="ls1">39<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5f ff1 fs0 fc0 sc0 lsf ws0">6.1.3.4<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="ls11 wsf">DSD Audio <span class="_ _12"></span>.....................................................................................................................<span class="lse ws0">....................................................... <span class="_ _11"></span><span class="ls1">39<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y60 ff1 fs0 fc0 sc0 lsf ws0">6.1.3.5<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="lse wsb">HBR Audio......................................................................................................................<span class="ws0">...................................................... <span class="_ _11"></span><span class="ls1">39<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y61 ff1 fs0 fc0 sc0 lsf ws0">6.1.3.6<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="lse wsb">DST Audio <span class="_ _13"></span>.....................................................................................................................<span class="ws0">....................................................... <span class="_ _12"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y62 ff1 fs0 fc0 sc0 lsf ws0">6.1.4<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Hot Plug Detect (HPD) pin <span class="_ _11"></span>.....................................................................................................<span class="ws0">................................................... <span class="_ _11"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y63 ff1 fs0 fc0 sc0 lsf ws0">6.1.5<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls13 ws11">Power Down / I2C Address (PD/AD) <span class="_ _13"></span>..............................................................................................<span class="_ _14"></span><span class="lse ws0">........................................ <span class="_ _12"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y64 ff1 fs0 fc0 sc0 lsf ws0">6.1.6<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Input Voltage Tolerance <span class="_ _f"></span>.......................................................................................................<span class="_ _14"></span><span class="ws0">...................................................... <span class="_ _12"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y65 ff1 fs0 fc0 sc0 lsf ws0">6.2<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Audio Return Channel (ARC) <span class="_ _16"></span>....................................................................................................<span class="ws0">...................................................... <span class="_ _11"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y66 ff1 fs0 fc0 sc0 lsf ws0">6.2.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">ARC Configuration <span class="_ _3"></span>.............................................................................................................<span class="ws0">........................................................ <span class="_ _11"></span><span class="ls1">40<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y67 ff1 fs0 fc0 sc0 lsf ws0">6.3<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Output Connections <span class="_ _11"></span>............................................................................................................<span class="ws0">............................................................... <span class="_ _11"></span><span class="ls1">41<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y68 ff1 fs0 fc0 sc0 lsf ws0">6.3.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Output Formats Supported <span class="_ _16"></span>......................................................................................................<span class="_ _14"></span><span class="ws0">.................................................. <span class="_ _12"></span><span class="ls1">41<span class="ffd fsb ls0"></span></span></span></span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' 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<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/bg4.jpg"><div class="t m0 xf he y15 ff4 fsa fc0 sc0 lsb ws8">ADV7511 <span class="_ _2"> </span>HARDWARE USER’S GUIDE</div><div class="t m0 xf he y16 ff4 fsa fc0 sc0 lsc ws9"> Rev.D</div><div class="t m0 xf h2 y17 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h3 y18 ff2 fs0 fc0 sc0 ls1 ws1">Page 4</div><div class="t m0 x10 h4 y3 ff3 fs1 fc0 sc0 ls2 ws2"> of 58<span class="ff4 fs0 ls0 ws0"> </span></div><div class="t m0 x11 h5 y4 ff3 fs1 fc0 sc0 ls3 ws3">Rev D</div><div class="t m0 xf h6 y5 ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h2 y6 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 xf h2 y69 ff1 fs0 fc0 sc0 lsf ws0">6.3.2</div><div class="t m0 x15 h15 y6a ffd fsb fc0 sc0 ls0 ws0"><span class="_ _a"> </span><span class="ff1 fs0 lse ws25">TMDS Outputs <span class="_ _12"></span>..................................................................................................................<span class="ws0">........................................................... <span class="_ _f"></span><span class="ls1">41<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y6b ff1 fs0 fc0 sc0 lsf ws0">6.3.2.1<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="ls11 wsf">ESD Protection <span class="_ _11"></span>................................................................................................................<span class="lse ws0">..................................................... <span class="_ _11"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y6c ff1 fs0 fc0 sc0 lsf ws0">6.3.2.2<span class="ffd fsb ls0"><span class="_ _15"> </span></span><span class="lse wsb">EMI Prevention <span class="_ _11"></span>................................................................................................................<span class="ws0">.................................................... <span class="_ _f"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y6d ff1 fs0 fc0 sc0 lsf ws0">6.3.3<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">Display Data Channel (DDC) pins <span class="_ _3"></span>...............................................................................................<span class="lse ws0">............................................ <span class="_ _11"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y6e ff1 fs0 fc0 sc0 lsf ws0">6.3.4<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse ws25">Interrupt Output (INT) <span class="_ _3"></span>........................................................................................................<span class="ws0">...................................................... <span class="_ _f"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y6f ff1 fs0 fc0 sc0 lsf ws0">6.3.5<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">PLL Circuit ...................................................................................................................</span><span class="lse">................................................................ <span class="_ _11"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 xf h15 y70 ff1 fs0 fc0 sc0 lsf ws0">6.4<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws26">Consumer Electronic Control (CEC) <span class="_ _3"></span>.............................................................................................<span class="lse ws0">................................................. <span class="_ _f"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y71 ff1 fs0 fc0 sc0 lsf ws0">6.4.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">Unused Inputs <span class="_ _11"></span>.................................................................................................................<span class="lse ws0">............................................................. <span class="_ _11"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y72 ff1 fs0 fc0 sc0 lsf ws0">6.4.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">CEC Function <span class="_ _12"></span>..................................................................................................................<span class="ws0">............................................................. <span class="_ _f"></span><span class="ls1">42<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y73 ff1 fs0 fc0 sc0 lsf ws0">6.5<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Video Data Formatting <span class="_ _f"></span>.........................................................................................................<span class="ws0">............................................................. <span class="_ _11"></span><span class="ls1">43<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y74 ff1 fs0 fc0 sc0 lsf ws0">6.5.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">DE, Hsync and Vsync Generation <span class="_ _17"></span>................................................................................................<span class="lse ws0">............................................. <span class="_ _11"></span><span class="ls1">44<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y75 ff1 fs0 fc0 sc0 lsf ws0">6.5.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Color Space Conversion (CSC) Matrix <span class="_ _3"></span>...........................................................................................<span class="ws0">......................................... <span class="_ _11"></span><span class="ls1">45<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y76 ff1 fs0 fc0 sc0 lsf ws0">6.5.3<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls1e ws1c">4:2:2 to 4:4:4 and 4:4:4 to 4:2:2 Conversion Block <span class="_ _17"></span>............................................................................<span class="_ _14"></span><span class="lse ws0">....................................... <span class="_ _11"></span><span class="ls1">46<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y77 ff1 fs0 fc0 sc0 lsf ws0">6.6<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse ws25">DDC Controller <span class="_ _13"></span>................................................................................................................<span class="ws0">.................................................................. <span class="_ _f"></span><span class="ls1">46<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y78 ff1 fs0 fc0 sc0 lsf ws0">6.7<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws11">Inter-IC Communications (I2C) <span class="_ _f"></span>.................................................................................................<span class="lse ws0">..................................................... <span class="_ _f"></span><span class="ls1">47<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y79 ff1 fs0 fc0 sc0 lsf ws0">6.7.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Two-Wire Serial Control Port <span class="_ _13"></span>..................................................................................................<span class="ws0">................................................. <span class="_ _f"></span><span class="ls1">47<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y7a ff1 fs0 fc0 sc0 lsf ws0">6.7.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls13 ws11">Data Transfer via I2C <span class="_ _f"></span>.........................................................................................................<span class="lse ws0">......................................................... <span class="_ _11"></span><span class="ls1">48<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y7b ff1 fs0 fc0 sc0 lsf ws0">6.7.3<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">Serial Interface Read/Write Examples <span class="_ _f"></span>..........................................................................................<span class="lse ws0">............................................ <span class="_ _f"></span><span class="ls1">49<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y7c ff1 fs0 fc0 sc0 lsf ws0">6.8<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Power Domains <span class="_ _12"></span>.................................................................................................................<span class="ws0">.................................................................. <span class="_ _f"></span><span class="ls1">50<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y7d ff1 fs0 fc0 sc0 lsf ws0">6.8.1<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="ls11 wsf">Power Supply Sequencing .......................................................................................................</span><span class="lse">................................................... <span class="_ _11"></span><span class="ls1">50<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 xf h15 y7e ff1 fs0 fc0 sc0 lsf ws0">6.8.2<span class="ffd fsb ls0"><span class="_ _a"> </span></span><span class="lse wsb">Power Consumption <span class="_ _13"></span>.............................................................................................................<span class="ws0">...................................................... <span class="_ _f"></span><span class="ls1">50<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y7f ff1 fs0 fc0 sc0 lse wsb">Section 7: PCB Layout Recommendations<span class="_ _3"></span> .........................................................................................<span class="ws0">............................................................. <span class="_ _11"></span><span class="ls1">52<span class="ffd fsb ls0"></span></span></span></div><div class="t m0 xf h15 y80 ff1 fs0 fc0 sc0 lsf ws0">7.1<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls11 wsf">Power Supply filtering <span class="_ _12"></span>........................................................................................................<span class="lse ws0">................................................................ <span class="_ _f"></span><span class="ls1">52<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y81 ff1 fs0 fc0 sc0 lsf ws0">7.2<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws11">Video Clock and Data Inputs <span class="_ _17"></span>...................................................................................................<span class="_ _14"></span><span class="lse ws0">......................................................... <span class="_ _11"></span><span class="ls1">53<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y82 ff1 fs0 fc0 sc0 lsf ws0">7.3<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">Audio Clock and Data Inputs <span class="_ _16"></span>...................................................................................................<span class="ws0">........................................................ <span class="_ _f"></span><span class="ls1">53<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y83 ff1 fs0 fc0 sc0 lsf ws0">7.4<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws11">SDA and SCL <span class="_ _11"></span>...................................................................................................................<span class="lse ws0">.................................................................... <span class="_ _11"></span><span class="ls1">53<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y84 ff1 fs0 fc0 sc0 lsf ws0">7.5<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="ls13 ws11">DDCSDA and DDCSCL <span class="_ _f"></span>.............................................................................................................<span class="lse ws0">....................................................... <span class="_ _f"></span><span class="ls1">53<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y85 ff1 fs0 fc0 sc0 lsf ws0">7.6<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse ws25">Current Reference Pin: R_EXT <span class="_ _12"></span>..................................................................................................<span class="ws0">....................................................... <span class="_ _f"></span><span class="ls1">54<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y86 ff1 fs0 fc0 sc0 lsf ws0">7.7<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">CEC Implementation <span class="_ _f"></span>............................................................................................................<span class="_ _14"></span><span class="ws0">............................................................. <span class="_ _11"></span><span class="ls1">54<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y87 ff1 fs0 fc0 sc0 lsf ws0">7.8<span class="ffd fsb ls0"><span class="_ _10"> </span></span><span class="lse wsb">HEAC (ARC) <span class="_ _17"></span>....................................................................................................................<span class="ws0">................................................................... <span class="_ _f"></span><span class="ls1">54<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 xf h15 y88 ff1 fs0 fc0 sc0 lse wsb">Section 8: Glossary <span class="_ _3"></span>...........................................................................................................<span class="ws0">................................................................................... <span class="_ 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<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a18f792dc900e62dcab07/bg5.jpg"><div class="t m0 x1 he y41 ff4 fsa fc0 sc0 lsb ws8">ADV7511 <span class="_ _2"> </span>HARDWARE USER’S GUIDE</div><div class="t m0 x1 he y42 ff4 fsa fc0 sc0 ls20 ws20"> Rev. <span class="_ _e"></span>D</div><div class="t m0 x1 h2 y17 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h3 y18 ff2 fs0 fc0 sc0 ls1 ws1">Page 5</div><div class="t m0 x2 h4 y3 ff3 fs1 fc0 sc0 ls2 ws2"> of 58<span class="ff4 fs0 ls0 ws0"> </span></div><div class="t m0 x3 h5 y4 ff3 fs1 fc0 sc0 ls3 ws3">Rev D</div><div class="t m0 x1 h6 y5 ff1 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y6 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 he y19 ff4 fsa fc0 sc0 ls22 ws27">T<span class="_ _3"></span>ABLE OF FIGURES </div><div class="t m0 x1 h2 y1a ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y43 ff1 fs0 fc0 sc0 ls23 ws28">Figure 1</div><div class="t m0 x16 h15 y44 ffd fsb fc0 sc0 ls0 ws0"><span class="_ _18"> </span><span class="ff1 fs0 ls13 ws11">ADV7511 Functional Block Diagram <span class="_ _11"></span>..............................................................................................<span class="lse ws0">............................................. <span class="_ _11"></span><span class="ls1">11<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y45 ff1 fs0 fc0 sc0 ls23 ws28">Figure 2<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="lse wsb">Timing for Video Data Interfa<span class="_ _3"></span>ce <span class="_ _16"></span>...............................................................................................<span class="ws0">.................................................... <span class="_ _11"></span><span class="ls1">14<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y46 ff1 fs0 fc0 sc0 ls23 ws28">Figure 3<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="lse ws25">Timing for I2S Audio Interface ................................................................................................<span class="ws0">..................................................... <span class="_ _12"></span><span class="ls1">14<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y47 ff1 fs0 fc0 sc0 ls23 ws28">Figure 4<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="lse wsb">Timing for SPDIF Audio<span class="_ _3"></span> Interface <span class="_ _17"></span>..............................................................................................<span class="ws0">.................................................. <span class="_ _11"></span><span class="ls1">15<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y48 ff1 fs0 fc0 sc0 ls23 ws28">Figure 5<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="ls11 wsf">Timing for DSD Audio<span class="_ _3"></span> Interface <span class="_ _17"></span>................................................................................................<span class="lse ws0">................................................... <span class="_ _11"></span><span class="ls1">15<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y49 ff1 fs0 fc0 sc0 ls23 ws28">Figure 6<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="ls1e ws1c">100-lead LQFP configuration (top view - not to scale) <span class="_ _f"></span>.........................................................................<span class="_ _14"></span><span class="lse ws0">..................................... <span class="_ _12"></span><span class="ls1">18<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4a ff1 fs0 fc0 sc0 ls23 ws28">Figure 7<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="ls13 ws11">100-lead Low-Profile Quad Flat Pack [LQFP<span class="_ _3"></span>] <span class="_ _11"></span>....................................................................................<span class="lse ws0">......................................... <span class="_ _11"></span><span class="ls1">21<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4b ff1 fs0 fc0 sc0 ls23 ws28">Figure 8<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="lse wsb">2X Clock timing <span class="_ _f"></span>...............................................................................................................<span class="ws0">................................................................ <span class="_ _11"></span><span class="ls1">29<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4c ff1 fs0 fc0 sc0 ls23 ws28">Figure 9<span class="ffd fsb ls0 ws0"><span class="_ _18"> </span></span><span class="lse wsb">DDR DE timing - Register 0x16[1] <span class="_ _3"></span>= 1 <span class="_ _17"></span>..........................................................................................<span class="ws0">............................................... <span class="_ _11"></span><span class="ls1">35<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4d ff1 fs0 fc0 sc0 ls12 ws10">Figure 10<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">DDR DE timing - Register 0x16[1] = 0<span class="_ _3"></span> <span class="_ _12"></span>..........................................................................................<span class="ws0">........................................... <span class="_ _11"></span><span class="ls1">35<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4e ff1 fs0 fc0 sc0 ls12 ws10">Figure 11<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls1e ws1c">I2S Standard Audio – Data width 16 to 24 bits per channel <span class="_ _17"></span>.....................................................................<span class="_ _14"></span><span class="lse ws0">............................. <span class="_ _12"></span><span class="ls1">37<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y4f ff1 fs0 fc0 sc0 ls12 ws10">Figure 12<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls13 ws11">I2S Standard Audio – 16-bit samples only <span class="_ _11"></span>......................................................................................<span class="_ _14"></span><span class="lse ws0">......................................... <span class="_ _12"></span><span class="ls1">38<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y50 ff1 fs0 fc0 sc0 ls12 ws10">Figure 13<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 ws29">Serial Audio – Right-Justified <span class="_ _13"></span>................................................................................................<span class="lse ws0">.................................................... <span class="_ _11"></span><span class="ls1">38<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y51 ff1 fs0 fc0 sc0 ls12 ws10">Figure 14<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 ws29">Serial Audio – Left-Justified <span class="_ _f"></span>.................................................................................................<span class="lse ws0">...................................................... <span class="_ _11"></span><span class="ls1">38<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y52 ff1 fs0 fc0 sc0 ls12 ws10">Figure 15<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 wsf">AES3 Direct Audio <span class="_ _16"></span>.............................................................................................................<span class="_ _14"></span><span class="lse ws0">......................................................... <span class="_ _12"></span><span class="ls1">39<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y53 ff1 fs0 fc0 sc0 ls12 ws10">Figure 16<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls13 ws11">SPDIF Data Timing <span class="_ _f"></span>.............................................................................................................<span class="lse ws0">........................................................ <span class="_ _11"></span><span class="ls1">39<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y54 ff1 fs0 fc0 sc0 ls12 ws10">Figure 17<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">ARC Hardware Configuration <span class="_ _12"></span>....................................................................................................<span class="ws0">............................................... <span class="_ _11"></span><span class="ls1">41<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y55 ff1 fs0 fc0 sc0 ls12 ws10">Figure 18<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">Typical All-HDMI Home Theatre <span class="_ _17"></span>.................................................................................................<span class="ws0">............................................ <span class="_ _11"></span><span class="ls1">43<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y56 ff1 fs0 fc0 sc0 ls12 ws10">Figure 19<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 wsf">Sync Processing Block Diagra<span class="_ _3"></span>m .................................................................................................<span class="lse ws0">............................................... <span class="_ _11"></span><span class="ls1">44<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y57 ff1 fs0 fc0 sc0 ls12 ws10">Figure 20<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls13 ws11">Single Channel of CSC (In_A) <span class="_ _f"></span>..................................................................................................<span class="lse ws0">................................................. <span class="_ _12"></span><span class="ls1">46<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y58 ff1 fs0 fc0 sc0 ls12 ws10">Figure 21<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 wsf">Serial Port Read/Write Timin<span class="_ _3"></span>g <span class="_ _16"></span>.................................................................................................<span class="lse ws0">................................................. <span class="_ _11"></span><span class="ls1">48<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y59 ff1 fs0 fc0 sc0 ls12 ws10">Figure 22<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls13 ws11">Serial Interface—Typical Byte Transfer <span class="_ _12"></span>........................................................................................<span class="_ _14"></span><span class="lse ws0">............................................ <span class="_ _11"></span><span class="ls1">50<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5a ff1 fs0 fc0 sc0 ls12 ws10">Figure 23<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls11 wsf">Power Supply Domains <span class="_ _17"></span>..........................................................................................................<span class="lse ws0">..................................................... <span class="_ _11"></span><span class="ls1">50<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5b ff1 fs0 fc0 sc0 ls12 ws10">Figure 24<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="ls13 ws11">AVDD and PLVDD Max Noise vs. Frequency <span class="_ _3"></span>........................................................................................<span class="lse ws0">............................... <span class="_ _11"></span><span class="ls1">52<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5c ff1 fs0 fc0 sc0 ls12 ws10">Figure 25<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">LC Filter Transfer Curve <span class="_ _17"></span>.....................................................................................................<span class="_ _14"></span><span class="ws0">....................................................... <span class="_ _12"></span><span class="ls1">53<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5d ff1 fs0 fc0 sc0 ls12 ws10">Figure 26<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">CEC external connection <span class="_ _11"></span>.......................................................................................................<span class="ws0">..................................................... <span class="_ _11"></span><span class="ls1">54<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h15 y5e ff1 fs0 fc0 sc0 ls12 ws10">Figure 27<span class="ffd fsb ls0 ws0"><span class="_ _19"> </span></span><span class="lse wsb">Example Schematic <span class="_ _11"></span>.............................................................................................................<span class="ws0">......................................................... <span class="_ _11"></span><span class="ls1">55<span class="ffd fsb ls0"></span></span></span></span></div><div class="t m0 x1 h2 y5f ff1 fs0 fc0 sc0 ls0 ws0"> </div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div 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