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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62658acfba6c813e01e6662b/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="t m0 x1 h3 y2 ff2 fs1 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h4 y3 ff2 fs2 fc1 sc0 ls0 ws0"> <span class="_ _0"> </span> </div><div class="c x2 y4 w2 h5"><div class="t m0 x3 h6 y5 ff3 fs3 fc2 sc0 ls0 ws0">Layout Design Guide<span class="ff4 fc1"> </span></div></div><div class="c x2 y6 w3 h7"><div class="t m0 x3 h8 y7 ff4 fs2 fc3 sc0 ls0 ws0"> </div></div></div><div class="pi" data-data='{"ctm":[1.611792,0.000000,0.000000,1.611792,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62658acfba6c813e01e6662b/bg2.jpg"><div class="t m0 x1 h8 y8 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y9 ff1 fs0 fc0 sc0 ls0 ws0"><span class="fc6 sc0"> </span></div><div class="c x4 ya w4 h9"><div class="t m0 x5 ha yb ff2 fs4 fc2 sc0 ls0 ws0">Layout Design Guide </div></div><div class="c x6 yc w5 hb"><div class="t m0 x7 hc yd ff2 fs5 fc4 sc0 ls0 ws0">Toradex AG l Alt<span class="_ _1"></span>sagenstrasse 5 <span class="_ _1"></span><span class="ls1">l <span class="ls0"> 6048 Horw<span class="_ _1"></span> <span class="ls1">l </span> Switzerland <span class="ls2">l </span> +41 41 500 48 00<span class="_ _1"></span> <span class="ls2">l <span class="_ _2"></span></span> <span class="fc2">www<span class="_ _1"></span>.toradex.com <span class="fc4"> l </span>info@tora<span class="_ _1"></span>dex.com </span></span></span></div></div><div class="c x8 ye w6 hd"><div class="t m0 x9 hc yf ff2 fs5 fc4 sc0 ls0 ws0">Page | 2 </div></div><div class="c xa y10 w7 he"><div class="t m0 xb hf y11 ff3 fs0 fc5 sc0 ls0 ws0">Issued by: </div></div><div class="c xc y10 w8 he"><div class="t m0 xb h10 y11 ff2 fs0 fc1 sc0 ls0 ws0">Toradex<span class="ff3"> </span></div></div><div class="c xd y10 w9 he"><div class="t m0 xb hf y11 ff3 fs0 fc5 sc0 ls0 ws0">Document Type: </div></div><div class="c xe y10 wa he"><div class="t m0 xb h10 y11 ff2 fs0 fc1 sc0 ls0 ws0">Design Guide </div></div><div class="c xa y12 w7 h11"><div class="t m0 xb h4 y13 ff2 fs2 fc1 sc0 ls0 ws0"> </div></div><div class="c xc y12 wb h11"><div class="t m0 xb h4 y13 ff2 fs2 fc1 sc0 ls0 ws0"> </div></div><div class="c xa y14 w7 h12"><div class="t m0 xb hf y15 ff3 fs0 fc5 sc0 ls0 ws0">Purpose: </div></div><div class="c xc y14 wb h12"><div class="t m0 xb h10 y15 ff2 fs0 fc1 sc0 ls0 ws0">This document is a guideline for designing a carrier board with high speed signals that is used </div><div class="t m0 xb h10 y16 ff2 fs0 fc1 sc0 ls0 ws0">with Toradex Computer Modules. </div></div><div class="c xa y17 w7 h11"><div class="t m0 xb h4 y13 ff2 fs2 fc1 sc0 ls0 ws0"> </div></div><div class="c xc y17 wb h11"><div class="t m0 xb h4 y13 ff2 fs2 fc1 sc0 ls0 ws0"> </div></div><div class="c xa y18 w7 h13"><div class="t m0 xb hf y19 ff3 fs0 fc5 sc0 ls0 ws0">Document </div><div class="t m0 xb hf y11 ff3 fs0 fc5 sc0 ls0 ws0">Version: </div></div><div class="c xc y18 wb h13"><div class="t m0 xb h10 y19 ff2 fs0 fc1 sc0 ls0 ws0">1.0 </div></div><div class="t m0 x1 h4 y1a ff2 fs2 fc1 sc0 ls0 ws0"> </div><div class="c xa y1b wc h14"><div class="t m0 xb h15 y1c ff3 fs5 fc5 sc0 ls0 ws0">Revision History<span class="_ _1"></span> </div><div class="t m0 xb h15 y1d ff3 fs5 fc5 sc0 ls0 ws0">Date </div></div><div class="c xf y1b wd h14"><div class="t m0 xb h15 y1c ff3 fs5 fc5 sc0 ls0 ws0">Version </div></div><div class="c x10 y1b we h14"><div class="t m0 xb h15 y1c ff3 fs5 fc5 sc0 ls0 ws0">Remarks </div></div><div class="c xa y1e wc h16"><div class="t m0 xb h10 y1f ff2 fs0 fc1 sc0 ls3 ws0">14<span class="ls0"> April 2015 </span></div></div><div class="c xf y1e wd h16"><div class="t m0 xb h10 y1f ff2 fs0 fc1 sc0 ls0 ws0">V1.0 </div></div><div class="c x10 y1e we h16"><div class="t m0 xb h10 y1f ff2 fs0 fc1 sc0 ls0 ws0">Initial Release, based on section 2 of the Apalis Carrier Board Design </div><div class="t m0 xb h10 yb ff2 fs0 fc1 sc0 ls0 ws0">Guide V1.0 </div></div><div class="t m0 x1 h10 y20 ff2 fs0 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h4 y21 ff2 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h4 y22 ff2 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y23 ff2 fs2 fc1 sc0 ls0 ws0"> <span class="_ _0"> </span><span class="ff4"> </span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.611792,0.000000,0.000000,1.611792,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62658acfba6c813e01e6662b/bg3.jpg"><div class="t m0 x1 h8 y8 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y9 ff1 fs0 fc0 sc0 ls0 ws0"><span class="fc6 sc0"> </span></div><div class="c x4 ya w4 h9"><div class="t m0 x5 ha yb ff2 fs4 fc2 sc0 ls0 ws0">Layout Design Guide </div></div><div class="c x6 yc w5 hb"><div class="t m0 x7 hc yd ff2 fs5 fc4 sc0 ls0 ws0">Toradex AG l Alt<span class="_ _1"></span>sagenstrasse 5 <span class="_ _1"></span><span class="ls1">l <span class="ls0"> 6048 Horw<span class="_ _1"></span> <span class="ls1">l </span> Switzerland <span class="ls2">l </span> +41 41 500 48 00<span class="_ _1"></span> <span class="ls2">l <span class="_ _2"></span></span> <span class="fc2">www<span class="_ _1"></span>.toradex.com <span class="fc4"> l </span>info@tora<span class="_ _1"></span>dex.com </span></span></span></div></div><div class="c x8 ye w6 hd"><div class="t m0 x9 hc yf ff2 fs5 fc4 sc0 ls0 ws0">Page | 3 </div></div><div class="t m0 x1 h17 y24 ff3 fs2 fc1 sc0 ls0 ws0">1<span class="ff5 fs6"> <span class="_ _3"> </span></span>Introduction<span class="ff6"> <span class="_ _1"></span><span class="ls4">.......................................................................................................................<span class="ls0"> <span class="_ _4"></span>4<span class="ff5 fs6"> </span></span></span></span></div><div class="t m0 x1 h17 y25 ff2 fs2 fc1 sc0 ls5 ws0">1.1<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Overview<span class="ff4"> <span class="_ _4"></span><span class="ls6">.............................................................................................................................<span class="ls0"> <span class="_ _4"></span>4<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x1 h17 y26 ff2 fs2 fc1 sc0 ls5 ws0">1.2<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Additional Docum<span class="_ _2"></span>ents<span class="ff4"> <span class="_ _1"></span><span class="ls6">..........................................................................................................<span class="ls0"> <span class="_ _4"></span>4<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x11 h17 y27 ff2 fs2 fc1 sc0 ls5 ws0">1.2.1<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Apalis Carrier Board <span class="_ _2"></span>Design Guide<span class="_ _2"></span><span class="ff4"> <span class="_ _7"></span><span class="ls6">.............................................................................<span class="ls0"> <span class="_ _8"></span>4<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x11 h17 y28 ff2 fs2 fc1 sc0 ls5 ws0">1.2.2<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Apalis Module Datas<span class="_ _2"></span>heets<span class="ff4"> <span class="ls6">.........................................................................................</span> <span class="_ _8"></span>4<span class="ff5 fs6"> </span></span></span></div><div class="t m0 x11 h17 y29 ff2 fs2 fc1 sc0 ls5 ws0">1.2.3<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Apalis Module Defin<span class="_ _2"></span>ition<span class="ff4"> <span class="ls6">............................................................................................</span> <span class="_ _8"></span>4<span class="ff5 fs6"> </span></span></span></div><div class="t m0 x11 h17 y2a ff2 fs2 fc1 sc0 ls5 ws0">1.2.4<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Colibri Carrier Boar<span class="_ _2"></span>d Design Guide<span class="_ _2"></span><span class="ff4"> <span class="_ _9"></span><span class="ls6">.............................................................................<span class="ls0"> <span class="_ _8"></span>4<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x11 h17 y2b ff2 fs2 fc1 sc0 ls5 ws0">1.2.5<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Colibri Module Datas<span class="_ _2"></span>heets<span class="ff4"> <span class="_ _a"></span><span class="ls6">.........................................................................................<span class="ls0"> <span class="_ _8"></span>5<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x11 h17 y2c ff2 fs2 fc1 sc0 ls5 ws0">1.2.6<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Toradex Developer Ce<span class="_ _2"></span>ntre<span class="ff4"> <span class="_ _4"></span><span class="ls6">.........................................................................................<span class="ls0"> <span class="_ _8"></span>5<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x11 h17 y2d ff2 fs2 fc1 sc0 ls5 ws0">1.2.7<span class="ff5 fs6 ls0"> <span class="_ _6"> </span></span><span class="ls0">Carrier Board Desig<span class="_ _2"></span>n inform<span class="_ _2"></span>ation<span class="ff4"> <span class="ls6">...............................................................................</span> <span class="_ _8"></span>5<span class="ff5 fs6"> </span></span></span></div><div class="t m0 x1 h17 y2e ff2 fs2 fc1 sc0 ls5 ws0">1.3<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Abbreviations<span class="_ _2"></span><span class="ff4"> <span class="_ _b"></span><span class="ls6">.......................................................................................................................<span class="ls0"> <span class="_ _7"></span>5<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x1 h17 y2f ff3 fs2 fc1 sc0 ls0 ws0">2<span class="ff5 fs6"> <span class="_ _3"> </span></span>General Considerations<span class="_ _2"></span><span class="ff6"> <span class="_ _a"></span><span class="ls4">.....................................................................................................<span class="ls0"> <span class="_ _4"></span>8<span class="ff5 fs6"> </span></span></span></span></div><div class="t m0 x1 h17 y30 ff3 fs2 fc1 sc0 ls0 ws0">3<span class="ff5 fs6"> <span class="_ _3"> </span></span>PCB Stack-<span class="ls7">Up<span class="_ _2"></span></span><span class="ff6"> <span class="_ _c"></span><span class="ls4">....................................................................................................................<span class="ls0"> <span class="_ _4"></span>9<span class="ff5 fs6"> </span></span></span></span></div><div class="t m0 x1 h17 y31 ff2 fs2 fc1 sc0 ls5 ws0">3.1<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Four Layer Stack<span class="_ _2"></span><span class="ff7">–</span><span class="ls7">Up</span><span class="ff4"> <span class="_ _c"></span><span class="ls6">...........................................................................................................<span class="ls0"> <span class="_ _4"></span>9<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x1 h17 y32 ff2 fs2 fc1 sc0 ls5 ws0">3.2<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Six Layer Stack<span class="_ _2"></span><span class="ff7">–</span><span class="ls7">Up</span><span class="ff4"> <span class="ls6">...........................................................................................................</span> <span class="_ _4"></span><span class="ls8">10<span class="ff5 fs6 ls0"> </span></span></span></span></div><div class="t m0 x1 h17 y33 ff2 fs2 fc1 sc0 ls5 ws0">3.3<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Eight Layer Stack<span class="_ _2"></span><span class="ff7">–</span><span class="ls7">Up<span class="ff4 ls6">.........................................................................................................<span class="ls0"> <span class="_ _7"></span><span class="ls8">10<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y34 ff3 fs2 fc1 sc0 ls0 ws0">4<span class="ff5 fs6"> <span class="_ _3"> </span></span>Trace Impedance<span class="_ _2"></span><span class="ff6 ls4">..............................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls9">12<span class="ff5 fs6 ls0"> </span></span></span></span></div><div class="t m0 x1 h17 y35 ff3 fs2 fc1 sc0 ls0 ws0">5<span class="ff5 fs6"> <span class="_ _3"> </span></span>Component Placement an<span class="_ _2"></span>d Schematic Optimiz<span class="_ _2"></span>ations<span class="_ _2"></span><span class="ff6"> <span class="_ _a"></span><span class="ls4">................................<span class="_ _2"></span>.....................<span class="ls0"> <span class="_ _4"></span><span class="ls9">14<span class="ff5 fs6 ls0"> </span></span></span></span></span></div><div class="t m0 x1 h17 y36 ff3 fs2 fc1 sc0 ls0 ws0">6<span class="ff5 fs6"> <span class="_ _3"> </span></span>High-Speed Layout<span class="_ _2"></span> Considerations<span class="_ _2"></span><span class="ff6"> <span class="_ _a"></span><span class="ls4">.................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls9">15<span class="ff5 fs6 ls0"> </span></span></span></span></span></div><div class="t m0 x1 h17 y37 ff2 fs2 fc1 sc0 ls5 ws0">6.1<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Power Supply<span class="_ _2"></span><span class="ff4"> <span class="_ _a"></span><span class="ls6">....................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">15<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y38 ff2 fs2 fc1 sc0 ls5 ws0">6.2<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Trace Bend Geom<span class="_ _2"></span>etry<span class="ff4"> <span class="_ _4"></span><span class="ls6">........................................................................................................<span class="ls0"> <span class="_ _7"></span><span class="ls8">17<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y39 ff2 fs2 fc1 sc0 ls5 ws0">6.3<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Signal Proxim<span class="_ _2"></span>ity<span class="ff4"> <span class="_ _8"></span><span class="ls6">.................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">17<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y3a ff2 fs2 fc1 sc0 ls5 ws0">6.4<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Trace Stubs<span class="ff4"> <span class="_ _8"></span><span class="ls6">.......................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">18<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y3b ff2 fs2 fc1 sc0 ls5 ws0">6.5<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Ground Planes unde<span class="_ _2"></span>r Pads<span class="ff4"> <span class="_ _b"></span><span class="ls6">................................................................<span class="_ _2"></span>................................<span class="ls0">. <span class="_ _4"></span><span class="ls8">18<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y3c ff2 fs2 fc1 sc0 ls5 ws0">6.6<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Differential Pair Signa<span class="_ _2"></span>ls<span class="ff4"> <span class="_ _7"></span><span class="ls6">................................................................<span class="_ _2"></span>......................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">19<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y3d ff2 fs2 fc1 sc0 ls5 ws0">6.7<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Length Matching<span class="_ _2"></span><span class="ff4"> <span class="_ _7"></span><span class="ls6">................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">21<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y3e ff2 fs2 fc1 sc0 ls0 ws0">6<span class="lsa">.8</span><span class="ff5 fs6"> <span class="_ _5"> </span></span>Signal Return Path<span class="_ _2"></span><span class="ff4"> <span class="_ _9"></span><span class="ls6">.............................................................................................................<span class="_ _2"></span><span class="ls0"> <span class="_ _4"></span><span class="ls8">25<span class="ff5 fs6 ls0"> </span></span></span></span></span></div><div class="t m0 x1 h17 y3f ff2 fs2 fc1 sc0 ls5 ws0">6.9<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Analogue and Digital Gro<span class="_ _2"></span>und<span class="_ _2"></span><span class="ff4"> <span class="_ _4"></span><span class="ls6">..............................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">29<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y40 ff3 fs2 fc1 sc0 ls0 ws0">7<span class="ff5 fs6"> <span class="_ _3"> </span></span>Layout Requirements of I<span class="_ _2"></span>nterfaces<span class="_ _2"></span><span class="ff6"> <span class="_ _4"></span><span class="ls4">..................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls9">32<span class="ff5 fs6 ls0"> </span></span></span></span></span></div><div class="t m0 x1 h17 y41 ff2 fs2 fc1 sc0 ls5 ws0">7.1<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">PCI Express<span class="ff4"> <span class="_ _c"></span><span class="ls6">......................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">33<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y42 ff2 fs2 fc1 sc0 ls5 ws0">7.2<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">SATA<span class="ff4"> <span class="_ _7"></span><span class="ls6">................................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">33<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y43 ff2 fs2 fc1 sc0 ls5 ws0">7.3<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Ethernet<span class="ff4"> <span class="_ _a"></span><span class="ls6">............................................................................................................................<span class="ls0"> <span class="_ _7"></span><span class="ls8">34<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y44 ff2 fs2 fc1 sc0 ls5 ws0">7.4<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">USB<span class="ff4"> <span class="_ _8"></span><span class="ls6">................................<span class="_ _2"></span>..................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">35<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y45 ff2 fs2 fc1 sc0 ls5 ws0">7.5<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Parallel RGB LCD Int<span class="_ _2"></span>erface<span class="ff4"> <span class="_ _7"></span><span class="ls6">................................................................................................<span class="ls0"> <span class="_ _4"></span>37<span class="ff5 fs6"> </span></span></span></span></span></div><div class="t m0 x1 h17 y46 ff2 fs2 fc1 sc0 ls5 ws0">7.6<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">LVDS LCD Interf<span class="_ _2"></span>ace<span class="ff4"> <span class="_ _b"></span><span class="ls6">...........................................................................................................<span class="ls0"> <span class="_ _7"></span><span class="ls8">37<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y47 ff2 fs2 fc1 sc0 ls5 ws0">7.7<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">HDMI/DVI<span class="ff4"> <span class="_ _8"></span><span class="ls6">..........................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">38<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y48 ff2 fs2 fc1 sc0 ls5 ws0">7.8<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Analogue VGA<span class="_ _2"></span><span class="ff4"> <span class="_ _9"></span><span class="ls6">...................................................................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">38<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y49 ff2 fs2 fc1 sc0 ls5 ws0">7.9<span class="ff5 fs6 ls0"> <span class="_ _5"> </span></span><span class="ls0">Parallel Cam<span class="_ _2"></span>era Interface<span class="ff4"> <span class="_ _4"></span><span class="ls6">...................................................................................................<span class="ls0"> <span class="_ _7"></span><span class="ls8">39<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y4a ff2 fs2 fc1 sc0 ls5 ws0">7.10<span class="ff5 fs6 ls0"> <span class="_ _d"> </span></span><span class="ls0">SD/MMC/SDIO<span class="_ _2"></span><span class="ff4"> <span class="_ _7"></span><span class="ls6">................................................................................................<span class="_ _2"></span>..................<span class="ls0"> <span class="_ _4"></span><span class="ls8">39<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y4b ff2 fs2 fc1 sc0 ls5 ws0">7.11<span class="ff5 fs6 ls0"> <span class="_ _d"> </span></span><span class="ls0">I</span></div><div class="t m0 x12 h18 y4c ff2 fs7 fc1 sc0 ls0 ws0">2</div><div class="t m0 x13 h17 y4b ff2 fs2 fc1 sc0 ls0 ws0">C<span class="ff4"> <span class="_ _a"></span><span class="ls6">................................................................................................<span class="_ _2"></span>....................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">40<span class="ff5 fs6 ls0"> </span></span></span></span></span></div><div class="t m0 x1 h17 y4d ff2 fs2 fc1 sc0 ls5 ws0">7.12<span class="ff5 fs6 ls0"> <span class="_ _d"> </span></span><span class="ls0">Display Serial Interf<span class="_ _2"></span>ace (MIPI/DSI with D<span class="_ _2"></span>-PHY)<span class="ff4"> <span class="_ _4"></span><span class="ls6">....................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">40<span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h17 y4e ff2 fs2 fc1 sc0 ls5 ws0">7.13<span class="ff5 fs6 ls0"> <span class="_ _d"> </span></span><span class="ls0">Camera Serial Interf<span class="_ _2"></span>ace (MIPI/CSI-2 <span class="_ _2"></span>with D-PHY)<span class="_ _2"></span><span class="ff4"> <span class="_ _4"></span><span class="ls6">................................................................<span class="ls0"> <span class="_ _4"></span><span class="ls8">40<span class="_ _2"></span><span class="ff5 fs6 ls0"> </span></span></span></span></span></span></div><div class="t m0 x1 h4 y4f ff2 fs2 fc1 sc0 ls0 ws0"> <span class="_ _0"> </span> </div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return 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<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62658acfba6c813e01e6662b/bg4.jpg"><div class="t m0 x1 h8 y8 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y9 ff1 fs0 fc0 sc0 ls0 ws0"><span class="fc6 sc0"> </span></div><div class="c x4 ya w4 h9"><div class="t m0 x5 ha yb ff2 fs4 fc2 sc0 ls0 ws0">Layout Design Guide </div></div><div class="c x6 yc w5 hb"><div class="t m0 x7 hc yd ff2 fs5 fc4 sc0 ls0 ws0">Toradex AG l Alt<span class="_ _1"></span>sagenstrasse 5 <span class="_ _1"></span><span class="ls1">l <span class="ls0"> 6048 Horw<span class="_ _1"></span> <span class="ls1">l </span> Switzerland <span class="ls2">l </span> +41 41 500 48 00<span class="_ _1"></span> <span class="ls2">l <span class="_ _2"></span></span> <span class="fc2">www<span class="_ _c"></span>.<span class="_ _2"></span>toradex.com <span class="fc4"> l </span>info@tor<span class="_ _1"></span>adex.co<span class="_ _1"></span>m </span></span></span></div></div><div class="c x8 ye w6 hd"><div class="t m0 x9 hc yf ff2 fs5 fc4 sc0 ls0 ws0">Page | 4 </div></div><div class="t m0 x1 h19 y50 ff3 fs8 fc2 sc0 ls0 ws0">1 <span class="_ _e"> </span><span class="ff8">Introduction<span class="_ _2"></span></span> </div><div class="t m0 x1 h1a y51 ff3 fs4 fc1 sc0 ls0 ws0">1.1 <span class="_ _f"> </span>Overview </div><div class="t m0 x1 h8 y2a ff4 fs2 fc1 sc0 ls0 ws0">The latest Toradex C<span class="_ _2"></span>omputer module<span class="_ _2"></span>s features ne<span class="_ _2"></span>w high speed inter<span class="_ _2"></span>faces such as PCI Expre<span class="_ _2"></span>ss, </div><div class="t m0 x1 h8 y2b ff4 fs2 fc1 sc0 ls0 ws0">SATA, HDMI, USB 3.<span class="_ _2"></span>0, Ethernet, and L<span class="_ _2"></span>VDS which requi<span class="_ _2"></span>re special layout <span class="_ _2"></span>conside<span class="_ _2"></span>rations regarding </div><div class="t m0 x1 h8 y2c ff4 fs2 fc1 sc0 ls0 ws0">trace impedance an<span class="_ _2"></span>d length matching. <span class="_ _2"></span>Improper r<span class="_ _2"></span>outing of such sign<span class="_ _2"></span>als is a common pitf<span class="_ _2"></span>all in <span class="_ _2"></span>the </div><div class="t m0 x1 h8 y2d ff4 fs2 fc1 sc0 ls0 ws0">design of an Apali<span class="_ _2"></span>s or Colibri carrier board. <span class="_ _2"></span>This document help<span class="_ _2"></span>s avoiding layo<span class="_ _10"></span>ut problems that </div><div class="t m0 x1 h8 y52 ff4 fs2 fc1 sc0 ls0 ws0">can cause signal quality<span class="_ _2"></span> or EMC problem<span class="_ _2"></span>s. Plea<span class="_ _2"></span>se read this docum<span class="_ _2"></span>ent very carefully <span class="_ _2"></span>before you<span class="_ _2"></span> </div><div class="t m0 x1 h8 y53 ff4 fs2 fc1 sc0 ls0 ws0">start designing a c<span class="_ _2"></span>arrier board. <span class="_ _2"></span> </div><div class="t m0 x1 h8 y54 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y55 ff4 fs2 fc1 sc0 ls0 ws0">Please use this documen<span class="_ _2"></span>t together with th<span class="_ _2"></span>e design gui<span class="_ _2"></span>de of the <span class="_ _2"></span>appropriate Tor<span class="_ _2"></span>adex computer </div><div class="t m0 x1 h8 y56 ff4 fs2 fc1 sc0 ls0 ws0">module family and <span class="_ _2"></span>the datasheet o<span class="_ _2"></span>f the module. <span class="_ _2"></span> </div><div class="t m0 x1 h1a y57 ff3 fs4 fc1 sc0 ls0 ws0">1.2 <span class="_ _f"> </span>A<span class="_ _1"></span>dditional <span class="_ _2"></span>Documents </div><div class="t m0 x1 h1b y58 ff3 fs2 fc1 sc0 ls5 ws0">1.2.1<span class="ls0"> <span class="_ _11"> </span>Apalis Carrier Boa<span class="_ _2"></span>rd Desig<span class="_ _2"></span>n Guide </span></div><div class="t m0 x1 h8 y59 ff4 fs2 fc1 sc0 ls0 ws0">This document provi<span class="_ _2"></span>des additional inform<span class="_ _2"></span>ation to the<span class="_ _2"></span> schematic design o<span class="_ _2"></span>f a carrier board for the </div><div class="t m0 x1 h8 y5a ff4 fs2 fc1 sc0 ls0 ws0">Apalis modules. It cont<span class="_ _2"></span>ains reference schem<span class="_ _2"></span>atics, descr<span class="_ _2"></span>iptions of the powe<span class="_ _2"></span>r <span class="_ _2"></span>architecture and </div><div class="t m0 x1 h8 y5b ff4 fs2 fc1 sc0 ls0 ws0">information pertaini<span class="_ _2"></span>ng to the mech<span class="_ _2"></span>anical requiremen<span class="_ _2"></span>ts of the module. <span class="_ _2"></span> </div><div class="t m0 x1 h8 y5c ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y6 ff4 fs2 fc7 sc0 ls0 ws0">http://developer.tora<span class="_ _2"></span>dex.com/hardw<span class="_ _2"></span>are-resourc<span class="_ _2"></span>es/arm<span class="_ _2"></span>-family/carrier-<span class="_ _2"></span>board-design<span class="fc1"> </span></div><div class="t m0 x1 h1b y5d ff3 fs2 fc1 sc0 ls5 ws0">1.2.2<span class="ls0"> <span class="_ _11"> </span>Apalis Module <span class="_ _2"></span>Datasheets </span></div><div class="t m0 x1 h8 y5e ff4 fs2 fc1 sc0 ls0 ws0">There is a datasheet av<span class="_ _2"></span>ailable for <span class="_ _2"></span>every Apalis Modul<span class="_ _2"></span>e<span class="ls6">. </span>Among<span class="_ _2"></span>st other things, thi<span class="_ _2"></span>s document </div><div class="t m0 x1 h8 y5f ff4 fs2 fc1 sc0 ls0 ws0">describes the type-<span class="_ _2"></span>specific inter<span class="_ _2"></span>faces and the second<span class="_ _2"></span>ary function of the pins<span class="_ _2"></span>. Before starting the </div><div class="t m0 x1 h8 y60 ff4 fs2 fc1 sc0 ls0 ws0">development of a cus<span class="_ _2"></span>tomized carr<span class="_ _2"></span>ier board, please c<span class="_ _2"></span>heck in this document <span class="_ _2"></span>whether the re<span class="_ _2"></span>quired </div><div class="t m0 x1 h8 y61 ff4 fs2 fc1 sc0 ls0 ws0">interfaces are really <span class="_ _2"></span>available on the selec<span class="_ _2"></span>ted modules. <span class="_ _2"></span> </div><div class="t m0 x1 h8 y62 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y63 ff4 fs2 fc7 sc0 ls0 ws0">https://www.toradex.com<span class="_ _2"></span>/products/ap<span class="_ _2"></span>alis-arm-<span class="_ _2"></span>computer-<span class="_ _2"></span>modules<span class="fc1"> </span></div><div class="t m0 x1 h1b y64 ff3 fs2 fc1 sc0 ls5 ws0">1.2.3<span class="ls0"> <span class="_ _11"> </span>Apalis Module Definit<span class="_ _2"></span>ion </span></div><div class="t m0 x1 h8 y45 ff4 fs2 fc1 sc0 ls0 ws0">This document describe<span class="_ _2"></span>s the Apalis Modul<span class="_ _2"></span>e standard. It provides ad<span class="_ _2"></span>ditional infor<span class="_ _2"></span>mation about the </div><div class="t m0 x1 h8 y65 ff4 fs2 fc1 sc0 ls0 ws0">interfaces. </div><div class="t m0 x1 h8 y66 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y67 ff4 fs2 fc7 sc0 ls0 ws0">http://docs.toradex.com<span class="_ _2"></span>/100240<span class="_ _2"></span>-apal<span class="lsb">is</span>-module-<span class="_ _2"></span>specification.pdf<span class="fc1"> <span class="_ _2"></span> </span></div><div class="t m0 x1 h1b y68 ff3 fs2 fc1 sc0 ls5 ws0">1.2.4<span class="ls0"> <span class="_ _11"> </span>Colibri Carrier Board <span class="_ _2"></span>Design Guide<span class="_ _2"></span> </span></div><div class="t m0 x1 h8 y69 ff4 fs2 fc1 sc0 ls0 ws0">This document provi<span class="_ _2"></span>des additional inform<span class="_ _2"></span>ation <span class="_ _2"></span>about the sch<span class="_ _2"></span>ematic designs o<span class="_ _2"></span>f carrier board<span class="_ _2"></span>s for </div><div class="t m0 x1 h8 y6a ff4 fs2 fc1 sc0 ls0 ws0">the Colibri modules. It con<span class="_ _2"></span>tains reference<span class="_ _2"></span> schematics, descr<span class="_ _2"></span>iption <span class="_ _2"></span>about the po<span class="_ _2"></span>wer architecture <span class="_ _2"></span>and </div><div class="t m0 x1 h8 y6b ff4 fs2 fc1 sc0 ls0 ws0">information relat<span class="_ _2"></span>ed to the <span class="_ _2"></span>mechanical requirem<span class="_ _2"></span>ents of the module. <span class="_ _2"></span> </div><div class="t m0 x1 h8 y6c ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y6d ff4 fs2 fc7 sc0 ls0 ws0">http://developer.tora<span class="_ _2"></span>dex.com/hardw<span class="_ _2"></span>are-resourc<span class="_ _2"></span>es/arm<span class="_ _2"></span>-family/carrier-<span class="_ _2"></span>board-design<span class="fc1"> </span></div><div class="t m0 x1 h8 y6e ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y6f ff4 fs2 fc1 sc0 ls0 ws0"> <span class="_ _0"> </span><span class="ff3"> </span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.611792,0.000000,0.000000,1.611792,0.000000,0.000000]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62658acfba6c813e01e6662b/bg5.jpg"><div class="t m0 x1 h8 y8 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h2 y9 ff1 fs0 fc0 sc0 ls0 ws0"><span class="fc6 sc0"> </span></div><div class="c x4 ya w4 h9"><div class="t m0 x5 ha yb ff2 fs4 fc2 sc0 ls0 ws0">Layout Design Guide </div></div><div class="c x6 yc w5 hb"><div class="t m0 x7 hc yd ff2 fs5 fc4 sc0 ls0 ws0">Toradex AG l Alt<span class="_ _1"></span>sagenstrasse 5 <span class="_ _1"></span><span class="ls1">l <span class="ls0"> 6048 Horw<span class="_ _1"></span> <span class="ls1">l </span> Switzerland <span class="ls2">l </span> +41 41 500 48 00<span class="_ _1"></span> <span class="ls2">l <span class="_ _2"></span></span> <span class="fc2">www<span class="_ _c"></span>.<span class="_ _2"></span>toradex.com <span class="fc4"> l </span>info@tor<span class="_ _1"></span>adex.co<span class="_ _1"></span>m </span></span></span></div></div><div class="c x8 ye w6 hd"><div class="t m0 x9 hc yf ff2 fs5 fc4 sc0 ls0 ws0">Page | 5 </div></div><div class="t m0 x1 h1b y70 ff3 fs2 fc1 sc0 ls5 ws0">1.2.5<span class="ls0"> <span class="_ _11"> </span>Colibri Mod<span class="_ _2"></span>ule Datasheets </span></div><div class="t m0 x1 h8 y71 ff4 fs2 fc1 sc0 ls0 ws0">There is a datasheet av<span class="_ _2"></span>ailable for <span class="_ _2"></span>every Colibri Modul<span class="_ _2"></span>e. Amongst oth<span class="_ _2"></span>er things, this docum<span class="_ _2"></span>ent </div><div class="t m0 x1 h8 y72 ff4 fs2 fc1 sc0 ls0 ws0">describes the additional i<span class="_ _2"></span>nterfaces and <span class="_ _2"></span>the secondary func<span class="_ _2"></span>tion of the pins. Befor<span class="_ _2"></span>e starting the </div><div class="t m0 x1 h8 y73 ff4 fs2 fc1 sc0 ls0 ws0">development of a cus<span class="_ _2"></span>tomized carrier bo<span class="_ _2"></span>ard, p<span class="_ _2"></span>lease refer this docum<span class="_ _2"></span>ent to check<span class="_ _2"></span> if the required<span class="_ _2"></span> </div><div class="t m0 x1 h8 y74 ff4 fs2 fc1 sc0 ls0 ws0">interfaces are really <span class="_ _2"></span>available on the selec<span class="_ _2"></span>ted modules. <span class="_ _2"></span> </div><div class="t m0 x1 h8 y75 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y76 ff4 fs2 fc7 sc0 ls0 ws0">https://www.toradex.com<span class="_ _2"></span>/products/colibri<span class="_ _2"></span>-arm<span class="_ _2"></span>-computer-<span class="_ _2"></span>modules<span class="fc1"> </span></div><div class="t m0 x1 h1b y77 ff3 fs2 fc1 sc0 ls5 ws0">1.2.6<span class="ls0"> <span class="_ _11"> </span>Toradex Developer <span class="_ _2"></span>Centre </span></div><div class="t m0 x1 h8 y78 ff4 fs2 fc1 sc0 ls0 ws0">You can find a lot of a<span class="_ _2"></span>dditional information <span class="_ _2"></span>at th<span class="_ _2"></span>e Toradex Developer Cen<span class="_ _2"></span>tre, whi<span class="_ _2"></span>ch is updated </div><div class="t m0 x1 h8 y79 ff4 fs2 fc1 sc0 ls0 ws0">with the latest product <span class="_ _2"></span>support information on <span class="_ _2"></span>a regular ba<span class="_ _2"></span>sis.<span class="_ _2"></span> </div><div class="t m0 x1 h8 y7a ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y7b ff4 fs2 fc1 sc0 ls0 ws0">Please note that th<span class="_ _2"></span>e Developer Centre i<span class="_ _2"></span>s common for all Torad<span class="_ _2"></span>ex products. Yo<span class="_ _10"></span>u should always </div><div class="t m0 x1 h8 y7c ff4 fs2 fc1 sc0 ls0 ws0">check to ensure if th<span class="_ _2"></span>e inform<span class="_ _2"></span>ation is valid or relevan<span class="_ _2"></span>t for you<span class="_ _2"></span>r specific module<span class="_ _2"></span><span class="ls6">. </span> </div><div class="t m0 x1 h8 y7d ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y7e ff4 fs2 fc7 sc0 ls0 ws0">http://www.develop<span class="_ _2"></span>er.toradex.com<span class="_ _2"></span><span class="fc1"> </span></div><div class="t m0 x1 h8 y7f ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h1b y80 ff3 fs2 fc1 sc0 ls5 ws0">1.2.7<span class="ls0"> <span class="_ _11"> </span>Carrier Board Design <span class="_ _2"></span>information<span class="_ _2"></span> </span></div><div class="t m0 x1 h8 y81 ff4 fs2 fc1 sc0 ls0 ws0">We provide the comple<span class="_ _2"></span>te schematics <span class="_ _2"></span>and the Alti<span class="_ _2"></span>um project file for<span class="_ _2"></span> Apalis <span class="_ _2"></span>and Colibri Evaluatio<span class="_ _2"></span>n </div><div class="t m0 x1 h8 y82 ff4 fs2 fc1 sc0 ls0 ws0">Boards for free. Thi<span class="_ _2"></span>s is a great help when d<span class="_ _2"></span>esigning your own C<span class="_ _2"></span>arrier Board.<span class="_ _2"></span> </div><div class="t m0 x1 h8 y83 ff4 fs2 fc1 sc0 ls0 ws0"> </div><div class="t m0 x1 h8 y84 ff4 fs2 fc7 sc0 ls0 ws0">http://developer.tora<span class="_ _2"></span>dex.c<span class="_ _2"></span>om/hardware-resourc<span class="_ _2"></span>es/arm<span class="_ _2"></span>-family/carrier-<span class="_ _2"></span>board-design<span class="fc1"> </span></div><div class="t m0 x1 h1a y85 ff3 fs4 fc1 sc0 ls0 ws0">1.3 <span class="_ _f"> </span>A<span class="_ _1"></span>bbre<span class="_ _2"></span>viations </div><div class="c xa y86 wf h1c"><div class="t m0 xb hc y87 ff2 fs5 fc5 sc0 ls0 ws0">Abbreviation </div></div><div class="c x14 y86 w10 h1c"><div class="t m0 xb hc y87 ff2 fs5 fc5 sc0 ls0 ws0">Explana<span class="_ _1"></span>tion </div></div><div class="c xa y88 wf h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">ADC </div></div><div class="c x14 y88 w10 h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">Analogue to Digital<span class="_ _1"></span> Converter </div></div><div class="c xa y8a wf h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">AGND </div></div><div class="c x14 y8a w10 h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">Analogue Groun<span class="_ _1"></span>d - separate grou<span class="_ _1"></span>nd for analogue <span class="_ _1"></span>signals </div></div><div class="c xa y8b wf h1f"><div class="t m0 xb hc y8c ff2 fs5 fc1 sc0 ls0 ws0">Auto-MDIX </div></div><div class="c x14 y8b w10 h1f"><div class="t m0 xb hc y8d ff2 fs5 fc1 sc0 ls0 ws0">Automatically M<span class="_ _1"></span>edium Dependent<span class="_ _1"></span> Interface Cro<span class="_ _1"></span>ssing - a PHY with A<span class="_ _1"></span>uto-MDIX is able to<span class="_ _1"></span> detect whether<span class="_ _1"></span> </div><div class="t m0 xb hc y8e ff2 fs5 fc1 sc0 ls0 ws0">RX and TX<span class="_ _c"></span> <span class="_ _2"></span>need to be crossed<span class="_ _1"></span> (MDI or MDIX<span class="_ _c"></span>) <span class="_ _2"></span> </div></div><div class="c xa y8f wf h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">CAD </div></div><div class="c x14 y8f w10 h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">Computer-Aided Des<span class="_ _1"></span>ign, in this do<span class="_ _c"></span>c<span class="_ _2"></span>ument is referr<span class="_ _1"></span>ed to PCB Layo<span class="_ _1"></span>ut tools </div></div><div class="c xa y90 wf h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">CAN </div></div><div class="c x14 y90 w10 h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">Controller Area Ne<span class="_ _1"></span>twork - a bus tha<span class="_ _1"></span>t is manly used in au<span class="_ _c"></span>t<span class="_ _2"></span>omotive an<span class="_ _c"></span>d industrial environment </div></div><div class="c xa y91 wf h20"><div class="t m0 xb hc y8c ff2 fs5 fc1 sc0 ls0 ws0">CDMA </div></div><div class="c x14 y91 w10 h20"><div class="t m0 xb hc y92 ff2 fs5 fc1 sc0 ls0 ws0">Code Division Mu<span class="_ _1"></span>ltiplex Acces<span class="_ _1"></span>s <span class="_ _2"></span>- an abb<span class="_ _1"></span>reviation often used<span class="_ _1"></span> for a mobile ph<span class="_ _1"></span>one standard for da<span class="_ _c"></span>t<span class="_ _2"></span>a </div><div class="t m0 xb hc y8e ff2 fs5 fc1 sc0 ls0 ws0">communication<span class="_ _1"></span> </div></div><div class="c xa y93 wf h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">CEC </div></div><div class="c x14 y93 w10 h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">Consumer Elec<span class="_ _1"></span>tronic Control - <span class="lsc">a </span>HD<span class="_ _1"></span>MI feature that allow<span class="_ _c"></span>s <span class="_ _2"></span>to contro<span class="_ _1"></span>l CEC compatible<span class="_ _1"></span> devices </div></div><div class="c xa y94 wf h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">CPU </div></div><div class="c x14 y94 w10 h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">Central Processing Uni<span class="_ _c"></span>t </div></div><div class="c xa y95 wf h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">CSI </div></div><div class="c x14 y95 w10 h1d"><div class="t m0 xb hc y89 ff2 fs5 fc1 sc0 ls0 ws0">Camera Serial Inter<span class="_ _1"></span>face </div></div><div class="c xa y96 wf h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">DAC </div></div><div class="c x14 y96 w10 h1e"><div class="t m0 xb hc y87 ff2 fs5 fc1 sc0 ls0 ws0">Digital to Analogu<span class="_ _1"></span>e Converter </div></div><div class="c xa y97 wf h21"><div class="t m0 xb hc y98 ff2 fs5 fc1 sc0 lsd ws0">DDC<span class="ls0"> </span></div></div><div class="c x14 y97 w10 h21"><div class="t m0 xb hc y99 ff2 fs5 fc1 sc0 ls0 ws0">Display Data Ch<span class="_ _1"></span>annel - <span class="lsc">an </span>interface for re<span class="_ _1"></span>ading out the<span class="_ _1"></span> capability of a<span class="_ _1"></span> monitor, in this documen<span class="_ _1"></span>t DDC2B </div><div class="t m0 xb hc y9a ff2 fs5 fc1 sc0 ls0 ws0">(based on I</div><div class="t m0 x15 h22 y9b ff2 fs9 fc1 sc0 ls0 ws0">2</div><div class="t m0 x16 hc y9a ff2 fs5 fc1 sc0 ls0 ws0">C) is alw<span class="_ _c"></span>ays m<span class="_ _2"></span>eant </div></div><div class="c xa y9c wf h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 lsd ws0">DRC<span class="ls0"> </span></div></div><div class="c x14 y9c w10 h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">Design Rule Che<span class="_ _1"></span>ck - a tool for che<span class="_ _1"></span>cking whe<span class="_ _1"></span>ther all design rules are sati<span class="_ _1"></span>sfied in a CAD<span class="_ _1"></span> tool </div></div><div class="c xa y9e wf h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">DSI </div></div><div class="c x14 y9e w10 h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">Display Serial In<span class="_ _1"></span>terface </div></div><div class="c xa ya0 wf h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">DVI </div></div><div class="c x14 ya0 w10 h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">Digital Visual Inter<span class="_ _1"></span>face. Digital sig<span class="_ _1"></span>nals are electrical<span class="_ _1"></span> compatible w<span class="_ _1"></span>ith HDM<span class="_ _1"></span>I<span class="_ _2"></span> </div></div><div class="c xa ya1 wf h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">DVI-A </div></div><div class="c x14 ya1 w10 h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">Digital Visual Inter<span class="_ _1"></span>face Analogue<span class="_ _1"></span> only. Signals are compa<span class="_ _1"></span>tible with VGA<span class="_ _1"></span> </div></div><div class="c xa ya2 wf h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">DVI-D </div></div><div class="c x14 ya2 w10 h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">Digital Visual Interfa<span class="_ _1"></span>ce Digital only. Sign<span class="_ _1"></span>als are electri<span class="_ _1"></span>cal compatible w<span class="_ _c"></span>it<span class="_ _2"></span>h HDMI </div></div><div class="c xa ya3 wf h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">DVI-I </div></div><div class="c x14 ya3 w10 h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">Digital Visual Inter<span class="_ _1"></span>face Integrated. <span class="_ _1"></span>Combines digital and<span class="_ _1"></span> analogue vid<span class="_ _1"></span>eo signals in one <span class="_ _1"></span>connector </div></div><div class="c xa ya4 wf h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">EDA </div></div><div class="c x14 ya4 w10 h1d"><div class="t m0 xb hc y9d ff2 fs5 fc1 sc0 ls0 ws0">Electronic Design<span class="_ _1"></span> Automation - softw<span class="_ _c"></span>are for sc<span class="_ _2"></span>hemati<span class="_ _1"></span>c capture and<span class="_ _1"></span> PCB layout (CAD or ECAD)<span class="_ _1"></span> </div></div><div class="c xa ya5 wf h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">EDID </div></div><div class="c x14 ya5 w10 h1e"><div class="t m0 xb hc y9f ff2 fs5 fc1 sc0 ls0 ws0">Extended<span class="_ _1"></span> Display Identification<span class="_ _1"></span> Data - timing setting<span class="_ _1"></span> information provi<span class="_ _c"></span>ded by the display in a PROM </div></div><div class="c xa ya6 wf h23"><div class="t m0 xb hc ya7 ff2 fs5 fc1 sc0 ls0 ws0">EMC </div></div><div class="c x14 ya6 w10 h23"><div class="t m0 xb hc ya8 ff2 fs5 fc1 sc0 ls0 ws0">Electromagnetic Co<span class="_ _c"></span>mpatibility -theory of unintentional gene<span class="_ _1"></span>ration, pr<span class="_ _1"></span>opagation, and reception o<span class="_ _1"></span>f </div><div class="t m0 xb hc ya9 ff2 fs5 fc1 sc0 ls0 ws0">electromagne<span class="_ _1"></span>tic <span class="lsc">energy</span> </div></div><div class="c xa yaa wf h24"><div class="t m0 xb hc yab ff2 fs5 fc1 sc0 ls0 ws0">EMI </div></div><div class="c x14 yaa w10 h24"><div class="t m0 xb hc yab ff2 fs5 fc1 sc0 ls0 ws0">Electromagnetic Inter<span class="_ _c"></span>f<span class="_ _2"></span>erence - high freq<span class="_ _1"></span>uency disturbance<span class="_ _c"></span>s<span class="_ _2"></span> </div></div><div class="c xa yac wf h25"><div class="t m0 xb hc ya7 ff2 fs5 fc1 sc0 ls0 ws0">eMMC </div></div><div class="c x14 yac w10 h25"><div class="t m0 xb hc yad ff2 fs5 fc1 sc0 ls0 ws0">Embedded Multi<span class="_ _1"></span> Media Card - flash<span class="_ _1"></span> memory combined w<span class="_ _1"></span>ith MMC inte<span class="_ _1"></span>rface controller in a <span class="_ _1"></span>BGA packag<span class="_ _1"></span>e<span class="lse">, </span></div><div class="t m0 xb hc ya9 ff2 fs5 fc1 sc0 ls0 ws0">used as intern<span class="_ _1"></span>al flash memory </div></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.611792,0.000000,0.000000,1.611792,0.000000,0.000000]}'></div></div>
