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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a3534be9ad24cfae1875d/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">1<span class="_ _0"> </span>OMAP3<span class="_ _1"> </span>530/25<span class="_ _2"> </span>Applications<span class="_ _3"> </span>Processor</div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls0 ws0">1.1<span class="_ _4"> </span>Features</div><div class="t m1 x2 h4 y3 ff1 fs2 fc0 sc0 ls0 ws0">OMAP3<span class="_ _5"> </span>530/25<span class="_ _6"> </span>Applications<span class="_ _7"> </span>Processor</div><div class="t m2 x1 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m0 x3 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">SPRS507E<span class="_ _8"> </span>–<span class="_ _9"> </span>FEBRUARY<span class="_ _a"> </span>2008<span class="_ _b"> </span>–<span class="_ _9"> </span>REVISED<span class="_ _c"> </span>AUGUST<span class="_ _d"> </span>2009</div><div class="t m0 x4 h6 y5 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Additional<span class="_ _f"> </span>C64x+™<span class="_ _10"> </span>Enhancements</div><div class="t m0 x1 h7 y6 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">OMAP3<span class="_ _12"> </span>530/25<span class="_ _13"> </span>Applications<span class="_ _14"> </span>Processor:</span></div><div class="t m0 x5 h7 y7 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Protected<span class="_ _15"> </span>Mode<span class="_ _16"> </span>Operation</span></div><div class="t m0 x6 h6 y8 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>OMAP™<span class="_ _17"> </span>3<span class="_ _18"> </span>Architecture</div><div class="t m0 x5 h7 y9 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Exceptions<span class="_ _19"> </span>Support<span class="_ _1a"> </span>for<span class="_ _1b"> </span>Error<span class="_ _1c"> </span>Detection</span></div><div class="t m0 x6 h6 ya ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>MPU<span class="_ _1d"> </span>Subsystem</div><div class="t m0 x7 h6 yb ff1 fs4 fc0 sc0 ls0 ws0">and<span class="_ _1e"> </span>Program<span class="_ _1"> </span>Redirection</div><div class="t m0 x8 h7 yc ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>720-MHz<span class="_ _20"> </span>ARM<span class="_ _21"> </span>Cortex™-A8<span class="_ _22"> </span>Core</span></div><div class="t m0 x5 h7 yd ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Hardware<span class="_ _23"> </span>Support<span class="_ _1a"> </span>for<span class="_ _1b"> </span>Modulo<span class="_ _24"> </span>Loop</span></div><div class="t m0 x8 h7 ye ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">NEON™<span class="_ _25"> </span>SIMD<span class="_ _26"> </span>Coprocessor</span></div><div class="t m0 x7 h6 yf ff1 fs4 fc0 sc0 ls0 ws0">Operation</div><div class="t m0 x6 h6 y10 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>High<span class="_ _1d"> </span>Performance<span class="_ _27"> </span>Image,<span class="_ _28"> </span>Video,<span class="_ _29"> </span>Audio</div><div class="t m0 x9 h7 y11 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">C64x+<span class="_ _2a"> </span>L1/L2<span class="_ _16"> </span>Memory<span class="_ _1a"> </span>Architecture</span></div><div class="t m0 x8 h6 y12 ff1 fs4 fc0 sc0 ls0 ws0">(IVA2.2™)<span class="_ _2b"> </span>Accelerator<span class="_ _2c"> </span>Subsystem</div><div class="t m0 x4 h6 y13 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>32K-Byte<span class="_ _2d"> </span>L1P<span class="_ _2e"> </span>Program<span class="_ _1"> </span>RAM/Cache<span class="_ _2f"> </span>(Direct</div><div class="t m0 x8 h7 y14 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>520-MHz<span class="_ _20"> </span>TMS320C64x+™<span class="_ _30"> </span>DSP</span></div><div class="t m0 x5 h6 y15 ff1 fs4 fc0 sc0 ls0 ws0">Mapped)</div><div class="t m0 xa h6 y16 ff1 fs4 fc0 sc0 ls0 ws0">Core</div><div class="t m0 x4 h6 y17 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>80K-Byte<span class="_ _2d"> </span>L1D<span class="_ _31"> </span>Data<span class="_ _32"> </span>RAM/Cache<span class="_ _2f"> </span>(2-Way</div><div class="t m0 x8 h7 y18 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Enhanced<span class="_ _33"> </span>Direct<span class="_ _34"> </span>Memory<span class="_ _1a"> </span>Access</span></div><div class="t m0 x5 h6 y19 ff1 fs4 fc0 sc0 ls0 ws0">Set-Associative)</div><div class="t m0 xa h6 y1a ff1 fs4 fc0 sc0 ls0 ws0">(EDMA)<span class="_ _35"> </span>Controller<span class="_ _33"> </span>(128<span class="_ _36"> </span>Independent</div><div class="t m0 x4 h6 y1b ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>64K-Byte<span class="_ _2d"> </span>L2<span class="_ _37"> </span>Unified<span class="_ _38"> </span>Mapped<span class="_ _a"> </span>RAM/Cache</div><div class="t m0 xa h6 y1c ff1 fs4 fc0 sc0 ls0 ws0">Channels)</div><div class="t m0 x5 h6 y1d ff1 fs4 fc0 sc0 ls0 ws0">(4-Way<span class="_ _39"> </span>Set-Associative)</div><div class="t m0 x8 h7 y1e ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Video<span class="_ _3a"> </span>Hardware<span class="_ _23"> </span>Accelerators</span></div><div class="t m0 x4 h6 y1f ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>32K-Byte<span class="_ _2d"> </span>L2<span class="_ _37"> </span>Shared<span class="_ _38"> </span>SRAM<span class="_ _3b"> </span>and<span class="_ _1e"> </span>16K-Byte<span class="_ _2d"> </span>L2</div><div class="t m0 x6 h6 y20 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>POWERVR<span class="_ _3c"> </span>SGX™<span class="_ _3d"> </span>Graphics<span class="_ _2d"> </span>Accelerator</div><div class="t m0 x5 h6 y21 ff1 fs4 fc0 sc0 ls0 ws0">ROM</div><div class="t m0 x8 h6 y22 ff1 fs4 fc0 sc0 ls0 ws0">(OMAP3530<span class="_ _2f"> </span>Device<span class="_ _3e"> </span>Only)</div><div class="t m0 x9 h7 y23 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">C64x+<span class="_ _2a"> </span>Instruction<span class="_ _3c"> </span>Set<span class="_ _3f"> </span>Features</span></div><div class="t m0 x8 h7 y24 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Tile<span class="_ _40"> </span>Based<span class="_ _29"> </span>Architecture<span class="_ _41"> </span>Delivering<span class="_ _42"> </span>up<span class="_ _43"> </span>to</span></div><div class="t m0 xa h6 y25 ff1 fs4 fc0 sc0 ls0 ws0">1<span class="_ _44"> </span>0<span class="_ _18"> </span>MPoly/sec</div><div class="t m0 x4 h6 y26 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Byte-Addressable<span class="_ _45"> </span>(8-/16-/32-/64-Bit<span class="_ _46"> </span>Data)</div><div class="t m0 x8 h7 y27 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Universal<span class="_ _47"> </span>Scalable<span class="_ _20"> </span>Shader<span class="_ _38"> </span>Engine:</span></div><div class="t m0 x4 h6 y28 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>8-Bit<span class="_ _1d"> </span>Overflow<span class="_ _48"> </span>Protection</div><div class="t m0 xa h6 y29 ff1 fs4 fc0 sc0 ls0 ws0">Multi-threaded<span class="_ _49"> </span>Engine<span class="_ _4a"> </span>Incorporating</div><div class="t m0 x4 h6 y2a ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Bit-Field<span class="_ _17"> </span>Extract,<span class="_ _4b"> </span>Set,<span class="_ _2e"> </span>Clear</div><div class="t m0 xa h6 y2b ff1 fs4 fc0 sc0 ls0 ws0">Pixel<span class="_ _4c"> </span>and<span class="_ _1e"> </span>Vertex<span class="_ _13"> </span>Shader<span class="_ _38"> </span>Functionality</div><div class="t m0 x4 h6 y2c ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Normalization,<span class="_ _49"> </span>Saturation.<span class="_ _4d"> </span>Bit-Counting</div><div class="t m0 x8 h7 y2d ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Industry<span class="_ _4e"> </span>Standard<span class="_ _2d"> </span>API<span class="_ _4f"> </span>Support:</span></div><div class="t m0 x4 h6 y2e ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Compact<span class="_ _48"> </span>16-Bit<span class="_ _50"> </span>Instructions</div><div class="t m0 xa h6 y2f ff1 fs4 fc0 sc0 ls0 ws0">OpenGLES<span class="_ _51"> </span>1.1<span class="_ _52"> </span>and<span class="_ _1e"> </span>2.0,<span class="_ _4f"> </span>OpenVG1.0</div><div class="t m0 x4 h6 y30 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Additional<span class="_ _f"> </span>Instructions<span class="_ _53"> </span>to<span class="_ _1f"> </span>Support<span class="_ _1a"> </span>Complex</div><div class="t m0 x8 h7 y31 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Fine<span class="_ _54"> </span>Grained<span class="_ _55"> </span>Task<span class="_ _21"> </span>Switching,<span class="_ _56"> </span>Load</span></div><div class="t m0 x5 h6 y32 ff1 fs4 fc0 sc0 ls0 ws0">Multiplies</div><div class="t m0 xa h6 y33 ff1 fs4 fc0 sc0 ls0 ws0">Balancing,<span class="_ _57"> </span>and<span class="_ _1e"> </span>Power<span class="_ _29"> </span>Management</div><div class="t m0 x9 h7 y34 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">ARM<span class="_ _21"> </span>Cortex™-A8<span class="_ _22"> </span>Core</span></div><div class="t m0 x8 h7 y35 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Programmable<span class="_ _58"> </span>High<span class="_ _1d"> </span>Quality<span class="_ _38"> </span>Image</span></div><div class="t m0 x4 h6 y36 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>ARMv7<span class="_ _38"> </span>Architecture</div><div class="t m0 xa h6 y37 ff1 fs4 fc0 sc0 ls0 ws0">Anti-Aliasing</div><div class="t m0 x5 h7 y38 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Trust<span class="_ _26"> </span>Zone®</span></div><div class="t m0 x6 h6 y39 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Fully<span class="_ _4c"> </span>Software-Compatible<span class="_ _59"> </span>With<span class="_ _32"> </span>C64x<span class="_ _5a"> </span>and</div><div class="t m0 x5 h7 y3a ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Thumb®-2</span></div><div class="t m0 x8 h6 y3b ff1 fs4 fc0 sc0 ls0 ws0">ARM9™</div><div class="t m0 x5 h7 y3c ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">MMU<span class="_ _5a"> </span>Enhancements</span></div><div class="t m0 x6 h6 y3d ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Commercial<span class="_ _53"> </span>and<span class="_ _1e"> </span>Extended<span class="_ _47"> </span>Temperature</div><div class="t m0 x8 h6 y3e ff1 fs4 fc0 sc0 ls0 ws0">Grades</div><div class="t m0 x4 h6 y3f ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>In-Order,<span class="_ _5b"> </span>Dual-Issue,<span class="_ _19"> </span>Superscalar</div><div class="t m0 x5 h6 y40 ff1 fs4 fc0 sc0 ls0 ws0">Microprocessor<span class="_ _5c"> </span>Core</div><div class="t m0 x1 h7 y41 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Advanced<span class="_ _33"> </span>Very-Long-Instruction-Word<span class="_ _5d"> </span>(VLIW)</span></div><div class="t m0 x4 h6 y42 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>NEON™<span class="_ _25"> </span>Multimedia<span class="_ _4d"> </span>Architecture</div><div class="t m0 x6 h6 y43 ff1 fs4 fc0 sc0 ls0 ws0">TMS320C64x+™<span class="_ _30"> </span>DSP<span class="_ _54"> </span>Core</div><div class="t m0 x4 h6 y44 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Over<span class="_ _21"> </span>2x<span class="_ _5e"> </span>Performance<span class="_ _27"> </span>of<span class="_ _1f"> </span>ARMv6<span class="_ _38"> </span>SIMD</div><div class="t m0 x6 h6 y45 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Eight<span class="_ _26"> </span>Highly<span class="_ _13"> </span>Independent<span class="_ _5f"> </span>Functional<span class="_ _57"> </span>Units</div><div class="t m0 x4 h6 y46 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Supports<span class="_ _60"> </span>Both<span class="_ _21"> </span>Integer<span class="_ _4a"> </span>and<span class="_ _1e"> </span>Floating<span class="_ _25"> </span>Point</div><div class="t m0 x8 h7 y47 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">+Six<span class="_ _61"> </span>ALUs<span class="_ _16"> </span>(32-/40-Bit),<span class="_ _62"> </span>Each<span class="_ _5a"> </span>Supports</span></div><div class="t m0 x5 h6 y48 ff1 fs4 fc0 sc0 ls0 ws0">SIMD</div><div class="t m0 xa h6 y49 ff1 fs4 fc0 sc0 ls0 ws0">Single<span class="_ _29"> </span>32-Bit,<span class="_ _13"> </span>Dual<span class="_ _32"> </span>16-Bit,<span class="_ _13"> </span>or<span class="_ _63"> </span>Quad<span class="_ _64"> </span>8-Bit</div><div class="t m0 x4 h6 y4a ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Jazelle®<span class="_ _65"> </span>RCT<span class="_ _54"> </span>Execution<span class="_ _33"> </span>Environment</div><div class="t m0 xa h6 y4b ff1 fs4 fc0 sc0 ls0 ws0">Arithmetic<span class="_ _66"> </span>per<span class="_ _3f"> </span>Clock<span class="_ _3a"> </span>Cycle</div><div class="t m0 x5 h6 y4c ff1 fs4 fc0 sc0 ls0 ws0">Architecture</div><div class="t m0 x8 h7 y4d ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Two<span class="_ _36"> </span>Multipliers<span class="_ _56"> </span>Support<span class="_ _1a"> </span>Four<span class="_ _1d"> </span>16<span class="_ _5e"> </span>x<span class="_ _18"> </span>16-Bit</span></div><div class="t m0 x4 h6 y4e ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Dynamic<span class="_ _67"> </span>Branch<span class="_ _68"> </span>Prediction<span class="_ _f"> </span>with<span class="_ _36"> </span>Branch</div><div class="t m0 xa h6 y4f ff1 fs4 fc0 sc0 ls0 ws0">Multiplies<span class="_ _15"> </span>(32-Bit<span class="_ _3d"> </span>Results)<span class="_ _4e"> </span>per<span class="_ _3f"> </span>Clock</div><div class="t m0 x5 h6 y50 ff1 fs4 fc0 sc0 ls0 ws0">Target<span class="_ _13"> </span>Address<span class="_ _17"> </span>Cache,<span class="_ _39"> </span>Global<span class="_ _3d"> </span>History</div><div class="t m0 xa h6 y51 ff1 fs4 fc0 sc0 ls0 ws0">Cycle<span class="_ _69"> </span>or<span class="_ _63"> </span>Eight<span class="_ _26"> </span>8<span class="_ _18"> </span>x<span class="_ _18"> </span>8-Bit<span class="_ _1d"> </span>Multiplies<span class="_ _15"> </span>(16-Bit</div><div class="t m0 x5 h6 y52 ff1 fs4 fc0 sc0 ls0 ws0">Buffer,<span class="_ _3e"> </span>and<span class="_ _1e"> </span>8-Entry<span class="_ _68"> </span>Return<span class="_ _3e"> </span>Stack</div><div class="t m0 xa h6 y53 ff1 fs4 fc0 sc0 ls0 ws0">Results)<span class="_ _4e"> </span>per<span class="_ _3f"> </span>Clock<span class="_ _3a"> </span>Cycle</div><div class="t m0 x4 h6 y54 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Embedded<span class="_ _6"> </span>Trace<span class="_ _69"> </span>Macrocell<span class="_ _15"> </span>(ETM)<span class="_ _50"> </span>Support</div><div class="t m0 x6 h6 y55 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Load-Store<span class="_ _51"> </span>Architecture<span class="_ _41"> </span>With<span class="_ _32"> </span>Non-Aligned</div><div class="t m0 x5 h6 y56 ff1 fs4 fc0 sc0 ls0 ws0">for<span class="_ _1b"> </span>Non-Invasive<span class="_ _6a"> </span>Debug</div><div class="t m0 x8 h6 y57 ff1 fs4 fc0 sc0 ls0 ws0">Support</div><div class="t m0 x6 h6 y58 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>64<span class="_ _5e"> </span>32-Bit<span class="_ _50"> </span>General-Purpose<span class="_ _6b"> </span>Registers</div><div class="t m0 x9 h7 y59 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">ARM<span class="_ _21"> </span>Cortex™-A8<span class="_ _22"> </span>Memory<span class="_ _1a"> </span>Architecture:</span></div><div class="t m0 x6 h6 y5a ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Instruction<span class="_ _3c"> </span>Packing<span class="_ _1a"> </span>Reduces<span class="_ _67"> </span>Code<span class="_ _26"> </span>Size</div><div class="t m0 x4 h6 y5b ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>16K-Byte<span class="_ _2d"> </span>Instruction<span class="_ _3c"> </span>Cache<span class="_ _29"> </span>(4-Way</div><div class="t m0 x5 h6 y5c ff1 fs4 fc0 sc0 ls0 ws0">Set-Associative)</div><div class="t m0 x6 h6 y5d ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>All<span class="_ _6c"> </span>Instructions<span class="_ _53"> </span>Conditional</div><div class="t m0 xb h8 y5e ff2 fs5 fc0 sc0 ls0 ws0">Please<span class="_ _6d"> </span>be<span class="_ _6e"> </span>aware<span class="_ _6f"> </span>that<span class="_ _70"> </span>an<span class="_ _6e"> </span>important<span class="_ _71"> </span>notice<span class="_ _72"> </span>concerning<span class="_ _25"> </span>availability,<span class="_ _73"> </span>standard<span class="_ _74"> </span>warranty,<span class="_ _75"> </span>and<span class="_ _70"> </span>use<span class="_ _76"> </span>in<span class="_ _77"> </span>critical<span class="_ _78"> </span>applications<span class="_ _79"> </span>of<span class="_ _7a"> </span>Texas</div><div class="t m0 xb h8 y5f ff2 fs5 fc0 sc0 ls0 ws0">Instruments<span class="_ _7b"> </span>semiconductor<span class="_ _3c"> </span>products<span class="_ _13"> </span>and<span class="_ _70"> </span>disclaimers<span class="_ _10"> </span>thereto<span class="_ _1c"> </span>appears<span class="_ _d"> </span>at<span class="_ _7a"> </span>the<span class="_ _0"> </span>end<span class="_ _70"> </span>of<span class="_ _7a"> </span>this<span class="_ _43"> </span>document.</div><div class="t m0 xc h8 y60 ff2 fs5 fc0 sc0 ls0 ws0">POWERVR<span class="_ _1"> </span>SGX<span class="_ _7c"> </span>is<span class="_ _18"> </span>a<span class="_ _44"> </span>trademark<span class="_ _7d"> </span>of<span class="_ _7a"> </span>Imagination<span class="_ _1"> </span>Technologies<span class="_ _2b"> </span>Ltd.</div><div class="t m0 xc h8 y61 ff2 fs5 fc0 sc0 ls0 ws0">OMAP<span class="_ _4c"> </span>is<span class="_ _7e"> </span>a<span class="_ _44"> </span>trademark<span class="_ _7d"> </span>of<span class="_ _7a"> </span>Texas<span class="_ _6f"> </span>Instruments.</div><div class="t m0 xc h8 y62 ff2 fs5 fc0 sc0 ls0 ws0">All<span class="_ _6e"> </span>other<span class="_ _7f"> </span>trademarks<span class="_ _10"> </span>are<span class="_ _5e"> </span>the<span class="_ _80"> </span>property<span class="_ _81"> </span>of<span class="_ _7a"> </span>their<span class="_ _82"> </span>respective<span class="_ _35"> </span>owners.</div><div class="t m0 x1 h9 y63 ff2 fs6 fc0 sc0 ls0 ws0">PRODUCTION<span class="_ _17"> </span>DATA<span class="_ _3f"> </span>information<span class="_ _83"> </span>is<span class="_ _44"> </span>current<span class="_ _84"> </span>as<span class="_ _77"> </span>of<span class="_ _85"> </span>publication<span class="_ _34"> </span>date.</div><div class="t m0 xd h5 y64 ff2 fs3 fc0 sc0 ls0 ws0">Copyright<span class="_ _3b"> </span>©<span class="_ _86"> </span>2008–2009,<span class="_ _87"> </span>Texas<span class="_ _4"> </span>Instruments<span class="_ _35"> </span>Incorporated</div><div class="t m0 x1 h9 y65 ff2 fs6 fc0 sc0 ls0 ws0">Products<span class="_ _5a"> </span>conform<span class="_ _88"> </span>to<span class="_ _89"> </span>specifications<span class="_ _8a"> </span>per<span class="_ _8b"> </span>the<span class="_ _6e"> </span>terms<span class="_ _82"> </span>of<span class="_ _7e"> </span>the<span class="_ _6e"> </span>Texas</div><div class="t m0 x1 h9 y66 ff2 fs6 fc0 sc0 ls0 ws0">Instruments<span class="_ _28"> </span>standard<span class="_ _8c"> </span>warranty.<span class="_ _26"> </span>Production<span class="_ _81"> </span>processing<span class="_ _83"> </span>does<span class="_ _1b"> </span>not</div><div class="t m0 x1 h9 y67 ff2 fs6 fc0 sc0 ls0 ws0">necessarily<span class="_ _3b"> </span>include<span class="_ _2e"> </span>testing<span class="_ _8d"> </span>of<span class="_ _8e"> </span>all<span class="_ _7e"> </span>parameters.</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a3534be9ad24cfae1875d/bg2.jpg"><div class="t m1 x1 h4 y3 ff1 fs2 fc0 sc0 ls0 ws0">OMAP3<span class="_ _5"> </span>530/25<span class="_ _6"> </span>Applications<span class="_ _7"> </span>Processor</div><div class="t m0 x1 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">SPRS507E<span class="_ _8"> </span>–<span class="_ _9"> </span>FEBRUARY<span class="_ _a"> </span>2008<span class="_ _b"> </span>–<span class="_ _9"> </span>REVISED<span class="_ _c"> </span>AUGUST<span class="_ _d"> </span>2009</div><div class="t m2 xe h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m0 x6 h7 y68 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>16K-Byte<span class="_ _2d"> </span>Data<span class="_ _32"> </span>Cache<span class="_ _29"> </span>(4-Way<span class="_ _8f"> </span><span class="ff3">•<span class="_ _11"> </span></span>Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>24-Bit<span class="_ _50"> </span>RGB</div><div class="t m0 x8 h6 y69 ff1 fs4 fc0 sc0 ls0 ws0">Set-Associative)</div><div class="t m0 x5 h7 y6a ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">HD<span class="_ _b"> </span>Maximum<span class="_ _15"> </span>Resolution</span></div><div class="t m0 x6 h6 y6b ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>256K-Byte<span class="_ _f"> </span>L2<span class="_ _37"> </span>Cache</div><div class="t m0 x5 h7 y6c ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Supports<span class="_ _60"> </span>Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>2<span class="_ _18"> </span>LCD<span class="_ _54"> </span>Panels</span></div><div class="t m0 x1 h7 y6d ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">112K-Byte<span class="_ _f"> </span>ROM</span></div><div class="t m0 x5 h7 y6e ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Support<span class="_ _1a"> </span>for<span class="_ _1b"> </span>Remote<span class="_ _4b"> </span>Frame<span class="_ _29"> </span>Buffer</span></div><div class="t m0 x7 h6 y6f ff1 fs4 fc0 sc0 ls0 ws0">Interface<span class="_ _67"> </span>(RFBI)<span class="_ _29"> </span>LCD<span class="_ _54"> </span>Panels</div><div class="t m0 x1 h7 y70 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">64K-Byte<span class="_ _2d"> </span>Shared<span class="_ _38"> </span>SRAM</span></div><div class="t m0 x4 h6 y71 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>2<span class="_ _18"> </span>10-Bit<span class="_ _50"> </span>Digital-to-Analog<span class="_ _6b"> </span>Converters</div><div class="t m0 x1 h7 y72 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Endianess:</span></div><div class="t m0 x5 h6 y73 ff1 fs4 fc0 sc0 ls0 ws0">(DACs)<span class="_ _38"> </span>Supporting:</div><div class="t m0 x6 h6 y74 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>ARM<span class="_ _21"> </span>Instructions<span class="_ _53"> </span>-<span class="_ _90"> </span>Little<span class="_ _5a"> </span>Endian</div><div class="t m0 x5 h7 y75 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Composite<span class="_ _3c"> </span>NTSC/PAL<span class="_ _56"> </span>Video</span></div><div class="t m0 x6 h6 y76 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>ARM<span class="_ _21"> </span>Data<span class="_ _32"> </span>–<span class="_ _18"> </span>Configurable</div><div class="t m0 x5 h7 y77 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Luma/Chroma<span class="_ _91"> </span>Separate<span class="_ _5b"> </span>Video<span class="_ _3a"> </span>(S-Video)</span></div><div class="t m0 x6 h6 y78 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>DSP<span class="_ _54"> </span>Instruction/Data<span class="_ _92"> </span>-<span class="_ _90"> </span>Little<span class="_ _5a"> </span>Endian</div><div class="t m0 x4 h6 y79 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Rotation<span class="_ _20"> </span>90-,<span class="_ _8d"> </span>180-,<span class="_ _93"> </span>and<span class="_ _1e"> </span>270-degrees</div><div class="t m0 x1 h7 y7a ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">External<span class="_ _4e"> </span>Memory<span class="_ _1a"> </span>Interfaces:</span></div><div class="t m0 x4 h6 y7b ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Resize<span class="_ _28"> </span>Images<span class="_ _68"> </span>From<span class="_ _26"> </span>1/4x<span class="_ _94"> </span>to<span class="_ _1f"> </span>8x</div><div class="t m0 x6 h6 y7c ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>SDRAM<span class="_ _4b"> </span>Controller<span class="_ _33"> </span>(SDRC)</div><div class="t m0 x4 h6 y7d ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Color<span class="_ _16"> </span>Space<span class="_ _3b"> </span>Converter</div><div class="t m0 x8 h7 y7e ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">16,<span class="_ _52"> </span>32-bit<span class="_ _69"> </span>Memory<span class="_ _1a"> </span>Controller<span class="_ _33"> </span>With</span></div><div class="t m0 x4 h6 y7f ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>8-bit<span class="_ _72"> </span>Alpha<span class="_ _50"> </span>Blending</div><div class="t m0 xa h6 y80 ff1 fs4 fc0 sc0 ls0 ws0">1G-Byte<span class="_ _1a"> </span>Total<span class="_ _5a"> </span>Address<span class="_ _17"> </span>Space</div><div class="t m0 x9 h7 y81 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Serial<span class="_ _3a"> </span>Communication</span></div><div class="t m0 x8 h7 y82 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Interfaces<span class="_ _2b"> </span>to<span class="_ _1f"> </span>Low-Power<span class="_ _19"> </span>Double<span class="_ _38"> </span>Data</span></div><div class="t m0 x4 h6 y83 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>5<span class="_ _18"> </span>Multichannel<span class="_ _27"> </span>Buffered<span class="_ _1"> </span>Serial<span class="_ _3a"> </span>Ports</div><div class="t m0 xa h6 y84 ff1 fs4 fc0 sc0 ls0 ws0">Rate<span class="_ _32"> </span>(LPDDR)<span class="_ _1"> </span>SDRAM</div><div class="t m0 x5 h6 y85 ff1 fs4 fc0 sc0 ls0 ws0">(McBSPs)</div><div class="t m0 x8 h7 y86 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">SDRAM<span class="_ _4b"> </span>Memory<span class="_ _1a"> </span>Scheduler<span class="_ _42"> </span>(SMS)<span class="_ _34"> </span>and</span></div><div class="t m0 x5 h7 y87 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">512<span class="_ _4f"> </span>Byte<span class="_ _32"> </span>Transmit/Receive<span class="_ _95"> </span>Buffer</span></div><div class="t m0 xa h6 y88 ff1 fs4 fc0 sc0 ls0 ws0">Rotation<span class="_ _20"> </span>Engine</div><div class="t m0 x7 h6 y89 ff1 fs4 fc0 sc0 ls0 ws0">(McBSP1/3/4/5)</div><div class="t m0 x6 h6 y8a ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>General<span class="_ _96"> </span>Purpose<span class="_ _17"> </span>Memory<span class="_ _1a"> </span>Controller</div><div class="t m0 x5 h7 y8b ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">5K-Byte<span class="_ _a"> </span>Transmit/Receive<span class="_ _95"> </span>Buffer</span></div><div class="t m0 x8 h6 y8c ff1 fs4 fc0 sc0 ls0 ws0">(GPMC)</div><div class="t m0 x7 h6 y8d ff1 fs4 fc0 sc0 ls0 ws0">(McBSP2)</div><div class="t m0 x8 h7 y8e ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">16-bit<span class="_ _69"> </span>Wide<span class="_ _5a"> </span>Multiplexed<span class="_ _2c"> </span>Address/Data</span></div><div class="t m0 x5 h7 y8f ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">SIDETONE<span class="_ _6"> </span>Core<span class="_ _21"> </span>Support<span class="_ _1a"> </span>(McBSP2<span class="_ _2d"> </span>and<span class="_ _1e"> </span>3</span></div><div class="t m0 xa h6 y90 ff1 fs4 fc0 sc0 ls0 ws0">Bus</div><div class="t m0 x7 h6 y91 ff1 fs4 fc0 sc0 ls0 ws0">Only)<span class="_ _64"> </span>For<span class="_ _97"> </span>Filter,<span class="_ _3a"> </span>Gain,<span class="_ _26"> </span>and<span class="_ _1e"> </span>Mix</div><div class="t m0 x8 h7 y92 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>8<span class="_ _18"> </span>Chip<span class="_ _1d"> </span>Select<span class="_ _3b"> </span>Pins<span class="_ _72"> </span>With<span class="_ _32"> </span>128M-Byte</span></div><div class="t m0 x7 h6 y93 ff1 fs4 fc0 sc0 ls0 ws0">Operations</div><div class="t m0 xa h6 y94 ff1 fs4 fc0 sc0 ls0 ws0">Address<span class="_ _17"> </span>Space<span class="_ _3b"> </span>per<span class="_ _3f"> </span>Chip<span class="_ _1d"> </span>Select<span class="_ _3b"> </span>Pin</div><div class="t m0 x5 h7 y95 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Direct<span class="_ _34"> </span>Interface<span class="_ _67"> </span>to<span class="_ _1f"> </span>I2S<span class="_ _98"> </span>and<span class="_ _1e"> </span>PCM<span class="_ _1d"> </span>Device</span></div><div class="t m0 x8 h7 y96 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Glueless<span class="_ _67"> </span>Interface<span class="_ _67"> </span>to<span class="_ _1f"> </span>NOR<span class="_ _1d"> </span>Flash,<span class="_ _99"> </span>NAND</span></div><div class="t m0 x7 h6 y97 ff1 fs4 fc0 sc0 ls0 ws0">and<span class="_ _1e"> </span>TDM<span class="_ _32"> </span>Buses</div><div class="t m0 xa h6 y98 ff1 fs4 fc0 sc0 ls0 ws0">Flash<span class="_ _16"> </span>(With<span class="_ _26"> </span>ECC<span class="_ _72"> </span>Hamming<span class="_ _23"> </span>Code</div><div class="t m0 x5 h7 y99 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">128<span class="_ _4f"> </span>Channel<span class="_ _4e"> </span>Transmit/Receive<span class="_ _95"> </span>Mode</span></div><div class="t m0 xa h6 y9a ff1 fs4 fc0 sc0 ls0 ws0">Calculation),<span class="_ _14"> </span>SRAM<span class="_ _3b"> </span>and<span class="_ _1e"> </span>Pseudo-SRAM</div><div class="t m0 x4 h6 y9b ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Four<span class="_ _1d"> </span>Master/Slave<span class="_ _27"> </span>Multichannel<span class="_ _27"> </span>Serial<span class="_ _3a"> </span>Port</div><div class="t m0 x8 h7 y9c ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Flexible<span class="_ _96"> </span>Asynchronous<span class="_ _58"> </span>Protocol<span class="_ _20"> </span>Control</span></div><div class="t m0 x5 h6 y9d ff1 fs4 fc0 sc0 ls0 ws0">Interface<span class="_ _67"> </span>(McSPI)<span class="_ _4b"> </span>Ports</div><div class="t m0 xa h6 y9e ff1 fs4 fc0 sc0 ls0 ws0">for<span class="_ _1b"> </span>Interface<span class="_ _67"> </span>to<span class="_ _1f"> </span>Custom<span class="_ _96"> </span>Logic<span class="_ _69"> </span>(FPGA,</div><div class="t m0 x4 h6 y9f ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>High-Speed/Full-Speed/Low-Speed<span class="_ _9a"> </span>USB</div><div class="t m0 xa h6 ya0 ff1 fs4 fc0 sc0 ls0 ws0">CPLD,<span class="_ _29"> </span>ASICs,<span class="_ _3e"> </span>etc.)</div><div class="t m0 x5 h6 ya1 ff1 fs4 fc0 sc0 ls0 ws0">OTG<span class="_ _32"> </span>Subsystem<span class="_ _19"> </span>(12-/8-Pin<span class="_ _47"> </span>ULPI<span class="_ _21"> </span>Interface)</div><div class="t m0 x8 h7 ya2 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Nonmultiplexed<span class="_ _5c"> </span>Address/Data<span class="_ _9b"> </span>Mode</span></div><div class="t m0 x4 h6 ya3 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>High-Speed/Full-Speed/Low-Speed</div><div class="t m0 xa h6 ya4 ff1 fs4 fc0 sc0 ls0 ws0">(Limited<span class="_ _25"> </span>2K-Byte<span class="_ _a"> </span>Address<span class="_ _65"> </span>Space)</div><div class="t m0 x5 h6 ya5 ff1 fs4 fc0 sc0 ls0 ws0">Multiport<span class="_ _48"> </span>USB<span class="_ _72"> </span>Host<span class="_ _1d"> </span>Subsystem</div><div class="t m0 x1 h7 ya6 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">System<span class="_ _24"> </span>Direct<span class="_ _34"> </span>Memory<span class="_ _1a"> </span>Access<span class="_ _9c"> </span>(sDMA)</span></div><div class="t m0 x5 h7 ya7 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">12-/8-Pin<span class="_ _67"> </span>ULPI<span class="_ _21"> </span>Interface<span class="_ _67"> </span>or<span class="_ _63"> </span>6-/4-/3-Pin</span></div><div class="t m0 x6 h6 y3f ff1 fs4 fc0 sc0 ls0 ws0">Controller<span class="_ _33"> </span>(32<span class="_ _b"> </span>Logical<span class="_ _9c"> </span>Channels<span class="_ _47"> </span>With</div><div class="t m0 x7 h6 ya8 ff1 fs4 fc0 sc0 ls0 ws0">Serial<span class="_ _3a"> </span>Interface</div><div class="t m0 x6 h6 ya9 ff1 fs4 fc0 sc0 ls0 ws0">Configurable<span class="_ _9d"> </span>Priority)</div><div class="t m0 x5 h7 yaa ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Supports<span class="_ _60"> </span>Transceiverless<span class="_ _9e"> </span>Link<span class="_ _54"> </span>Logic</span></div><div class="t m0 x1 h7 yab ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Camera<span class="_ _4b"> </span>Image<span class="_ _99"> </span>Signal<span class="_ _29"> </span>Processing<span class="_ _9f"> </span>(ISP)</span></div><div class="t m0 x7 h6 yac ff1 fs4 fc0 sc0 ls0 ws0">(TLL)</div><div class="t m0 x6 h6 yad ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>CCD<span class="_ _32"> </span>and<span class="_ _1e"> </span>CMOS<span class="_ _29"> </span>Imager<span class="_ _39"> </span>Interface</div><div class="t m0 x4 h6 yae ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>One<span class="_ _94"> </span>HDQ/1-Wire<span class="_ _2f"> </span>Interface</div><div class="t m0 x6 h6 yaf ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Memory<span class="_ _1a"> </span>Data<span class="_ _32"> </span>Input</div><div class="t m0 x4 h6 yb0 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Three<span class="_ _3a"> </span>UARTs<span class="_ _4a"> </span>(One<span class="_ _21"> </span>with<span class="_ _36"> </span>Infrared<span class="_ _96"> </span>Data</div><div class="t m0 x6 h6 yb1 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>RAW<span class="_ _5a"> </span>Data<span class="_ _32"> </span>Interface</div><div class="t m0 x5 h6 yb2 ff1 fs4 fc0 sc0 ls0 ws0">Association<span class="_ _a0"> </span>[IrDA]<span class="_ _50"> </span>and<span class="_ _1e"> </span>Consumer<span class="_ _66"> </span>Infrared</div><div class="t m0 x6 h6 yb3 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>BT.601/BT.656<span class="_ _a1"> </span>Digital<span class="_ _13"> </span>YCbCr<span class="_ _3d"> </span>4:2:2</div><div class="t m0 x5 h6 yb4 ff1 fs4 fc0 sc0 ls0 ws0">[CIR]<span class="_ _5a"> </span>Modes)</div><div class="t m0 x8 h6 yb5 ff1 fs4 fc0 sc0 ls0 ws0">(8-/16-Bit)<span class="_ _15"> </span>Interface</div><div class="t m0 x4 h6 yb6 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Three<span class="_ _3a"> </span>Master/Slave<span class="_ _27"> </span>High-Speed</div><div class="t m0 x6 h6 yb7 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>A-Law<span class="_ _29"> </span>Compression<span class="_ _a2"> </span>and<span class="_ _1e"> </span>Decompression</div><div class="t m0 x5 h6 yb8 ff1 fs4 fc0 sc0 ls0 ws0">Inter-Integrated<span class="_ _a3"> </span>Circuit<span class="_ _28"> </span>(I2C)<span class="_ _1d"> </span>Controllers</div><div class="t m0 x6 h6 yb9 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Preview<span class="_ _55"> </span>Engine<span class="_ _4a"> </span>for<span class="_ _1b"> </span>Real-Time<span class="_ _33"> </span>Image</div><div class="t m0 x9 h7 yba ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Removable<span class="_ _19"> </span>Media<span class="_ _34"> </span>Interfaces:</span></div><div class="t m0 x8 h6 ybb ff1 fs4 fc0 sc0 ls0 ws0">Processing</div><div class="t m0 x4 h6 ybc ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Three<span class="_ _3a"> </span>Multimedia<span class="_ _4d"> </span>Card<span class="_ _21"> </span>(MMC)/<span class="_ _4a"> </span>Secure</div><div class="t m0 x6 h6 ybd ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Glueless<span class="_ _67"> </span>Interface<span class="_ _67"> </span>to<span class="_ _1f"> </span>Common<span class="_ _2d"> </span>Video</div><div class="t m0 x5 h6 ybe ff1 fs4 fc0 sc0 ls0 ws0">Digital<span class="_ _13"> </span>(SD)<span class="_ _54"> </span>With<span class="_ _32"> </span>Secure<span class="_ _4a"> </span>Data<span class="_ _32"> </span>I/O<span class="_ _1b"> </span>(SDIO)</div><div class="t m0 x8 h6 ybf ff1 fs4 fc0 sc0 ls0 ws0">Decoders</div><div class="t m0 x9 h7 yc0 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Comprehensive<span class="_ _5c"> </span>Power,<span class="_ _39"> </span>Reset,<span class="_ _29"> </span>and<span class="_ _1e"> </span>Clock</span></div><div class="t m0 x6 h6 yc1 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Histogram<span class="_ _66"> </span>Module/Auto-Exposure,</div><div class="t m0 x4 h6 yc2 ff1 fs4 fc0 sc0 ls0 ws0">Management</div><div class="t m0 x8 h6 yc3 ff1 fs4 fc0 sc0 ls0 ws0">Auto-White<span class="_ _19"> </span>Balance,<span class="_ _1"> </span>and<span class="_ _1e"> </span>Auto-Focus</div><div class="t m0 x4 h6 yc4 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>SmartReflex™<span class="_ _a1"> </span>Technology</div><div class="t m0 x8 h6 yc5 ff1 fs4 fc0 sc0 ls0 ws0">Engine</div><div class="t m0 x4 h6 yc6 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Dynamic<span class="_ _67"> </span>Voltage<span class="_ _35"> </span>and<span class="_ _1e"> </span>Frequency<span class="_ _57"> </span>Scaling</div><div class="t m0 x6 h6 yc7 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Resize<span class="_ _28"> </span>Engine</div><div class="t m0 x5 h6 yc8 ff1 fs4 fc0 sc0 ls0 ws0">(DVFS)</div><div class="t m0 x8 h7 yc9 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Resize<span class="_ _28"> </span>Images<span class="_ _68"> </span>From<span class="_ _26"> </span>1/4x<span class="_ _94"> </span>to<span class="_ _1f"> </span>4x</span></div><div class="t m0 x9 h7 yca ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Test<span class="_ _54"> </span>Interfaces</span></div><div class="t m0 x8 h7 ycb ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Separate<span class="_ _5b"> </span>Horizontal/Vertical<span class="_ _a4"> </span>Control</span></div><div class="t m0 x4 h6 ycc ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>IEEE-1149.1<span class="_ _a0"> </span>(JTAG)<span class="_ _4a"> </span>Boundary-Scan</div><div class="t m0 x1 h7 ycd ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Display<span class="_ _24"> </span>Subsystem</span></div><div class="t m0 x5 h6 yce ff1 fs4 fc0 sc0 ls0 ws0">Compatible</div><div class="t m0 x6 h6 ycf ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Parallel<span class="_ _24"> </span>Digital<span class="_ _13"> </span>Output</div><div class="t m0 x8 ha yd0 ff4 fs5 fc0 sc0 ls0 ws0">OMAP3<span class="_ _a5"> </span>530/25<span class="_ _6d"> </span>Applications<span class="_ _48"> </span>Processor<span class="_ _a6"></span><span class="ff2">CopyrightNote<span class="_ _a7"> </span><span class="ff4 fc1">Submit<span class="_ _a8"> </span>Documentation<span class="_ _a9"> </span>Feedback</span></span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a3534be9ad24cfae1875d/bg3.jpg"><div class="t m1 x2 h4 y3 ff1 fs2 fc0 sc0 ls0 ws0">OMAP3<span class="_ _5"> </span>530/25<span class="_ _6"> </span>Applications<span class="_ _7"> </span>Processor</div><div class="t m2 x1 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m0 x3 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">SPRS507E<span class="_ _8"> </span>–<span class="_ _9"> </span>FEBRUARY<span class="_ _a"> </span>2008<span class="_ _b"> </span>–<span class="_ _9"> </span>REVISED<span class="_ _c"> </span>AUGUST<span class="_ _d"> </span>2009</div><div class="t m0 x6 h6 y68 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Embedded<span class="_ _6"> </span>Trace<span class="_ _a5"> </span>Macro<span class="_ _3b"> </span>Interface<span class="_ _67"> </span>(ETM)</div><div class="t m0 x9 h7 yd1 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">1.8-V<span class="_ _5a"> </span>I/O<span class="_ _1b"> </span>and<span class="_ _1e"> </span>3.0-V<span class="_ _5a"> </span>(MMC1<span class="_ _39"> </span>only),</span></div><div class="t m0 x6 h6 y6a ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Serial<span class="_ _3a"> </span>Data<span class="_ _32"> </span>Transport<span class="_ _aa"> </span>Interface<span class="_ _67"> </span>(SDTI)</div><div class="t m0 x4 h6 yd2 ff1 fs4 fc0 sc0 ls0 ws0">0.985-V<span class="_ _9c"> </span>to<span class="_ _1f"> </span>1.35-V<span class="_ _3b"> </span>Adaptive<span class="_ _5b"> </span>Processor<span class="_ _f"> </span>Core</div><div class="t m0 x4 h6 yd3 ff1 fs4 fc0 sc0 ls0 ws0">Voltage</div><div class="t m0 x1 h7 yd4 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">12<span class="_ _5e"> </span>32-bit<span class="_ _69"> </span>General<span class="_ _96"> </span>Purpose<span class="_ _17"> </span>Timers</span></div><div class="t m0 x4 h6 yd5 ff1 fs4 fc0 sc0 ls0 ws0">0.985-V<span class="_ _9c"> </span>to<span class="_ _1f"> </span>1.35-V<span class="_ _3b"> </span>Adaptive<span class="_ _5b"> </span>Core<span class="_ _21"> </span>Logic<span class="_ _69"> </span>Voltage</div><div class="t m0 x1 h7 yd6 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">2<span class="_ _18"> </span>32-bit<span class="_ _69"> </span>Watchdog<span class="_ _42"> </span>Timers</span></div><div class="t m0 x4 h6 yd7 ff1 fs4 fc0 sc0 ls0 ws0">Note:<span class="_ _64"> </span>These<span class="_ _99"> </span>are<span class="_ _98"> </span>default<span class="_ _39"> </span>Operating</div><div class="t m0 x1 h7 yd8 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">1<span class="_ _18"> </span>32-bit<span class="_ _69"> </span>32-kHz<span class="_ _3e"> </span>Sync<span class="_ _5a"> </span>Timer</span></div><div class="t m0 x4 h6 yd9 ff1 fs4 fc0 sc0 ls0 ws0">Performance<span class="_ _27"> </span>Point<span class="_ _26"> </span>(OPP)<span class="_ _50"> </span>voltages<span class="_ _20"> </span>and<span class="_ _1e"> </span>could</div><div class="t m0 x1 h7 yda ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Up<span class="_ _1b"> </span>to<span class="_ _1f"> </span>188<span class="_ _7c"> </span>General-Purpose<span class="_ _6b"> </span>I/O<span class="_ _ab"> </span>(GPIO)<span class="_ _28"> </span>Pins</span></div><div class="t m0 x4 h6 ydb ff1 fs4 fc0 sc0 ls0 ws0">be<span class="_ _37"> </span>optimized<span class="_ _aa"> </span>to<span class="_ _1f"> </span>lower<span class="_ _16"> </span>values<span class="_ _3d"> </span>using</div><div class="t m0 x6 h6 ydc ff1 fs4 fc0 sc0 ls0 ws0">(Multiplexed<span class="_ _ac"> </span>With<span class="_ _32"> </span>Other<span class="_ _69"> </span>Device<span class="_ _3e"> </span>Functions)</div><div class="t m0 x4 h6 ydd ff1 fs4 fc0 sc0 ls0 ws0">SmartReflex™<span class="_ _a1"> </span>AVS.</div><div class="t m0 x1 h7 yde ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">65-nm<span class="_ _3b"> </span>CMOS<span class="_ _29"> </span>Technology</span></div><div class="t m0 x9 h7 ydf ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Applications:</span></div><div class="t m0 x1 h7 ye0 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Package-On-Package<span class="_ _ad"> </span>(POP)<span class="_ _50"> </span>Implementation</span></div><div class="t m0 x4 h6 ye1 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Portable<span class="_ _17"> </span>Navigation<span class="_ _6"> </span>Devices</div><div class="t m0 x6 h6 ye2 ff1 fs4 fc0 sc0 ls0 ws0">for<span class="_ _1b"> </span>Memory<span class="_ _1a"> </span>Stacking<span class="_ _67"> </span>(Not<span class="_ _36"> </span>Available<span class="_ _60"> </span>in<span class="_ _8b"> </span>CUS</div><div class="t m0 x4 h6 ye3 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Portable<span class="_ _17"> </span>Media<span class="_ _34"> </span>Player</div><div class="t m0 x6 h6 ye4 ff1 fs4 fc0 sc0 ls0 ws0">Package)</div><div class="t m0 x4 h6 ye5 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Advanced<span class="_ _33"> </span>Portable<span class="_ _17"> </span>Consumer<span class="_ _66"> </span>Electronics</div><div class="t m0 x1 h7 ye6 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Discrete<span class="_ _4e"> </span>Memory<span class="_ _1a"> </span>Interface<span class="_ _67"> </span>(Not<span class="_ _36"> </span>Available<span class="_ _60"> </span>in</span></div><div class="t m0 x4 h6 ye7 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Digital<span class="_ _13"> </span>TV</div><div class="t m0 x6 h6 ye8 ff1 fs4 fc0 sc0 ls0 ws0">CBC<span class="_ _32"> </span>Package)</div><div class="t m0 x4 h6 ye9 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Digital<span class="_ _13"> </span>Video<span class="_ _3a"> </span>Camera</div><div class="t m0 x1 h7 yea ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff1">Packages:</span></div><div class="t m0 x4 h6 yeb ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Portable<span class="_ _17"> </span>Data<span class="_ _32"> </span>Collection</div><div class="t m0 x6 h6 yec ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>515-pin<span class="_ _9c"> </span>s-PBGA<span class="_ _a"> </span>package<span class="_ _65"> </span>(CBB<span class="_ _26"> </span>Suffix),</div><div class="t m0 x4 h6 yed ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Point-of-Sale<span class="_ _9d"> </span>Devices</div><div class="t m0 x8 h6 yee ff1 fs4 fc0 sc0 ls0 ws0">.5mm<span class="_ _16"> </span>Ball<span class="_ _2e"> </span>Pitch<span class="_ _1c"> </span>(Top),<span class="_ _50"> </span>.4mm<span class="_ _16"> </span>Ball<span class="_ _2e"> </span>Pitch</div><div class="t m0 x4 h6 yef ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Gaming</div><div class="t m0 x8 h6 yf0 ff1 fs4 fc0 sc0 ls0 ws0">(Bottom)</div><div class="t m0 x4 h6 y21 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Web<span class="_ _72"> </span>Tablet</div><div class="t m0 x6 h6 yf1 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>515-pin<span class="_ _9c"> </span>s-PBGA<span class="_ _a"> </span>package<span class="_ _65"> </span>(CBC<span class="_ _26"> </span>Suffix),</div><div class="t m0 x4 h6 yf2 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Smart<span class="_ _34"> </span>White<span class="_ _3a"> </span>Goods</div><div class="t m0 x8 h6 yf3 ff1 fs4 fc0 sc0 ls0 ws0">.65mm<span class="_ _28"> </span>Ball<span class="_ _2e"> </span>Pitch<span class="_ _1c"> </span>(Top),<span class="_ _50"> </span>.5mm<span class="_ _16"> </span>Ball<span class="_ _2e"> </span>Pitch</div><div class="t m0 x4 h6 yf4 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Smart<span class="_ _34"> </span>Home<span class="_ _50"> </span>Controllers</div><div class="t m0 x8 h6 yf5 ff1 fs4 fc0 sc0 ls0 ws0">(Bottom)</div><div class="t m0 x4 h6 yf6 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>Ultra<span class="_ _21"> </span>Mobile<span class="_ _28"> </span>Devices</div><div class="t m0 x6 h6 yf7 ff1 fs4 fc0 sc0 ls0 ws0">–<span class="_ _e"> </span>423-pin<span class="_ _9c"> </span>s-PBGA<span class="_ _a"> </span>package<span class="_ _65"> </span>(CUS<span class="_ _1c"> </span>Suffix),</div><div class="t m0 x8 h6 yf8 ff1 fs4 fc0 sc0 ls0 ws0">.65mm<span class="_ _28"> </span>Ball<span class="_ _2e"> </span>Pitch</div><div class="t m0 x1 ha yd0 ff4 fs5 fc1 sc0 ls0 ws0">Submit<span class="_ _a8"> </span>Documentation<span class="_ _a9"> </span>Feedback<span class="_ _ae"> </span><span class="fc0">OMAP3<span class="_ _a5"> </span>530/25<span class="_ _6d"> </span>Applications<span class="_ _48"> </span>Processor<span class="_ _2b"> </span><span class="ff2">3</span></span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>
<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a3534be9ad24cfae1875d/bg4.jpg"><div class="t m0 x1 h3 y68 ff1 fs1 fc0 sc0 ls0 ws0">1.2<span class="_ _4"> </span>Description</div><div class="t m1 x1 h4 y3 ff1 fs2 fc0 sc0 ls0 ws0">OMAP3<span class="_ _5"> </span>530/25<span class="_ _6"> </span>Applications<span class="_ _7"> </span>Processor</div><div class="t m0 x1 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">SPRS507E<span class="_ _8"> </span>–<span class="_ _9"> </span>FEBRUARY<span class="_ _a"> </span>2008<span class="_ _b"> </span>–<span class="_ _9"> </span>REVISED<span class="_ _c"> </span>AUGUST<span class="_ _d"> </span>2009</div><div class="t m2 xe h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m0 x8 hb yf9 ff2 fs4 fc0 sc0 ls0 ws0">OMAP3530<span class="_ _af"> </span>and<span class="_ _84"> </span>OMAP3525<span class="_ _af"> </span>high-performance,<span class="_ _b0"> </span>applications<span class="_ _b1"> </span>processors<span class="_ _b2"> </span>are<span class="_ _97"> </span>based<span class="_ _d"> </span>on<span class="_ _76"> </span>the<span class="_ _3f"> </span>enhanced</div><div class="t m0 x8 hb y2 ff2 fs4 fc0 sc0 ls0 ws0">OMAP™<span class="_ _4e"> </span>3<span class="_ _18"> </span>architecture.</div><div class="t m0 x8 hb yfa ff2 fs4 fc0 sc0 ls0 ws0">The<span class="_ _1e"> </span>OMAP™<span class="_ _65"> </span>3<span class="_ _b3"> </span>architecture<span class="_ _51"> </span>is<span class="_ _b4"> </span>designed<span class="_ _1"> </span>to<span class="_ _8b"> </span>provide<span class="_ _b5"> </span>best-in-class<span class="_ _a0"> </span>video,<span class="_ _3a"> </span>image,<span class="_ _74"> </span>and<span class="_ _40"> </span>graphics<span class="_ _b6"> </span>processing</div><div class="t m0 x8 hb yfb ff2 fs4 fc0 sc0 ls0 ws0">sufficient<span class="_ _4e"> </span>to<span class="_ _11"> </span>support<span class="_ _4a"> </span>the<span class="_ _52"> </span>following:</div><div class="t m0 x8 h7 yfc ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Streaming<span class="_ _23"> </span>video</span></div><div class="t m0 x8 h7 yfd ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">3D<span class="_ _6c"> </span>mobile<span class="_ _3b"> </span>gaming</span></div><div class="t m0 x8 h7 yfe ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Video<span class="_ _64"> </span>conferencing</span></div><div class="t m0 x8 h7 yff ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">High-resolution<span class="_ _91"> </span>still<span class="_ _b"> </span>image</span></div><div class="t m0 x8 hb y100 ff2 fs4 fc0 sc0 ls0 ws0">The<span class="_ _40"> </span>device<span class="_ _99"> </span>supports<span class="_ _1a"> </span>high-level<span class="_ _48"> </span>operating<span class="_ _67"> </span>systems<span class="_ _4b"> </span>(OSs),<span class="_ _99"> </span>such<span class="_ _72"> </span>as:</div><div class="t m0 x8 h7 y7f ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Linux</span></div><div class="t m0 x8 h7 y81 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Windows<span class="_ _20"> </span>CE</span></div><div class="t m0 x8 hb y101 ff2 fs4 fc0 sc0 ls0 ws0">This<span class="_ _b7"> </span>OMAP<span class="_ _2a"> </span>device<span class="_ _99"> </span>includes<span class="_ _2"> </span>state-of-the-art<span class="_ _b8"> </span>power-management<span class="_ _b9"> </span>techniques<span class="_ _ba"> </span>required<span class="_ _2"> </span>for<span class="_ _bb"> </span>high-performance</div><div class="t m0 x8 hb y102 ff2 fs4 fc0 sc0 ls0 ws0">mobile<span class="_ _3b"> </span>products.</div><div class="t m0 x8 hb y103 ff2 fs4 fc0 sc0 ls0 ws0">The<span class="_ _40"> </span>following<span class="_ _25"> </span>subsystems<span class="_ _51"> </span>are<span class="_ _b"> </span>part<span class="_ _8d"> </span>of<span class="_ _bc"> </span>the<span class="_ _52"> </span>device:</div><div class="t m0 x8 h7 y104 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Microprocessor<span class="_ _a1"> </span>unit<span class="_ _97"> </span>(MPU)<span class="_ _99"> </span>subsystem<span class="_ _33"> </span>based<span class="_ _3a"> </span>on<span class="_ _5e"> </span>the<span class="_ _52"> </span>ARM<span class="_ _1d"> </span>Cortex™-A8<span class="_ _2c"> </span>microprocessor</span></div><div class="t m0 x8 h7 y105 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">IVA2.2<span class="_ _29"> </span>subsystem<span class="_ _33"> </span>with<span class="_ _1e"> </span>a<span class="_ _18"> </span>C64x+<span class="_ _83"> </span>digital<span class="_ _16"> </span>signal<span class="_ _16"> </span>processor<span class="_ _60"> </span>(DSP)<span class="_ _3a"> </span>core</span></div><div class="t m0 x8 h7 y106 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">POWERVR<span class="_ _3c"> </span>SGX™<span class="_ _3d"> </span>subsystem<span class="_ _33"> </span>for<span class="_ _37"> </span>3D<span class="_ _6c"> </span>graphics<span class="_ _55"> </span>acceleration<span class="_ _9f"> </span>to<span class="_ _bc"> </span>support<span class="_ _4a"> </span>display<span class="_ _3d"> </span>and<span class="_ _4f"> </span>gaming<span class="_ _39"> </span>effects</span></div><div class="t m0 xa hb y107 ff2 fs4 fc0 sc0 ls0 ws0">(35<span class="_ _70"> </span>30<span class="_ _80"> </span>only)</div><div class="t m0 x8 h7 y108 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Camera<span class="_ _24"> </span>image<span class="_ _3a"> </span>signal<span class="_ _16"> </span>processor<span class="_ _60"> </span>(ISP)<span class="_ _21"> </span>that<span class="_ _4f"> </span>supports<span class="_ _1a"> </span>multiple<span class="_ _68"> </span>formats<span class="_ _4a"> </span>and<span class="_ _4f"> </span>interfacing<span class="_ _15"> </span>options<span class="_ _3e"> </span>connected</span></div><div class="t m0 xa hb y109 ff2 fs4 fc0 sc0 ls0 ws0">to<span class="_ _11"> </span>a<span class="_ _18"> </span>wide<span class="_ _54"> </span>variety<span class="_ _3b"> </span>of<span class="_ _11"> </span>image<span class="_ _3a"> </span>sensors</div><div class="t m0 x8 h7 y10a ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Display<span class="_ _39"> </span>subsystem<span class="_ _33"> </span>with<span class="_ _1e"> </span>a<span class="_ _18"> </span>wide<span class="_ _54"> </span>variety<span class="_ _3b"> </span>of<span class="_ _11"> </span>features<span class="_ _35"> </span>for<span class="_ _37"> </span>multiple<span class="_ _68"> </span>concurrent<span class="_ _2b"> </span>image<span class="_ _3a"> </span>manipulation,<span class="_ _5f"> </span>and<span class="_ _4f"> </span>a</span></div><div class="t m0 xa hb y10b ff2 fs4 fc0 sc0 ls0 ws0">programmable<span class="_ _9b"> </span>interface<span class="_ _1a"> </span>supporting<span class="_ _aa"> </span>a<span class="_ _18"> </span>wide<span class="_ _54"> </span>variety<span class="_ _3b"> </span>of<span class="_ _11"> </span>displays.<span class="_ _25"> </span>The<span class="_ _40"> </span>display<span class="_ _bd"> </span>subsystem<span class="_ _33"> </span>also<span class="_ _2e"> </span>supports</div><div class="t m0 xa hb y10c ff2 fs4 fc0 sc0 ls0 ws0">NTSC/PAL<span class="_ _f"> </span>video<span class="_ _5a"> </span>out.</div><div class="t m0 x8 h7 y10d ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Level<span class="_ _5a"> </span>3<span class="_ _18"> </span>(L3)<span class="_ _1e"> </span>and<span class="_ _4f"> </span>level<span class="_ _54"> </span>4<span class="_ _18"> </span>(L4)<span class="_ _1e"> </span>interconnects<span class="_ _5f"> </span>that<span class="_ _4f"> </span>provide<span class="_ _39"> </span>high-bandwidth<span class="_ _be"> </span>data<span class="_ _94"> </span>transfers<span class="_ _25"> </span>for<span class="_ _37"> </span>multiple</span></div><div class="t m0 xa hb y10e ff2 fs4 fc0 sc0 ls0 ws0">initiators<span class="_ _96"> </span>to<span class="_ _11"> </span>the<span class="_ _52"> </span>internal<span class="_ _39"> </span>and<span class="_ _4f"> </span>external<span class="_ _24"> </span>memory<span class="_ _35"> </span>controllers<span class="_ _15"> </span>and<span class="_ _4f"> </span>to<span class="_ _bc"> </span>on-chip<span class="_ _39"> </span>peripherals</div><div class="t m0 x8 hb y10f ff2 fs4 fc0 sc0 ls0 ws0">The<span class="_ _40"> </span>device<span class="_ _99"> </span>also<span class="_ _2e"> </span>offers:</div><div class="t m0 x8 h7 y110 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">A<span class="_ _bf"> </span>comprehensive<span class="_ _be"> </span>power<span class="_ _3a"> </span>and<span class="_ _7c"> </span>clock-management<span class="_ _c0"> </span>scheme<span class="_ _9c"> </span>that<span class="_ _7c"> </span>enables<span class="_ _9c"> </span>high-performance,<span class="_ _c1"> </span>low-power</span></div><div class="t m0 xa hb y111 ff2 fs4 fc0 sc0 ls0 ws0">operation,<span class="_ _c2"> </span>and<span class="_ _4f"> </span>ultralow-power<span class="_ _c3"> </span>standby<span class="_ _9c"> </span>features.<span class="_ _73"> </span>The<span class="_ _40"> </span>device<span class="_ _99"> </span>also<span class="_ _2e"> </span>supports<span class="_ _b6"> </span>SmartReflex™<span class="_ _c3"> </span>adaptative</div><div class="t m0 xa hb yaa ff2 fs4 fc0 sc0 ls0 ws0">voltage<span class="_ _3e"> </span>control.<span class="_ _39"> </span>This<span class="_ _31"> </span>power<span class="_ _3a"> </span>management<span class="_ _ac"> </span>technique<span class="_ _2d"> </span>for<span class="_ _37"> </span>automatic<span class="_ _2d"> </span>control<span class="_ _29"> </span>of<span class="_ _11"> </span>the<span class="_ _52"> </span>operating<span class="_ _67"> </span>voltage<span class="_ _c4"> </span>of<span class="_ _11"> </span>a</div><div class="t m0 xa hb y112 ff2 fs4 fc0 sc0 ls0 ws0">module<span class="_ _39"> </span>reduces<span class="_ _24"> </span>the<span class="_ _52"> </span>active<span class="_ _16"> </span>power<span class="_ _3a"> </span>consumption.</div><div class="t m0 x8 h7 y113 ff3 fs4 fc0 sc0 ls0 ws0">•<span class="_ _11"> </span><span class="ff2">Memory<span class="_ _35"> </span>stacking<span class="_ _4b"> </span>feature<span class="_ _3d"> </span>using<span class="_ _5a"> </span>the<span class="_ _52"> </span>package-on-package<span class="_ _c5"> </span>(POP)<span class="_ _50"> </span>implementation<span class="_ _be"> </span>(CBB<span class="_ _5a"> </span>and<span class="_ _7c"> </span>CBC</span></div><div class="t m0 xa hb y114 ff2 fs4 fc0 sc0 ls0 ws0">packages<span class="_ _48"> </span>only)</div><div class="t m0 x8 hb y115 ff2 fs4 fc0 sc0 ls0 ws0">OMAP<span class="_ _c6"> </span>30/25<span class="_ _c7"> </span>devices<span class="_ _8"> </span>are<span class="_ _98"> </span>available<span class="_ _10"> </span>in<span class="_ _11"> </span>a<span class="_ _77"> </span>515-pin<span class="_ _38"> </span>s-PBGA<span class="_ _87"> </span>package<span class="_ _1a"> </span>(CBB<span class="_ _c8"> </span>suffix),<span class="_ _29"> </span>515-pin<span class="_ _c9"> </span>s-PBGA<span class="_ _87"> </span>package</div><div class="t m0 x8 hb y116 ff2 fs4 fc0 sc0 ls0 ws0">(CBC<span class="_ _1c"> </span>suffix),<span class="_ _3b"> </span>and<span class="_ _ca"> </span>a<span class="_ _18"> </span>423-pin<span class="_ _b5"> </span>s-PBGA<span class="_ _8a"> </span>package<span class="_ _cb"> </span>(CUS<span class="_ _1c"> </span>suffix).<span class="_ _2a"> </span>Some<span class="_ _16"> </span>features<span class="_ _8a"> </span>of<span class="_ _11"> </span>the<span class="_ _cc"> </span>CBB<span class="_ _54"> </span>and<span class="_ _ca"> </span>CBC<span class="_ _cd"> </span>packages</div><div class="t m0 x8 hb y117 ff2 fs4 fc0 sc0 ls0 ws0">are<span class="_ _b"> </span>not<span class="_ _52"> </span>available<span class="_ _4e"> </span>in<span class="_ _b4"> </span>the<span class="_ _52"> </span>CUS<span class="_ _72"> </span>package.</div><div class="t m0 x8 hb y118 ff2 fs4 fc1 sc0 ls0 ws0">Table<span class="_ _26"> </span>1-1<span class="_ _b"> </span><span class="fc0">lists<span class="_ _8d"> </span>the<span class="_ _52"> </span>differences<span class="_ _f"> </span>between<span class="_ _55"> </span>the<span class="_ _52"> </span>CBB,<span class="_ _4c"> </span>CBC,<span class="_ _ce"> </span>and<span class="_ _4f"> </span>CUS<span class="_ _72"> </span>packages.</span></div><div class="t m0 x8 ha yd0 ff4 fs5 fc0 sc0 ls0 ws0">OMAP3<span class="_ _a5"> </span>530/25<span class="_ _6d"> </span>Applications<span class="_ _48"> </span>Processor<span class="_ _a6"></span><span class="ff2">4<span class="_ _cf"> </span><span class="ff4 fc1">Submit<span class="_ _a8"> </span>Documentation<span class="_ _a9"> </span>Feedback</span></span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625a3534be9ad24cfae1875d/bg5.jpg"><div class="t m1 x2 h4 y3 ff1 fs2 fc0 sc0 ls0 ws0">OMAP3<span class="_ _5"> </span>530/25<span class="_ _6"> </span>Applications<span class="_ _7"> </span>Processor</div><div class="t m2 x1 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">www.ti.com</div><div class="t m0 x3 h5 y4 ff2 fs3 fc0 sc0 ls0 ws0">SPRS507E<span class="_ _8"> </span>–<span class="_ _9"> </span>FEBRUARY<span class="_ _a"> </span>2008<span class="_ _b"> </span>–<span class="_ _9"> </span>REVISED<span class="_ _c"> </span>AUGUST<span class="_ _d"> </span>2009</div><div class="t m0 xf h6 yd1 ff1 fs4 fc0 sc0 ls0 ws0">Table<span class="_ _16"> </span>1-1.<span class="_ _40"> </span>Differences<span class="_ _62"> </span>Between<span class="_ _1"> </span>CBB,<span class="_ _1c"> </span>CBC,<span class="_ _1c"> </span>and<span class="_ _1e"> </span>CUS<span class="_ _72"> </span>Packages</div><div class="t m0 x10 hc y119 ff1 fs5 fc0 sc0 ls0 ws0">FEATURE<span class="_ _d0"> </span>CBB<span class="_ _8d"> </span>PACKAGE<span class="_ _d1"> </span>CBC<span class="_ _8d"> </span>PACKAGE<span class="_ _d1"> </span>CUS<span class="_ _4f"> </span>PACKAGE</div><div class="t m0 x11 h8 y11a ff2 fs5 fc0 sc0 ls0 ws0">For<span class="_ _37"> </span>CBB<span class="_ _97"> </span>package<span class="_ _29"> </span>pin<span class="_ _38"> </span>For<span class="_ _37"> </span>CBC<span class="_ _7c"> </span>package<span class="_ _29"> </span>pin<span class="_ _c9"> </span>For<span class="_ _37"> </span>CUS<span class="_ _7c"> </span>package<span class="_ _29"> </span>pin</div><div class="t m0 x12 ha y11b ff2 fs5 fc0 sc0 ls0 ws0">Pin<span class="_ _5e"> </span>Assignments<span class="_ _d2"> </span>assignments<span class="_ _d3"> </span>see<span class="fc1">Table<span class="_ _75"> </span>2-1<span class="_ _63"> </span></span>,<span class="_ _d4"> </span><span class="ff4">Ball<span class="_ _31"> </span></span>assignments<span class="_ _c2"> </span>see<span class="_ _76"> </span><span class="fc1">Table<span class="_ _d5"> </span>2-2<span class="_ _63"> </span></span>,<span class="_ _d4"> </span><span class="ff4">Ball<span class="_ _d6"> </span></span>assignments<span class="_ _d3"> </span>see<span class="_ _76"> </span><span class="fc1">Table<span class="_ _d5"> </span>2-3<span class="_ _63"> </span></span>,<span class="_ _d4"> </span><span class="ff4">Ball</span></div><div class="t m0 x11 ha y11c ff4 fs5 fc0 sc0 ls0 ws0">Characteristics<span class="_ _d7"> </span>(CBB<span class="_ _31"> </span>Pkg.)<span class="_ _3e"> </span>Characteristics<span class="_ _d7"> </span>(CBC<span class="_ _94"> </span>Pkg.)<span class="_ _3e"> </span>Characteristics<span class="_ _d7"> </span>(CUS<span class="_ _b7"> </span>Pkg.)</div><div class="t m0 x13 h8 yd9 ff2 fs5 fc0 sc0 ls0 ws0">Package-On-Package<span class="_ _d8"> </span>(POP)</div><div class="t m0 x11 h8 y11d ff2 fs5 fc0 sc0 ls0 ws0">POP<span class="_ _7c"> </span>interface<span class="_ _13"> </span>supported<span class="_ _d9"> </span>POP<span class="_ _7c"> </span>interface<span class="_ _13"> </span>supported<span class="_ _d9"> </span>POP<span class="_ _7c"> </span>interface<span class="_ _13"> </span>not<span class="_ _0"> </span>available</div><div class="t m0 x14 h8 y11e ff2 fs5 fc0 sc0 ls0 ws0">Interface</div><div class="t m0 x11 h8 y11f ff2 fs5 fc0 sc0 ls0 ws0">Discrete<span class="_ _81"> </span>Memory<span class="_ _da"> </span>Interface<span class="_ _23"> </span>Discrete<span class="_ _99"> </span>Memory<span class="_ _da"> </span>Interface<span class="_ _74"> </span>not<span class="_ _31"> </span>Discrete<span class="_ _81"> </span>Memory<span class="_ _da"> </span>Interface</div><div class="t m0 x15 h8 y120 ff2 fs5 fc0 sc0 ls0 ws0">Discrete<span class="_ _81"> </span>Memory<span class="_ _da"> </span>Interface</div><div class="t m0 x11 h8 y121 ff2 fs5 fc0 sc0 ls0 ws0">supported<span class="_ _db"> </span>supported<span class="_ _db"> </span>supported</div><div class="t m0 x16 h8 y78 ff2 fs5 fc0 sc0 ls0 ws0">Chip<span class="_ _97"> </span>select<span class="_ _54"> </span>pins<span class="_ _b"> </span>gpmc_ncs1<span class="_ _20"> </span>and</div><div class="t m0 x11 h8 y122 ff2 fs5 fc0 sc0 ls0 ws0">Eight<span class="_ _7f"> </span>chip<span class="_ _b"> </span>select<span class="_ _54"> </span>pins<span class="_ _dc"> </span>available<span class="_ _1a"> </span>Eight<span class="_ _1e"> </span>chip<span class="_ _dc"> </span>select<span class="_ _dd"> </span>pins<span class="_ _dc"> </span>available</div><div class="t m0 x16 h8 y123 ff2 fs5 fc0 sc0 ls0 ws0">gpmc_ncs2<span class="_ _20"> </span>are<span class="_ _de"> </span>not<span class="_ _0"> </span>available</div><div class="t m0 x17 h8 y124 ff2 fs5 fc0 sc0 ls0 ws0">GPMC</div><div class="t m0 x16 h8 y125 ff2 fs5 fc0 sc0 ls0 ws0">Wait<span class="_ _3f"> </span>pins<span class="_ _b"> </span>gpmc_wait1<span class="_ _df"> </span>and</div><div class="t m0 x11 h8 y126 ff2 fs5 fc0 sc0 ls0 ws0">Four<span class="_ _97"> </span>wait<span class="_ _52"> </span>pins<span class="_ _dc"> </span>available<span class="_ _6"> </span>Four<span class="_ _97"> </span>wait<span class="_ _52"> </span>pins<span class="_ _dc"> </span>available</div><div class="t m0 x16 h8 y127 ff2 fs5 fc0 sc0 ls0 ws0">gpmc_wait2<span class="_ _df"> </span>are<span class="_ _5e"> </span>not<span class="_ _80"> </span>available</div><div class="t m0 x18 h8 y128 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are<span class="_ _de"> </span>either</div><div class="t m0 x11 h8 y129 ff2 fs5 fc0 sc0 ls0 ws0">CTS<span class="_ _3f"> </span>signal<span class="_ _dd"> </span>is<span class="_ _7e"> </span>available<span class="_ _e0"> </span>on<span class="_ _6e"> </span>3<span class="_ _44"> </span>pins<span class="_ _7f"> </span>available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>(double<span class="_ _a5"> </span>muxed)<span class="_ _e1"> </span>CTS<span class="_ _3f"> </span>signal<span class="_ _dd"> </span>is<span class="_ _7e"> </span>available<span class="_ _e0"> </span>on<span class="_ _6e"> </span>3<span class="_ _44"> </span>pins</div><div class="t m0 x11 h8 y12a ff2 fs5 fc0 sc0 ls0 ws0">(triple<span class="_ _d5"> </span>muxed):<span class="_ _da"> </span>uart1_cts<span class="_ _75"> </span>(AG22<span class="_ _21"> </span>/<span class="_ _89"> </span>or<span class="_ _e2"> </span>three<span class="_ _7f"> </span>pins<span class="_ _dc"> </span>(triple<span class="_ _d5"> </span>muxed):<span class="_ _1"> </span>(triple<span class="_ _d5"> </span>muxed):<span class="_ _da"> </span>uart1_cts<span class="_ _75"> </span>(AC19<span class="_ _78"> </span>/</div><div class="t m0 x19 h8 y12b ff2 fs5 fc0 sc0 ls0 ws0">UART1<span class="_ _6"> </span>W8<span class="_ _37"> </span>/<span class="_ _d4"> </span>T21),<span class="_ _2e"> </span>uart1_rts<span class="_ _e0"> </span>(AH22<span class="_ _78"> </span>/<span class="_ _70"> </span>uart1_cts<span class="_ _75"> </span>(AE21<span class="_ _88"> </span>/<span class="_ _d4"> </span>T19<span class="_ _ab"> </span>/<span class="_ _d4"> </span>W2),<span class="_ _3a"> </span>AC2<span class="_ _82"> </span>/<span class="_ _d4"> </span>AA18),<span class="_ _6d"> </span>uart1_rts<span class="_ _e0"> </span>(W6<span class="_ _dc"> </span>/</div><div class="t m0 x11 h8 y12c ff2 fs5 fc0 sc0 ls0 ws0">AA9),<span class="_ _d5"> </span>uart1_tx<span class="_ _da"> </span>(F28<span class="_ _97"> </span>/<span class="_ _d4"> </span>Y8<span class="_ _1f"> </span>/<span class="_ _d4"> </span>AE7),<span class="_ _a8"> </span>uart1_rts<span class="_ _bd"> </span>(AE22<span class="_ _88"> </span>/<span class="_ _d4"> </span>R2),<span class="_ _e3"> </span>uart1_rx<span class="_ _7d"> </span>AB19),<span class="_ _6d"> </span>uart1_tx<span class="_ _da"> </span>(E23<span class="_ _4f"> </span>/<span class="_ _d4"> </span>V7<span class="_ _1f"> </span>/<span class="_ _d4"> </span>AC3),</div><div class="t m0 x11 h8 y12d ff2 fs5 fc0 sc0 ls0 ws0">uart1_rx<span class="_ _81"> </span>(E26<span class="_ _7c"> </span>/<span class="_ _d4"> </span>AA8)<span class="_ _e4"> </span>(H3<span class="_ _76"> </span>/<span class="_ _d4"> </span>H25<span class="_ _dc"> </span>/<span class="_ _d4"> </span>AE4),<span class="_ _d5"> </span>uart1_tx<span class="_ _da"> </span>(L4<span class="_ _de"> </span>/<span class="_ _b4"> </span>uart1_rx<span class="_ _81"> </span>(D24<span class="_ _8d"> </span>/<span class="_ _d4"> </span>W7)</div><div class="t m0 x18 h8 y12e ff2 fs5 fc0 sc0 ls0 ws0">G26)</div><div class="t m0 x11 h8 y12f ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x18 h8 y130 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x11 h8 y131 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins<span class="_ _dc"> </span>(double<span class="_ _7"> </span>The<span class="_ _1b"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x18 h8 y132 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins<span class="_ _dc"> </span>(double</div><div class="t m0 x11 h8 y133 ff2 fs5 fc0 sc0 ls0 ws0">muxed):<span class="_ _da"> </span>uart2_cts<span class="_ _75"> </span>(AF6/AB26),<span class="_ _e5"> </span>available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>one<span class="_ _70"> </span>pin<span class="_ _e6"> </span>only:</div><div class="t m0 x19 h8 y134 ff2 fs5 fc0 sc0 ls0 ws0">UART2<span class="_ _e7"> </span>muxed):<span class="_ _da"> </span>uart2_cts<span class="_ _75"> </span>(Y24/P3),</div><div class="t m0 x11 h8 y135 ff2 fs5 fc0 sc0 ls0 ws0">uart2_rts<span class="_ _bd"> </span>(AE6/AB25),<span class="_ _e8"> </span>uart2_tx<span class="_ _e9"> </span>uart2_cts<span class="_ _75"> </span>(V6),<span class="_ _8d"> </span>uart2_rts<span class="_ _bd"> </span>(V5),</div><div class="t m0 x18 h8 y136 ff2 fs5 fc0 sc0 ls0 ws0">uart2_rts<span class="_ _bd"> </span>(AA24/N3),<span class="_ _4e"> </span>uart2_tx</div><div class="t m0 x11 h8 yf6 ff2 fs5 fc0 sc0 ls0 ws0">(AF5/AA25),<span class="_ _ea"> </span>uart2_rx<span class="_ _eb"> </span>uart2_tx<span class="_ _da"> </span>(W4),<span class="_ _ec"> </span>uart2_rx<span class="_ _81"> </span>(V4)</div><div class="t m0 x18 h8 y137 ff2 fs5 fc0 sc0 ls0 ws0">(AD22/U3),<span class="_ _10"> </span>uart2_rx<span class="_ _99"> </span>(AD21/W3)</div><div class="t m0 x11 h8 y138 ff2 fs5 fc0 sc0 ls0 ws0">(AE5/AD25)</div><div class="t m0 x11 h8 y139 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are<span class="_ _d"> </span>The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x16 h8 y13a ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x11 h8 y13b ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>three<span class="_ _7f"> </span>pins<span class="_ _dc"> </span>(triple<span class="_ _29"> </span>available<span class="_ _e0"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins<span class="_ _dc"> </span>(triple</div><div class="t m0 x16 h8 y13c ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins<span class="_ _dc"> </span>only</div><div class="t m0 x11 h8 y13d ff2 fs5 fc0 sc0 ls0 ws0">muxed):<span class="_ _da"> </span>mcbsp3_dx<span class="_ _20"> </span>(AF6<span class="_ _8d"> </span>/<span class="_ _d4"> </span>AB26<span class="_ _ed"> </span>muxed):<span class="_ _da"> </span>mcbsp3_dx<span class="_ _20"> </span>(U17/<span class="_ _ec"> </span>Y24/</div><div class="t m0 x16 h8 y13e ff2 fs5 fc0 sc0 ls0 ws0">(double<span class="_ _a5"> </span>muxed):<span class="_ _da"> </span>mcbsp3_dx</div><div class="t m0 x14 h8 y13f ff2 fs5 fc0 sc0 ls0 ws0">McBSP3<span class="_ _ee"> </span>/<span class="_ _d4"> </span>V21),<span class="_ _31"> </span>mcbsp3_dr<span class="_ _ef"> </span>(AE6<span class="_ _f0"> </span>/<span class="_ _d4"> </span>AB25<span class="_ _ec"> </span>/<span class="_ _89"> </span>P3),<span class="_ _dc"> </span>mcbsp3_dr<span class="_ _ef"> </span>(T20/<span class="_ _2e"> </span>AA24<span class="_ _ec"> </span>/</div><div class="t m0 x16 h8 y140 ff2 fs5 fc0 sc0 ls0 ws0">(V6/W18),<span class="_ _7d"> </span>mcbsp3_dr<span class="_ _ef"> </span>(V5/Y18),</div><div class="t m0 x11 h8 y141 ff2 fs5 fc0 sc0 ls0 ws0">U21),<span class="_ _ec"> </span>mcbsp3_clkx<span class="_ _f1"> </span>(AF5<span class="_ _8d"> </span>/<span class="_ _d4"> </span>AA25<span class="_ _ec"> </span>/<span class="_ _44"> </span>N3),<span class="_ _e3"> </span>mcbsp3_clkx<span class="_ _f1"> </span>(T17/<span class="_ _2e"> </span>AD22<span class="_ _d5"> </span>/</div><div class="t m0 x16 h8 y142 ff2 fs5 fc0 sc0 ls0 ws0">mcbsp3_clkx<span class="_ _f1"> </span>(W4/V18),<span class="_ _7d"> </span>and</div><div class="t m0 x11 h8 y143 ff2 fs5 fc0 sc0 ls0 ws0">W21),<span class="_ _72"> </span>and<span class="_ _70"> </span>mcbsp3_fsx<span class="_ _df"> </span>(AE5<span class="_ _f0"> </span>/<span class="_ _f2"> </span>U3),<span class="_ _e3"> </span>mcbsp3_fsx<span class="_ _df"> </span>(P20/<span class="_ _31"> </span>AD21<span class="_ _f3"> </span>/</div><div class="t m0 x16 h8 y144 ff2 fs5 fc0 sc0 ls0 ws0">mcbsp3_fsx<span class="_ _df"> </span>(V4/AA19)</div><div class="t m0 x11 h8 y145 ff2 fs5 fc0 sc0 ls0 ws0">AD25<span class="_ _f3"> </span>/<span class="_ _d4"> </span>K26)<span class="_ _5"> </span>W3)</div><div class="t m0 x11 h8 y146 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are<span class="_ _d"> </span>The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x16 h8 y147 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x11 h8 y148 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>three<span class="_ _7f"> </span>pins<span class="_ _dc"> </span>(triple<span class="_ _29"> </span>available<span class="_ _e0"> </span>on<span class="_ _6e"> </span>three<span class="_ _7f"> </span>pins<span class="_ _dc"> </span>(triple</div><div class="t m0 x16 h8 y149 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins<span class="_ _dc"> </span>only</div><div class="t m0 x11 h8 y14a ff2 fs5 fc0 sc0 ls0 ws0">muxed):<span class="_ _da"> </span>gpt8_pwm_evt<span class="_ _3c"> </span>(N8<span class="_ _76"> </span>/<span class="_ _43"> </span>muxed):<span class="_ _da"> </span>gpt8_pwm_evt</div><div class="t m0 x16 h8 y14b ff2 fs5 fc0 sc0 ls0 ws0">(double<span class="_ _a5"> </span>muxed):<span class="_ _da"> </span>gpt8_pwm_evt</div><div class="t m0 x1a h8 y14c ff2 fs5 fc0 sc0 ls0 ws0">GP<span class="_ _5e"> </span>Timer<span class="_ _2d"> </span>AD25<span class="_ _d5"> </span>/<span class="_ _d4"> </span>V3),<span class="_ _b"> </span>gpt9_pwm_evt<span class="_ _3c"> </span>(T8<span class="_ _37"> </span>/<span class="_ _f4"> </span>(C5/AD21/V9),<span class="_ _3c"> </span>gpt9_pwm_evt</div><div class="t m0 x16 h8 y14d ff2 fs5 fc0 sc0 ls0 ws0">(G4/M4),<span class="_ _bd"> </span>gpt9_pwm_evt<span class="_ _f5"> </span>(F4/N4),</div><div class="t m0 x11 h8 y14e ff2 fs5 fc0 sc0 ls0 ws0">AB26<span class="_ _ec"> </span>/<span class="_ _d4"> </span>Y2),<span class="_ _dc"> </span>gpt10_pwm_evt<span class="_ _f6"> </span>(R8<span class="_ _4f"> </span>(B4/W8/Y24),</div><div class="t m0 x16 h8 y14f ff2 fs5 fc0 sc0 ls0 ws0">gpt10_pwm_evt<span class="_ _f6"> </span>(G5/N3),<span class="_ _c"> </span>and</div><div class="t m0 x11 h8 y150 ff2 fs5 fc0 sc0 ls0 ws0">/<span class="_ _d4"> </span>AB25<span class="_ _ec"> </span>/<span class="_ _d4"> </span>Y3),<span class="_ _dc"> </span>and<span class="_ _e8"> </span>gpt10_pwm_evt(C4/U8/AA24),</div><div class="t m0 x16 h8 y151 ff2 fs5 fc0 sc0 ls0 ws0">gpt11_pwm_evt<span class="_ _f6"> </span>(F3/M5)</div><div class="t m0 x11 h8 y152 ff2 fs5 fc0 sc0 ls0 ws0">gpt11_pwm_evt<span class="_ _f6"> </span>(P8<span class="_ _f7"> </span>/<span class="_ _d4"> </span>AA25<span class="_ _ec"> </span>/<span class="_ _d4"> </span>Y4)<span class="_ _82"> </span>gpt11_pwm_evt(B5/V8/AD22)</div><div class="t m0 x11 h8 y153 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are<span class="_ _d"> </span>The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x16 h8 y154 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x11 h8 y155 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _f7"> </span>pins<span class="_ _b"> </span>(double<span class="_ _8a"> </span>available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _43"> </span>pins(double</div><div class="t m0 x16 h8 y156 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>one<span class="_ _70"> </span>pin<span class="_ _e6"> </span>only:</div><div class="t m0 x11 h8 y157 ff2 fs5 fc0 sc0 ls0 ws0">muxed):<span class="_ _da"> </span>mcbsp4_clkx<span class="_ _f1"> </span>(T8/AE1),<span class="_ _73"> </span>muxed):<span class="_ _da"> </span>mcbsp4_clkx<span class="_ _f1"> </span>(B4<span class="_ _f7"> </span>/<span class="_ _d4"> </span>V3),</div><div class="t m0 x14 h8 y158 ff2 fs5 fc0 sc0 ls0 ws0">McBSP4<span class="_ _f8"> </span>mcbsp4_clkx<span class="_ _f1"> </span>(F4),<span class="_ _7c"> </span>mcbsp4_dr</div><div class="t m0 x11 h8 y159 ff2 fs5 fc0 sc0 ls0 ws0">mcbsp4_dr<span class="_ _ef"> </span>(R8/AD1),<span class="_ _ac"> </span>mcbsp4_dr<span class="_ _ef"> </span>(C4<span class="_ _76"> </span>/<span class="_ _d4"> </span>U4),</div><div class="t m0 x16 h8 y15a ff2 fs5 fc0 sc0 ls0 ws0">(G5),<span class="_ _7f"> </span>mcbsp4_dx<span class="_ _20"> </span>(F3),</div><div class="t m0 x11 h8 y15b ff2 fs5 fc0 sc0 ls0 ws0">mcbsp4_dx<span class="_ _20"> </span>(P8/AD2),<span class="_ _f9"> </span>mcbsp4_dx<span class="_ _20"> </span>(B5<span class="_ _f7"> </span>/<span class="_ _d4"> </span>R3),</div><div class="t m0 x16 h8 y15c ff2 fs5 fc0 sc0 ls0 ws0">mcbsp4_fsx<span class="_ _df"> </span>(G4)</div><div class="t m0 x11 h8 y15d ff2 fs5 fc0 sc0 ls0 ws0">mcbsp4_fsx<span class="_ _df"> </span>(N8/AC1)<span class="_ _2f"> </span>mcbsp4_fsx<span class="_ _df"> </span>(C5<span class="_ _76"> </span>/<span class="_ _d4"> </span>T3)</div><div class="t m0 xb h8 y15e ff2 fs5 fc0 sc0 ls0 ws0">HSUSB3_TLL<span class="_ _fa"> </span>Supported<span class="_ _fb"> </span>Supported<span class="_ _fb"> </span>Not<span class="_ _f7"> </span>supported</div><div class="t m0 xb h8 y15f ff2 fs5 fc0 sc0 ls0 ws0">MM_FSUSB3<span class="_ _fc"> </span>Supported<span class="_ _fb"> </span>Supported<span class="_ _fb"> </span>Not<span class="_ _f7"> </span>supported</div><div class="t m0 x11 h8 y160 ff2 fs5 fc0 sc0 ls0 ws0">Four<span class="_ _97"> </span>chip<span class="_ _dc"> </span>select<span class="_ _dd"> </span>pins<span class="_ _dc"> </span>are<span class="_ _81"> </span>Four<span class="_ _fd"> </span>chip<span class="_ _dc"> </span>select<span class="_ _54"> </span>pins<span class="_ _b"> </span>are<span class="_ _81"> </span>Chip<span class="_ _97"> </span>select<span class="_ _dd"> </span>pins<span class="_ _dc"> </span>mcspi1_cs1<span class="_ _79"> </span>and</div><div class="t m0 x1b h8 y161 ff2 fs5 fc0 sc0 ls0 ws0">McSPI1</div><div class="t m0 x11 h8 y50 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _46"> </span>available<span class="_ _46"> </span>mcspi_cs2<span class="_ _a"> </span>are<span class="_ _5e"> </span>not<span class="_ _0"> </span>available</div><div class="t m0 x11 h8 y162 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x18 h8 y163 ff2 fs5 fc0 sc0 ls0 ws0">The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are<span class="_ _d"> </span>The<span class="_ _ab"> </span>following<span class="_ _74"> </span>signals<span class="_ _a8"> </span>are</div><div class="t m0 x11 h8 y164 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _f7"> </span>pins<span class="_ _b"> </span>(double</div><div class="t m0 x18 h8 y165 ff2 fs5 fc0 sc0 ls0 ws0">available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>two<span class="_ _f7"> </span>pins<span class="_ _b"> </span>(double<span class="_ _8a"> </span>available<span class="_ _bd"> </span>on<span class="_ _6e"> </span>one<span class="_ _70"> </span>pin<span class="_ _e6"> </span>only:</div><div class="t m0 x17 h8 y166 ff2 fs5 fc0 sc0 ls0 ws0">MMC3<span class="_ _fe"> </span>muxed):<span class="_ _da"> </span>mmc3_cmd<span class="_ _1"> </span>(AC3<span class="_ _1e"> </span>/</div><div class="t m0 x18 h8 y167 ff2 fs5 fc0 sc0 ls0 ws0">muxed):<span class="_ _da"> </span>mmc3_cmd<span class="_ _1"> </span>(R8<span class="_ _76"> </span>/<span class="_ _d4"> </span>AB3),<span class="_ _ce"> </span>mmc3_cmd<span class="_ _1"> </span>(AD3),<span class="_ _21"> </span>and</div><div class="t m0 x11 h8 y168 ff2 fs5 fc0 sc0 ls0 ws0">AE10),<span class="_ _6d"> </span>and<span class="_ _70"> </span>mmc3_clk<span class="_ _7d"> </span>(AB1<span class="_ _f0"> </span>/</div><div class="t m0 x18 h8 y169 ff2 fs5 fc0 sc0 ls0 ws0">mmc3_clk<span class="_ _7d"> </span>(R9<span class="_ _76"> </span>/<span class="_ _d4"> </span>AB2)<span class="_ _1"> </span>mmc3_clk<span class="_ _7d"> </span>(AC1)</div><div class="t m0 x11 h8 y59 ff2 fs5 fc0 sc0 ls0 ws0">AF10)</div><div class="t m0 x1 ha yd0 ff4 fs5 fc1 sc0 ls0 ws0">Submit<span class="_ _a8"> </span>Documentation<span class="_ _a9"> </span>Feedback<span class="_ _ae"> </span><span class="fc0">OMAP3<span class="_ _a5"> </span>530/25<span class="_ _6d"> </span>Applications<span class="_ _48"> </span>Processor<span class="_ _2b"> </span><span class="ff2">5</span></span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>