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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c4b8e92dc900e623b2c52/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">This is information on a product in full prod<span class="_ _0"></span>uction. </div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls1 ws1">January 2018<span class="_ _1"> </span>DocID024030 Rev 10<span class="_ _2"> </span>1/239</div><div class="t m0 x2 h4 y3 ff2 fs2 fc0 sc0 ls2 ws2">STM32F427xx STM32F429xx</div><div class="t m1 x3 h5 y4 ff1 fs3 fc0 sc0 ls3 ws3">32b Arm</div><div class="t m2 x4 h6 y5 ff1 fs4 fc0 sc0 ls4 ws4">®</div><div class="t m1 x5 h5 y4 ff1 fs3 fc0 sc0 ls5 ws5"> Cortex</div><div class="t m2 x6 h6 y5 ff1 fs4 fc0 sc0 ls4 ws4">®</div><div class="t m1 x7 h5 y4 ff1 fs3 fc0 sc0 ls6 ws6">-M4 MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, USB</div><div class="t m1 x8 h5 y6 ff1 fs3 fc0 sc0 ls7 ws7">OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, <span class="ls8 ws8">20 com. interfaces<span class="ls9 ws9">, camera & LCD-TFT</span></span></div><div class="t m0 x9 h7 y7 ff2 fs1 fc0 sc0 lsa ws4">Datasheet <span class="ff1 fs5 ls4">-</span><span class="lsb wsa"> production data</span></div><div class="t m0 x1 h8 y8 ff2 fs6 fc0 sc0 lsc ws4">Features</div><div class="t m0 x1 h9 y9 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 lsd wsb">Core: Arm</span></div><div class="t m0 xa ha ya ff1 fs8 fc0 sc0 ls4 ws4">®</div><div class="t m0 xb h9 y9 ff1 fs7 fc0 sc0 lse wsc"> 32-bit Cortex</div><div class="t m0 xc ha ya ff1 fs8 fc0 sc0 ls4 ws4">®</div><div class="t m0 xd h9 y9 ff1 fs7 fc0 sc0 lsf wsd">-M4 CPU with FPU, </div><div class="t m0 xe h9 yb ff1 fs7 fc0 sc0 ls10 wse">Adaptive real-tim<span class="_ _4"></span>e accelerator (A<span class="_ _4"></span>RT </div><div class="t m0 xe h9 yc ff1 fs7 fc0 sc0 ls11 wsf">Accelerator™) allowing 0-wait state execution </div><div class="t m0 xe h9 yd ff1 fs7 fc0 sc0 ls12 ws10">from Flash memory, frequency up to 18<span class="_ _0"></span>0<span class="_ _5"> </span>MHz, </div><div class="t m0 xe h9 ye ff1 fs7 fc0 sc0 ls13 ws11">MPU, 225<span class="_"> </span>DMIPS/1.25<span class="_"> </span>DMIPS/MHz<span class="fc1 ls4 ws4"> </span></div><div class="t m0 xe h9 yf ff1 fs7 fc0 sc0 ls14 ws12">(Dhrystone 2.1), and DSP in<span class="_ _0"></span>structions</div><div class="t m0 x1 h9 y10 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls15">Memories</span></div><div class="t m0 xe h9 y11 ff1 fs7 fc0 sc0 ls16 ws13">–<span class="_ _6"> </span>Up to 2 MB of Flash memory organized into </div><div class="t m0 xf h9 y12 ff1 fs7 fc0 sc0 ls17 ws14">two banks allowing <span class="ls18 ws4">read-w<span class="_ _4"></span>hile-write</span></div><div class="t m0 xe h9 y13 ff1 fs7 fc0 sc0 ls19 ws15">–<span class="_ _6"> </span>Up to 256+4<span class="_"> </span>KB of SRAM including 64-KB </div><div class="t m0 xf h9 y14 ff1 fs7 fc0 sc0 ls1a ws16">of CCM (core coupled memory) dat<span class="_ _0"></span>a RAM</div><div class="t m0 xe h9 y15 ff1 fs7 fc0 sc0 ls1b ws17">–<span class="_ _6"> </span>Flexible ex<span class="_ _4"></span>ternal memory co<span class="_ _4"></span>ntroller with up </div><div class="t m0 xf h9 y16 ff1 fs7 fc0 sc0 ls19 ws15">to 32-bit data bus: SRAM, PSRAM, </div><div class="t m0 xf h9 y17 ff1 fs7 fc0 sc0 lsf ws18">SDRAM/LPSDR SDRAM, Compact </div><div class="t m0 xf h9 y18 ff1 fs7 fc0 sc0 ls1c ws19">Flash/NOR/NAND memories</div><div class="t m0 x1 h9 y19 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls1d ws1a">LCD parallel interface, 80<span class="_ _0"></span>80/6800 modes</span></div><div class="t m0 x1 h9 y1a ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls11 wsf">LCD-TFT controller with fully programmable </span></div><div class="t m0 xe h9 y1b ff1 fs7 fc0 sc0 ls1e ws1b">resolution (total width up to 4096 pixels, to<span class="_ _0"></span>tal </div><div class="t m0 xe h9 y1c ff1 fs7 fc0 sc0 ls1a ws16">height up to 2048 lines and pixel clock up to </div><div class="t m0 xe h9 y1d ff1 fs7 fc0 sc0 ls14 ws4">83<span class="_"> </span>MHz)</div><div class="t m0 x1 h9 y1e ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls10 wse">Chrom-ART Acce<span class="_ _4"></span>lerator™ for enhan<span class="_ _4"></span>ced </span></div><div class="t m0 xe h9 y1f ff1 fs7 fc0 sc0 ls1a ws16">graphic content creation (DMA2<span class="_ _0"></span>D)</div><div class="t m0 x1 h9 y20 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls1f ws1c">Clock, reset and supply management</span></div><div class="t m0 xe h9 y21 ff1 fs7 fc0 sc0 lsf ws18">–<span class="_ _6"> </span>1.7<span class="_"> </span>V to 3.6<span class="_"> </span>V application supply and I/Os</div><div class="t m0 xe h9 y22 ff1 fs7 fc0 sc0 ls1a ws16">–<span class="_ _6"> </span>POR, PDR, PVD and BOR</div><div class="t m0 xe h9 y23 ff1 fs7 fc0 sc0 ls1c ws1d">–<span class="_ _6"> </span>4-to-26<span class="_"> </span>MHz crystal oscillator</div><div class="t m0 xe h9 y24 ff1 fs7 fc0 sc0 ls1b ws1e">–<span class="_ _6"> </span>Interna<span class="_ _4"></span>l 16<span class="_"> </span>MHz fac<span class="_ _4"></span>tory-trimme<span class="_ _4"></span>d RC (1% </div><div class="t m0 xf h9 y25 ff1 fs7 fc0 sc0 ls20 ws4">accuracy)</div><div class="t m0 xe h9 y26 ff1 fs7 fc0 sc0 ls21 ws1f">–<span class="_ _6"> </span>32 kHz oscillator for RTC with calibration</div><div class="t m0 xe h9 y27 ff1 fs7 fc0 sc0 ls11 wsf">–<span class="_ _6"> </span>Internal 32 kHz RC with c<span class="_ _4"></span>alibration</div><div class="t m0 x1 h9 y28 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _7"> </span><span class="ff1 ls22 ws20">Low power</span></div><div class="t m0 xe h9 y29 ff1 fs7 fc0 sc0 lse ws21">–<span class="_ _6"> </span>Sleep, S<span class="_ _8"></span>top and S<span class="_ _8"></span>tandby mod<span class="_ _0"></span>es</div><div class="t m0 xe h9 y2a ff1 fs7 fc0 sc0 ls23 ws4">–V</div><div class="t m0 x10 ha y2b ff1 fs8 fc0 sc0 ls24 ws4">BA<span class="_ _8"></span>T</div><div class="t m0 x11 h9 y2c ff1 fs7 fc0 sc0 ls25 ws22"> supply for R<span class="_ _8"></span>T<span class="_ _4"></span>C, 20×32 bit backup </div><div class="t m0 xf h9 y2d ff1 fs7 fc0 sc0 ls26 ws23">registers + optional 4 KB backu<span class="_ _0"></span>p SRAM</div><div class="t m0 x1 h9 y2e ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls11 wsf">3×12-bit, 2.4<span class="_"> </span>MSPS ADC: <span class="ls27 ws24">up to 24 channels </span></span></div><div class="t m0 xe h9 y2f ff1 fs7 fc0 sc0 lsf ws18">and 7.2<span class="_"> </span>MSPS in triple<span class="ls11 ws25"> interleaved mode</span></div><div class="t m0 x1 h9 y30 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls12 ws26">2×12-bit D/A converters</span></div><div class="t m0 x1 h9 y31 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls16 ws27">General-purpose DM<span class="_ _0"></span>A: 16-stream DMA </span></div><div class="t m0 xe h9 y32 ff1 fs7 fc0 sc0 ls28 ws28">controller with FIFOs and burst support</div><div class="t m0 x1 h9 y33 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls28 ws29">Up to 17 timers: up to twelve 16-<span class="_ _0"></span>bit and two 32-</span></div><div class="t m0 xe h9 y34 ff1 fs7 fc0 sc0 ls29 ws2a">bit timers up to 180<span class="_"> </span>MHz,<span class="_ _4"></span> each with up to 4 </div><div class="t m0 xe h9 y35 ff1 fs7 fc0 sc0 ls1f ws1c">IC/OC/PWM or pulse counter and qua<span class="_ _0"></span>drature </div><div class="t m0 xe h9 y36 ff1 fs7 fc0 sc0 ls2a ws2b">(incremental) en<span class="_ _0"></span>coder input</div><div class="t m0 x12 h9 y37 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls2b ws2c">Debug mode</span></div><div class="t m0 x13 h9 y38 ff1 fs7 fc0 sc0 ls1c ws1d">–<span class="_ _6"> </span>SWD & JT<span class="_ _8"></span>AG interfaces</div><div class="t m0 x13 h9 y39 ff1 fs7 fc0 sc0 ls1a ws16">–<span class="_ _6"> </span>Cortex-M4 T<span class="_ _8"></span>race Macrocell™</div><div class="t m0 x12 h9 y3a ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls11 wsf">Up to 168 I/O ports with interrupt capability</span></div><div class="t m0 x13 h9 y3b ff1 fs7 fc0 sc0 ls1d ws2d">–<span class="_ _6"> </span>Up to 164 fast I/Os up to 90<span class="_"> </span>MHz</div><div class="t m0 x13 h9 y3c ff1 fs7 fc0 sc0 ls2c ws2e">–<span class="_ _6"> </span>Up to 166 5<span class="_"> </span>V<span class="_ _8"></span>-toleran<span class="_ _0"></span>t I/Os</div><div class="t m0 x12 h9 y3d ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls13 ws11">Up to 21 communica<span class="ls18 ws2f">tion interfac<span class="_ _4"></span>es</span></span></div><div class="t m0 x13 h9 y3e ff1 fs7 fc0 sc0 lse ws30">–<span class="_ _6"> </span>Up to 3 × <span class="_ _0"></span>I</div><div class="t m0 x14 ha y3f ff1 fs8 fc0 sc0 ls4 ws4">2</div><div class="t m0 x15 h9 y40 ff1 fs7 fc0 sc0 ls14 ws31">C interfaces (SMBus/PMBus)</div><div class="t m0 x13 h9 y41 ff1 fs7 fc0 sc0 ls26 ws32">–<span class="_ _6"> </span>Up to 4 USAR<span class="_ _8"></span>T<span class="_ _9"></span>s/4 UAR<span class="_ _0"></span>T<span class="_ _a"></span>s (1<span class="_ _9"></span>1.25<span class="_"> </span>Mbit/s, </div><div class="t m0 x16 h9 y42 ff1 fs7 fc0 sc0 ls26 ws23">ISO7816 interface, LIN, IrDA, modem<span class="_ _0"></span> </div><div class="t m0 x16 h9 y43 ff1 fs7 fc0 sc0 ls2d ws4">control)</div><div class="t m0 x13 h9 y44 ff1 fs7 fc0 sc0 ls1d ws2d">–<span class="_ _6"> </span>Up to 6 SPIs (45<span class="_"> </span>Mbits/s), 2 with muxed<span class="_ _0"></span> </div><div class="t m0 x16 h9 y45 ff1 fs7 fc0 sc0 ls2e ws33">full-duplex I</div><div class="t m0 x15 ha y46 ff1 fs8 fc0 sc0 ls4 ws4">2</div><div class="t m0 x17 h9 y47 ff1 fs7 fc0 sc0 lsf ws18">S for<span class="fc1 ls4 ws4"> </span><span class="ls2f ws34">audio class accuracy via </span></div><div class="t m0 x16 h9 y48 ff1 fs7 fc0 sc0 ls30 ws35">internal audi<span class="_ _4"></span>o PLL or external cloc<span class="_ _4"></span>k</div><div class="t m0 x13 h9 y49 ff1 fs7 fc0 sc0 ls31 ws36">–<span class="_ _6"> </span>1 x SAI (serial audio interface)</div><div class="t m0 x13 h9 y4a ff1 fs7 fc0 sc0 ls32 ws37">–<span class="_ _6"> </span>2 × CAN (2.0B Active<span class="ls30 ws35">) and SDIO interfac<span class="_ _4"></span>e</span></div><div class="t m0 x12 h9 y4b ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls21 ws1f">Advanced connectivity</span></div><div class="t m0 x13 h9 y4c ff1 fs7 fc0 sc0 ls1a ws16">–<span class="_ _6"> </span>USB 2.0 full-speed device/host/OTG </div><div class="t m0 x16 h9 y4d ff1 fs7 fc0 sc0 ls1e ws38">controller with on-chip<span class="_ _0"></span> PHY</div><div class="t m0 x13 h9 y4e ff1 fs7 fc0 sc0 ls1f ws1c">–<span class="_ _6"> </span>USB 2.0 high-speed/full-spe<span class="_ _0"></span>ed </div><div class="t m0 x16 h9 y4f ff1 fs7 fc0 sc0 ls1f ws1c">device/host/OTG contro<span class="_ _0"></span>ller with dedicated </div><div class="t m0 x16 h9 y50 ff1 fs7 fc0 sc0 ls28 ws28">DMA, on-chip full-speed PHY and ULPI</div><div class="t m0 x13 h9 y51 ff1 fs7 fc0 sc0 ls28 ws39">–<span class="_ _6"> </span>10/100 Ethernet MAC with dedicated<span class="_ _0"></span> DMA: </div><div class="t m0 x16 h9 y52 ff1 fs7 fc0 sc0 ls33 ws3a">supports IEEE 1588v2 hardware, MI<span class="_ _4"></span>I/RMII</div><div class="t m0 x12 h9 y53 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls18 ws3b">8- to 14-bit parallel ca<span class="_ _4"></span>mera interfac<span class="_ _4"></span>e up to </span></div><div class="t m0 x13 h9 y54 ff1 fs7 fc0 sc0 ls34 ws4">54<span class="_"> </span>Mbytes/s</div><div class="t m0 x12 h9 y55 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls35 ws3c">True random<span class="_ _0"></span> number g<span class="_ _0"></span>enerator</span></div><div class="t m0 x12 h9 y56 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls14 ws31">CRC calculation unit</span></div><div class="t m0 x12 h9 y57 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls1b ws1e">RTC: subsec<span class="_ _4"></span>ond accura<span class="_ _4"></span>cy, hardware c<span class="_ _4"></span>alendar</span></div><div class="t m0 x12 h9 y58 ff3 fs7 fc0 sc0 ls4 ws4">•<span class="_ _3"> </span><span class="ff1 ls36 ws3d">96-bit unique ID</span></div><div class="c x12 y59 w2 hb"><div class="t m0 x18 hc y5a ff4 fs0 fc0 sc0 ls0 ws3e">LQFP100 (14 × 14 mm)</div><div class="t m0 x18 hc y5b ff4 fs0 fc0 sc0 ls0 ws3e">LQFP144 (20 × 20 mm)</div><div class="t m0 x19 hc y5c ff4 fs0 fc0 sc0 ls37 ws3f">UFBGA176 (10 x 10 mm)</div><div class="t m0 x18 hc y5d ff4 fs0 fc0 sc0 ls0 ws3e">LQFP176 (24 × 24 mm)</div><div class="t m0 x18 hc y5e ff4 fs0 fc0 sc0 ls0 ws3e">LQFP208 (28 x 28 mm)</div><div class="t m0 x1a hc y5f ff4 fs0 fc0 sc0 ls38 ws4">WLCSP143</div><div class="t m0 x19 hc y60 ff4 fs0 fc0 sc0 ls38 ws40">TFBGA216 (13 x 13 mm)</div><div class="t m0 x1b hc y61 ff4 fs0 fc0 sc0 ls39 ws41">UFBGA169 (7 × 7 mm)</div></div><div class="c x1c y62 w3 hd"><div class="t m0 x1d he y63 ff5 fs9 fc2 sc0 ls4 ws4">&"'!</div></div><div class="t m0 x1e hf y1 ff6 fs0 fc3 sc0 ls3a ws4">www<span class="_ _8"></span>.s<span class="_ _4"></span>t.com</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.140143,0.000000,0.000000,1.140143,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c4b8e92dc900e623b2c52/bg2.jpg"><div class="t m0 x17 h10 y64 ff2 fs7 fc0 sc0 ls3b ws42">STM32F427xx<span class="_ _0"></span> STM32F429xx</div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls3c ws43">2/239<span class="_ _2"> </span>DocID024030 Rev 10</div><div class="t m0 x1f h11 y65 ff1 fsa fc0 sc0 ls3d ws4"> </div><div class="t m0 x20 h10 y66 ff2 fs7 fc0 sc0 ls2e ws33">T<span class="_ _9"></span>abl<span class="_ _4"></span>e 1. Device summary</div><div class="t m0 x21 h12 y67 ff2 fs1 fc0 sc0 ls3e ws44">Reference<span class="_ _b"> </span>Part number</div><div class="t m0 x22 h3 y68 ff1 fs1 fc0 sc0 ls3f ws4">STM32F427xx</div><div class="t m0 x23 h3 y69 ff1 fs1 fc0 sc0 ls40 ws45">STM32F427VG<span class="_ _9"></span>, STM32F427ZG<span class="_ _9"></span>, STM32F427IG<span class="_ _9"></span>, STM32F427AG<span class="_ _9"></span>, STM32F427VI, STM32F427ZI, </div><div class="t m0 x23 h3 y6a ff1 fs1 fc0 sc0 ls41 ws46">STM32F427II, STM32F427AI</div><div class="t m0 x22 h3 y6b ff1 fs1 fc0 sc0 ls3f ws4">STM32F429xx</div><div class="t m0 x23 h3 y6c ff1 fs1 fc0 sc0 ls3c ws47">STM32F429VG<span class="_ _9"></span>, STM32F429ZG<span class="_ _9"></span>, STM32F429IG<span class="_ _9"></span>, STM32F429BG<span class="_ _9"></span>, STM32F429NG<span class="_ _9"></span>, </div><div class="t m0 x23 h3 y6d ff1 fs1 fc0 sc0 ls3f ws48">STM32F429AG<span class="_ _9"></span>, STM32F429VI, STM32F429<span class="_ _4"></span>ZI, STM32F429II,, <span class="_ _4"></span>STM32F429BI, </div><div class="t m0 x23 h3 y6e ff1 fs1 fc0 sc0 ls41 ws46">STM32F429NI,STM32F429AI, STM32F42<span class="_ _4"></span>9VE, ST<span class="lsb ws49">M32F429<span class="_ _0"></span>ZE, STM32F42<span class="lsa ws4a">9IE, STM32F429BE, </span></span></div><div class="t m0 x23 h3 y6f ff1 fs1 fc0 sc0 ls40 ws4">STM32F429NE</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a></div><div class="pi" data-data='{"ctm":[1.140143,0.000000,0.000000,1.140143,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w4 h13" data-page-no="3"><div class="pc pc3 w4 h13"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c4b8e92dc900e623b2c52/bg3.jpg"><div class="t m0 x24 h3 y2 ff1 fs1 fc0 sc0 ls3f ws48">DocID024030 Rev 10<span class="_ _2"> </span>3/239</div><div class="t m0 x1 h10 y64 ff2 fs7 fc0 sc0 ls42 ws4b">STM32F427xx STM32F4<span class="_ _0"></span>29xx<span class="_ _c"> </span>Contents</div><div class="t m0 x25 h2 y1 ff1 fs0 fc2 sc0 ls4 ws4">6</div><div class="t m0 x1 h14 y70 ff2 fsb fc0 sc0 ls43 ws4">Content<span class="_ _0"></span>s</div><div class="t m0 x1 h15 y71 ff2 fs5 fc0 sc0 ls44 ws4c">1<span class="_ _d"> </span>Introduction <span class="_ _5"> </span>. . . . . . . . . . . . <span class="ls45 ws4d">. . . . . . . . . . . . <span class="ws4e">. . . . . . . . . . . . <span class="_ _0"></span><span class="ls46 ws4f">. . . . . . . . . . . <span class="_ _e"></span>13</span></span></span></div><div class="t m0 x1 h15 y72 ff2 fs5 fc0 sc0 ls47 ws50">2<span class="_ _d"> </span>Description . . . . . . . . <span class="ls45 ws51">. . . . . . . . . . . . . . <span class="ls44 ws52">. . . . . . . . . . . . . . <span class="ls4 ws4">. . . . . . . . . . . . <span class="_ _e"></span>14</span></span></span></div><div class="t m0 x1f h16 y73 ff1 fsc fc0 sc0 ls48 ws53">2.1<span class="_ _f"> </span>Full compatibility thro<span class="_ _0"></span>ughout the family <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _5"> </span>18</div><div class="t m0 x1 h15 y74 ff2 fs5 fc0 sc0 ls49 ws51">3<span class="_ _d"> </span>Functional overview <span class="_ _11"></span> . . . . . . <span class="ls4a ws54">. . . . . . . . . . . . <span class="ls45 ws4d">. . . . . . . . . . . . <span class="ls4b ws55">. . . . . . . . . . <span class="_ _11"></span>21</span></span></span></div><div class="t m0 x1f h16 y75 ff1 fsc fc0 sc0 ls48 ws4">3.1<span class="_ _f"> </span>Arm</div><div class="t m0 x26 h17 y76 ff1 fsd fc0 sc0 ls4 ws4">®</div><div class="t m0 x27 h16 y75 ff1 fsc fc0 sc0 ls4c ws4"> Cortex®-M4 with FPU and embedded<span class="_ _0"></span> Flash and SRAM <span class="_ _5"> </span>. . . . . . . . <span class="_ _12"> </span>21</div><div class="t m0 x1f h16 y77 ff1 fsc fc0 sc0 ls4c ws4">3.2<span class="_ _f"> </span>Adaptive real-time memory accelerator (AR<span class="_ _8"></span>T Accelerator™) <span class="_ _12"> </span> . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>21</div><div class="t m0 x1f h16 y78 ff1 fsc fc0 sc0 ls4c ws4">3.3<span class="_ _f"> </span>Memory protection unit <span class="_ _4"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>21</div><div class="t m0 x1f h16 y79 ff1 fsc fc0 sc0 ls4c ws4">3.4<span class="_ _f"> </span>Embedded Flash memory <span class="_ _10"> </span> . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>22</div><div class="t m0 x1f h16 y7a ff1 fsc fc0 sc0 ls4d ws56">3.5<span class="_ _f"> </span>CRC (cyclic redundancy check) <span class="ls4c ws4">calculation unit <span class="_ _12"> </span> . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>22</span></div><div class="t m0 x1f h16 y7b ff1 fsc fc0 sc0 ls4c ws4">3.6<span class="_ _f"> </span>Embedded SRAM . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>22</div><div class="t m0 x1f h16 y7c ff1 fsc fc0 sc0 ls48 ws53">3.7<span class="_ _f"> </span>Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>22</div><div class="t m0 x1f h16 y7d ff1 fsc fc0 sc0 ls48 ws53">3.8<span class="_ _f"> </span>DMA controller (DMA) <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>23</div><div class="t m0 x1f h16 y7e ff1 fsc fc0 sc0 ls4c ws4">3.9<span class="_ _f"> </span>Flexible memory controller (FMC) <span class="_ _e"></span> . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>24</div><div class="t m0 x1f h16 y7f ff1 fsc fc0 sc0 ls48 ws53">3.10<span class="_ _13"> </span>LCD-TFT controller (available only on STM32F429xx) <span class="_ _e"></span> . . . . . . . . . . . . . . <span class="_ _12"> </span>24</div><div class="t m0 x1f h16 y80 ff1 fsc fc0 sc0 ls4c ws4">3.1<span class="_ _9"></span>1<span class="_ _14"> </span>Chrom-AR<span class="_ _0"></span>T Accelerator™ (DMA2D) <span class="_ _5"> </span>. . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>25</div><div class="t m0 x1f h16 y81 ff1 fsc fc0 sc0 ls4e ws57">3.12<span class="_ _13"> </span>Nested vectored interrupt co<span class="_ _0"></span>ntroller (NVIC) <span class="_ _10"> </span>. . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>25</div><div class="t m0 x1f h16 y82 ff1 fsc fc0 sc0 ls4c ws4">3.13<span class="_ _13"> </span>External interrupt/event con<span class="_ _0"></span>troller (EXTI) <span class="_ _e"></span>. . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>25</div><div class="t m0 x1f h16 y83 ff1 fsc fc0 sc0 ls4c ws4">3.14<span class="_ _13"> </span>Clocks and startup . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>25</div><div class="t m0 x1f h16 y84 ff1 fsc fc0 sc0 ls4c ws4">3.15<span class="_ _13"> </span>Boot modes <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>26</div><div class="t m0 x1f h16 y85 ff1 fsc fc0 sc0 ls4c ws4">3.16<span class="_ _13"> </span>Power supply schemes <span class="_ _12"> </span> . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>26</div><div class="t m0 x1f h16 y86 ff1 fsc fc0 sc0 ls4c ws4">3.17<span class="_ _13"> </span>Power supply supervisor <span class="_ _10"> </span> . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>26</div><div class="t m0 x28 h9 y87 ff1 fs7 fc0 sc0 ls4 ws58">3.17.1<span class="_ _14"> </span>Internal reset ON <span class="_ _12"> </span>. . . .<span class="_ _4"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . 26</div><div class="t m0 x28 h9 y88 ff1 fs7 fc0 sc0 ls4f ws59">3.17.2<span class="_ _14"> </span>Internal reset OFF . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . 27</div><div class="t m0 x1f h16 y89 ff1 fsc fc0 sc0 ls4e ws57">3.18<span class="_ _13"> </span>V<span class="_ _9"></span>oltage regulator <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>28</div><div class="t m0 x28 h9 y8a ff1 fs7 fc0 sc0 ls50 ws5a">3.18.1<span class="_ _14"> </span>Regulator ON <span class="_ _11"></span>. . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . 28</div><div class="t m0 x28 h9 y8b ff1 fs7 fc0 sc0 ls4 ws58">3.18.2<span class="_ _14"> </span>Regulator OFF <span class="_ _e"> </span>. <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 29</div><div class="t m0 x28 h9 y8c ff1 fs7 fc0 sc0 ls25 ws5b">3.18.3<span class="_ _15"> </span>Regulator ON/OFF and inte<span class="ls1c ws1d">rnal reset ON/OFF availability <span class="_ _4"></span> . <span class="_ _4"></span>. . . . . . . . . 32</span></div><div class="t m0 x1f h16 y8d ff1 fsc fc0 sc0 ls51 ws5c">3.19<span class="_ _13"> </span>Real-time clock (RT<span class="_ _0"></span>C), backup SRAM and backup registers . . . . . . . . . . <span class="_ _5"> </span>32</div><div class="t m0 x1f h16 y8e ff1 fsc fc0 sc0 ls48 ws53">3.20<span class="_ _13"> </span>Low-power modes <span class="_ _e"></span> . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>33</div><div class="t m0 x1f h16 y8f ff1 fsc fc0 sc0 ls52 ws4">3.21<span class="_ _13"> </span>V</div><div class="t m0 x29 h17 y90 ff1 fsd fc0 sc0 ls53 ws4">BA<span class="_ _9"></span>T</div><div class="t m0 x2a h16 y91 ff1 fsc fc0 sc0 ls4c ws4"> operation . . . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>34</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return 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<div id="pf4" class="pf w4 h13" data-page-no="4"><div class="pc pc4 w4 h13"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c4b8e92dc900e623b2c52/bg4.jpg"><div class="t m0 x1 h10 y64 ff2 fs7 fc0 sc0 ls34 ws5d">Contents<span class="_ _c"> </span>STM32F42<span class="_ _0"></span>7xx STM32F429xx</div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls3c ws43">4/239<span class="_ _2"> </span>DocID024030 Rev 10</div><div class="t m0 x1f h16 y92 ff1 fsc fc0 sc0 ls4e ws57">3.22<span class="_ _13"> </span>T<span class="_ _8"></span>imers and watchdogs <span class="_ _12"> </span>. . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>34</div><div class="t m0 x28 h9 y93 ff1 fs7 fc0 sc0 ls29 ws2a">3.22.1<span class="_ _15"> </span>Advanced-control timers (TIM1, TIM8) <span class="_ _12"> </span> . . . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . 36</div><div class="t m0 x28 h9 y94 ff1 fs7 fc0 sc0 ls54 ws5e">3.22.2<span class="_ _15"> </span>G<span class="_ _4"></span>eneral-pur<span class="_ _4"></span>pose time<span class="_ _4"></span>rs (TIMx)<span class="ls55 ws5f"> <span class="_ _11"></span> . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . 36</span></div><div class="t m0 x28 h9 y95 ff1 fs7 fc0 sc0 ls33 ws3a">3.22.3<span class="_ _15"> </span>Basic timers TIM6 and TIM7 <span class="_ _e"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . 36</div><div class="t m0 x28 h9 y96 ff1 fs7 fc0 sc0 ls56 ws60">3.22.4<span class="_ _15"> </span>Independent watchdog <span class="_"> </span> . . . . . . . . .<span class="_ _4"></span> . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . 37</div><div class="t m0 x28 h9 y97 ff1 fs7 fc0 sc0 ls4f ws59">3.22.5<span class="_ _15"> </span>Window watchdog <span class="_ _4"></span> . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . 37</div><div class="t m0 x28 h9 y98 ff1 fs7 fc0 sc0 ls57 ws61">3.22.6<span class="_ _15"> </span>SysT<span class="_ _0"></span>ick timer <span class="_"> </span>. . . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 37</div><div class="t m0 x1f h16 y99 ff1 fsc fc0 sc0 ls48 ws53">3.23<span class="_ _13"> </span>Inter-integrated circuit interface ( I</div><div class="t m0 x2b h17 y9a ff1 fsd fc0 sc0 ls4 ws4">2</div><div class="t m0 x2c h16 y99 ff1 fsc fc0 sc0 ls4c ws4">C) <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>37</div><div class="t m0 x1f h16 y9b ff1 fsc fc0 sc0 ls4c ws4">3.24<span class="_ _13"> </span>Universal synchronous/asynchronous re<span class="ls58 ws62">ceiver transmitters (USAR<span class="_ _8"></span>T) <span class="_"> </span> . . <span class="_ _12"> </span>37</span></div><div class="t m0 x1f h16 y9c ff1 fsc fc0 sc0 ls4c ws4">3.25<span class="_ _13"> </span>Serial peripheral interface (SPI) <span class="_ _10"> </span>. . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>38</div><div class="t m0 x1f h16 y9d ff1 fsc fc0 sc0 ls51 ws5c">3.26<span class="_ _13"> </span>Inter-integrated sound (I</div><div class="t m0 x2d h17 y9e ff1 fsd fc0 sc0 ls4 ws4">2</div><div class="t m0 x2e h16 y9f ff1 fsc fc0 sc0 ls4c ws4">S) <span class="_ _11"></span> . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>39</div><div class="t m0 x1f h16 ya0 ff1 fsc fc0 sc0 ls4c ws4">3.27<span class="_ _13"> </span>Serial Audio interface (SAI1) <span class="_ _e"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>39</div><div class="t m0 x1f h16 ya1 ff1 fsc fc0 sc0 ls4e ws57">3.28<span class="_ _13"> </span>Audio PLL (PLLI2S) . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . <span class="_ _12"> </span>39</div><div class="t m0 x1f h16 ya2 ff1 fsc fc0 sc0 ls48 ws53">3.29<span class="_ _13"> </span>Audio and LCD PLL(PLLSAI) <span class="_ _e"></span>. . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>39</div><div class="t m0 x1f h16 ya3 ff1 fsc fc0 sc0 ls4c ws4">3.30<span class="_ _13"> </span>Secure digital in<span class="_ _0"></span>put/output interface (SDIO) <span class="_ _11"></span>. . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>40</div><div class="t m0 x1f h16 ya4 ff1 fsc fc0 sc0 ls4e ws57">3.31<span class="_ _13"> </span>Ethernet MAC interface with dedicated DMA <span class="_ _0"></span>and IEEE<span class="_"> </span>1588 support <span class="_ _4"></span>. . . <span class="_ _5"> </span>40</div><div class="t m0 x1f h16 ya5 ff1 fsc fc0 sc0 ls4c ws4">3.32<span class="_ _13"> </span>Controller area network (bxCAN) <span class="_ _10"> </span>. . . . . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>40</div><div class="t m0 x1f h16 ya6 ff1 fsc fc0 sc0 ls4e ws57">3.33<span class="_ _13"> </span>Universal serial bus on-the-go<span class="_ _0"></span> full-speed (OTG_FS) <span class="_ _10"> </span>. . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _5"> </span>41</div><div class="t m0 x1f h16 ya7 ff1 fsc fc0 sc0 ls4e ws57">3.34<span class="_ _13"> </span>Universal serial bus on-the-go<span class="_ _0"></span> high-speed (OTG_HS) . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>41</div><div class="t m0 x1f h16 ya8 ff1 fsc fc0 sc0 ls51 ws5c">3.35<span class="_ _13"> </span>Digital camera interface (DCMI) <span class="_ _e"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _5"> </span>42</div><div class="t m0 x1f h16 ya9 ff1 fsc fc0 sc0 ls4c ws4">3.36<span class="_ _13"> </span>Random number generator (RNG) <span class="_ _4"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>42</div><div class="t m0 x1f h16 yaa ff1 fsc fc0 sc0 ls4e ws57">3.37<span class="_ _13"> </span>General-purpose input/output<span class="_ _8"></span>s (GPIOs) <span class="_ _4"></span>. . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _5"> </span>42</div><div class="t m0 x1f h16 yab ff1 fsc fc0 sc0 ls51 ws5c">3.38<span class="_ _13"> </span>Analog-to-digital converters (ADCs) <span class="_ _11"></span>. . . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>42</div><div class="t m0 x1f h16 yac ff1 fsc fc0 sc0 ls4e ws57">3.39<span class="_ _13"> </span>T<span class="_ _a"></span>emperature sensor <span class="_ _12"> </span>. . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>43</div><div class="t m0 x1f h16 yad ff1 fsc fc0 sc0 ls51 ws5c">3.40<span class="_ _13"> </span>Digital-to-analog converter (DAC) <span class="_ _10"> </span> . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>43</div><div class="t m0 x1f h16 yae ff1 fsc fc0 sc0 ls51 ws56">3.41<span class="_ _13"> </span>Serial wire JT<span class="_ _9"></span>AG debug port (SWJ-DP) <span class="_ _12"> </span>. .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>43</div><div class="t m0 x1f h16 yaf ff1 fsc fc0 sc0 ls48 ws53">3.42<span class="_ _13"> </span>Embedded T<span class="_ _8"></span>race Macrocell™ <span class="_ _e"></span> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . <span class="_ _12"> </span>44</div><div class="t m0 x1 h15 yb0 ff2 fs5 fc0 sc0 ls49 ws4">4<span class="_ _d"> </span>Pinout<span class="_ _8"></span>s and pin description <span class="_ _10"> </span>. . . <span class="ls59 ws63">. . . . . . . . . . . . . . . . <span class="ls46 ws4e">. . . . . . . . . . . . . . . <span class="_ _e"></span>45</span></span></div><div class="t m0 x1 h15 yb1 ff2 fs5 fc0 sc0 ls5a ws64">5<span class="_ _d"> </span>Memory mapping . . . . . . . . . . <span class="ls44 ws65">. . . . . . . . . . . . . . . . . <span class="ls5b ws66">. . . . . . . . . . . . . . . . <span class="_ _e"></span>86</span></span></div><div class="t m0 x1 h15 yb2 ff2 fs5 fc0 sc0 ls47 ws67">6<span class="_ _d"> </span>Electrical characteristi<span class="ws68">cs <span class="_ _16"> </span> . . . . . . . . . . . <span class="ls59 ws51">. . . . . . . . . . . . . <span class="ls4 ws4">. . . . . . . . . . . . <span class="_ _11"></span>91</span></span></span></div><div class="t m0 x1f h16 yb3 ff1 fsc fc0 sc0 ls4c ws4">6.1<span class="_ _f"> </span>Parameter conditions <span class="_ _12"> </span>. . . . . . . . . . . . . . . . . . . . . <span class="_ _0"></span>. . . . . . . . . . . . . . . . . . . <span class="_ _12"> </span>91</div><div class="t m0 x28 h9 yb4 ff1 fs7 fc0 sc0 ls33 ws3a">6.1.1<span class="_ _f"> </span>Minimum and maximum values <span class="_ _12"> </span>. . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . 91</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d 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<div id="pf5" class="pf w4 h13" data-page-no="5"><div class="pc pc5 w4 h13"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625c4b8e92dc900e623b2c52/bg5.jpg"><div class="t m0 x24 h3 y2 ff1 fs1 fc0 sc0 ls3f ws48">DocID024030 Rev 10<span class="_ _2"> </span>5/239</div><div class="t m0 x1 h10 y64 ff2 fs7 fc0 sc0 ls42 ws4b">STM32F427xx STM32F4<span class="_ _0"></span>29xx<span class="_ _c"> </span>Contents</div><div class="t m0 x25 h2 y1 ff1 fs0 fc2 sc0 ls4 ws4">6</div><div class="t m0 x28 h9 yb5 ff1 fs7 fc0 sc0 ls50 ws5a">6.1.2<span class="_ _f"> </span>T<span class="_ _8"></span>ypical values <span class="_ _12"> </span> . . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 91</div><div class="t m0 x28 h9 yb6 ff1 fs7 fc0 sc0 ls50 ws5a">6.1.3<span class="_ _f"> </span>T<span class="_ _8"></span>ypical curves <span class="_ _16"> </span> . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . 91</div><div class="t m0 x28 h9 yb7 ff1 fs7 fc0 sc0 ls4 ws58">6.1.4<span class="_ _f"> </span>Loading capacitor <span class="_"> </span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . <span class="_ _4"></span>91</div><div class="t m0 x28 h9 yb8 ff1 fs7 fc0 sc0 ls5c ws58">6.1.5<span class="_ _f"> </span>Pin input voltage <span class="_ _12"> </span> . . . . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . 91</div><div class="t m0 x28 h9 yb9 ff1 fs7 fc0 sc0 ls4 ws58">6.1.6<span class="_ _f"> </span>Power supply scheme <span class="_ _11"></span> . . . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . 92</div><div class="t m0 x28 h9 yba ff1 fs7 fc0 sc0 ls33 ws3a">6.1.7<span class="_ _f"> </span>Current consumption meas<span class="_ _4"></span>urement <span class="_"> </span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 93</div><div class="t m0 x1f h16 ybb ff1 fsc fc0 sc0 ls48 ws53">6.2<span class="_ _f"> </span>Absolute maximum ratings <span class="_ _e"></span>. . . . . . . . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>93</div><div class="t m0 x1f h16 ybc ff1 fsc fc0 sc0 ls4c ws4">6.3<span class="_ _f"> </span>Operating conditions <span class="_ _12"> </span> . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . . . . . . . . . . . . . .<span class="_ _0"></span> . . . . . . . . <span class="_ _12"> </span>95</div><div class="t m0 x28 h9 ybd ff1 fs7 fc0 sc0 ls25 ws5b">6.3.1<span class="_ _f"> </span>General operating conditions <span class="_ _11"></span><span class="ls55 ws5f">. . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . .<span class="_ _4"></span> . . . . . . . <span class="_ _4"></span>95</span></div><div class="t m0 x28 h9 ybe ff1 fs7 fc0 sc0 ls56 ws60">6.3.2<span class="_ _f"> </span>VCAP1/VCAP2 external capacitor <span class="_ _e"> </span>. . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 97</div><div class="t m0 x28 h9 ybf ff1 fs7 fc0 sc0 ls27 ws69">6.3.3<span class="_ _f"> </span>Operating conditions at power-up / power-down (regulator ON) <span class="_ _10"> </span>. . . <span class="_ _4"></span>. . . 98</div><div class="t m0 x28 h9 yc0 ff1 fs7 fc0 sc0 ls27 ws69">6.3.4<span class="_ _f"> </span>Operating conditions at power-up / power-down (regulator OFF) <span class="_"> </span>. . . . . 98</div><div class="t m0 x28 h9 yc1 ff1 fs7 fc0 sc0 ls31 ws6a">6.3.5<span class="_ _f"> </span>Reset and power control block <span class="_ _0"></span>characterist<span class="ls57 ws61">ics <span class="_"> </span> . . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. 99</span></div><div class="t m0 x28 h9 yc2 ff1 fs7 fc0 sc0 ls5d ws6b">6.3.6<span class="_ _f"> </span>Over-drive switching characteris<span class="_ _4"></span>tics <span class="_ _12"> </span> . . . . . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . 100</div><div class="t m0 x28 h9 yc3 ff1 fs7 fc0 sc0 ls56 ws60">6.3.7<span class="_ _f"> </span>Supply current charact<span class="_ _4"></span>eristics <span class="_ _4"></span> . . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . 101</div><div class="t m0 x28 h9 yc4 ff1 fs7 fc0 sc0 ls29 ws2a">6.3.8<span class="_ _f"> </span>W<span class="_ _0"></span>akeup time from low-power modes <span class="_ _4"></span>. . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . <span class="_ _11"></span>1<span class="_ _9"></span>1<span class="_ _4"></span>7</div><div class="t m0 x28 h9 yc5 ff1 fs7 fc0 sc0 ls4f ws59">6.3.9<span class="_ _f"> </span>External cloc<span class="_ _4"></span>k source characteristics <span class="_ _11"></span>. . . . . . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . <span class="_ _11"></span>1<span class="_ _8"></span>18</div><div class="t m0 x28 h9 yc6 ff1 fs7 fc0 sc0 ls17 ws14">6.3.10<span class="_ _15"> </span>Internal clock source char<span class="ls5c ws6c">acteristics <span class="_ _e"> </span> . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . 122</span></div><div class="t m0 x28 h9 yc7 ff1 fs7 fc0 sc0 ls5c ws6c">6.3.1<span class="_ _9"></span>1<span class="_ _17"> </span>PLL characteristics <span class="_"> </span> . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . 124</div><div class="t m0 x28 h9 yc8 ff1 fs7 fc0 sc0 ls28 ws6d">6.3.12<span class="_ _15"> </span>PLL spread spectrum clo<span class="_ _0"></span>ck generatio<span class="ls5e ws6e">n (SSCG) characteristics <span class="_ _e"></span> . . . . . 127</span></div><div class="t m0 x28 h9 yc9 ff1 fs7 fc0 sc0 ls4 ws58">6.3.13<span class="_ _15"> </span>Memory characteristics <span class="_ _e"> </span> . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . 129</div><div class="t m0 x28 h9 yca ff1 fs7 fc0 sc0 ls4f ws59">6.3.14<span class="_ _15"> </span>EMC characteristics <span class="_ _e"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . .<span class="_ _4"></span> . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . 131</div><div class="t m0 x28 h9 ycb ff1 fs7 fc0 sc0 ls12 ws6f">6.3.15<span class="_ _15"> </span>Absolute maximum rating<span class="_ _0"></span>s <span class="ls4f ws59">(electrical sensitivity) <span class="_ _12"> </span> . . . . . . . . . . . . .<span class="_ _4"></span> . . . 133</span></div><div class="t m0 x28 h9 ycc ff1 fs7 fc0 sc0 ls56 ws60">6.3.16<span class="_ _15"> </span>I/O current injection charac<span class="_ _4"></span>teristics <span class="_ _4"></span> . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>134</div><div class="t m0 x28 h9 ycd ff1 fs7 fc0 sc0 ls4 ws58">6.3.17<span class="_ _15"> </span>I/O port characteristics <span class="_ _e"> </span>. . . . .<span class="_ _4"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . <span class="_ _4"></span>135</div><div class="t m0 x28 h9 yce ff1 fs7 fc0 sc0 ls4f ws59">6.3.18<span class="_ _15"> </span>NRST pin characteristics<span class="_ _4"></span> <span class="_ _10"> </span>. . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>141</div><div class="t m0 x28 h9 ycf ff1 fs7 fc0 sc0 ls56 ws60">6.3.19<span class="_ _15"> </span>TIM timer characteristics <span class="_ _11"></span> . . . . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . <span class="_ _4"></span>142</div><div class="t m0 x28 h9 yd0 ff1 fs7 fc0 sc0 ls5d ws6b">6.3.20<span class="_ _15"> </span>Communications interfaces <span class="_"> </span>. . . . . . . <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>142</div><div class="t m0 x28 h9 yd1 ff1 fs7 fc0 sc0 ls56 ws60">6.3.21<span class="_ _15"> </span>12-bit ADC characteristics <span class="_ _12"> </span>. . . . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . <span class="_ _4"></span>157</div><div class="t m0 x28 h9 yd2 ff1 fs7 fc0 sc0 ls29 ws2a">6.3.22<span class="_ _15"> </span>T<span class="_ _a"></span>emperature sensor characteristic<span class="_ _4"></span>s <span class="_ _11"></span>. . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . . .<span class="_ _4"></span> . . . . . . <span class="_ _4"></span>163</div><div class="t m0 x28 h9 yd3 ff1 fs7 fc0 sc0 ls1d ws4">6.3.23<span class="_ _15"> </span>V</div><div class="t m0 x2f ha yd4 ff1 fs8 fc0 sc0 ls24 ws4">BA<span class="_ _8"></span>T</div><div class="t m0 x30 h9 yd5 ff1 fs7 fc0 sc0 ls4 ws58"> monitoring characteristics <span class="_ _12"> </span>. . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . 164</div><div class="t m0 x28 h9 yd6 ff1 fs7 fc0 sc0 ls56 ws60">6.3.24<span class="_ _15"> </span>Reference voltage <span class="_ _4"></span> . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . . <span class="_ _4"></span>. . 164</div><div class="t m0 x28 h9 yd7 ff1 fs7 fc0 sc0 ls4f ws59">6.3.25<span class="_ _15"> </span>DAC electrical c<span class="_ _4"></span>haracteristics <span class="_ _16"> </span> . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . 165</div><div class="t m0 x28 h9 yd8 ff1 fs7 fc0 sc0 ls56 ws60">6.3.26<span class="_ _15"> </span>FMC characteristics <span class="_ _16"> </span>. . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . . <span class="_ _4"></span>. . . . . . . . <span class="_ _4"></span>168</div><div class="t m0 x28 h9 yd9 ff1 fs7 fc0 sc0 ls5f ws70">6.3.27<span class="_ _15"> </span>Camera interface (DCMI) timing s<span class="_ _4"></span>pecifications <span class="_"> </span>. . . . . . . . <span class="_ _4"></span>. . . . . . . . . . <span class="_ _4"></span>193</div><div class="t m0 x28 h9 yda ff1 fs7 fc0 sc0 ls5f ws70">6.3.28<span class="_ _15"> </span>LCD-TFT controller (L<span class="_ _9"></span>TDC<span class="_ _4"></span>) characteristics <span class="_ _4"></span>. . . . . . . . . .<span class="_ _4"></span> . . . . . . . .<span class="_ _4"></span> . . . 194</div><div class="t m0 x28 h9 ydb ff1 fs7 fc0 sc0 ls12 ws26">6.3.29<span class="_ _15"> </span>SD/SDIO MMC card host <span class="ls5f ws70">interface (SDIO) characteristics <span class="_ _11"></span> . . . . . . . . . 196</span></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m3"></div></a><a class="l" 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