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stm8l相关说明及手册,英文版 2018-12-13日上传.
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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/62631ee04c65f4125996b1a5/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62631ee04c65f4125996b1a5/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">This is information on a product in full prod<span class="_ _0"></span>uction. </div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls1 ws1">February 2017<span class="_ _1"> </span>Doc ID023337 Rev 3<span class="_ _2"> </span>1/1<span class="_ _3"></span>12</div><div class="t m0 x2 h4 y3 ff2 fs2 fc0 sc0 ls2 ws2">STM8L052R8</div><div class="t m0 x3 h5 y4 ff1 fs3 fc0 sc0 ls3 ws2">V<span class="_ _4"></span>alue Line, 8-bit ultralow <span class="ls4 ws3">power MCU, 64-KB Flash, </span></div><div class="t m0 x1 h5 y5 ff1 fs3 fc0 sc0 ls5 ws4">256-byte data EEPROM, R<span class="_ _3"></span>TC, LCD, timers, USART<span class="_ _5"></span>, I2C, SPI, ADC</div><div class="t m0 x4 h6 y6 ff2 fs1 fc0 sc0 ls6 ws2">Datasheet <span class="ff1 fs4 ls3">-</span><span class="ls7 ws5"> production data</span></div><div class="t m0 x1 h7 y7 ff2 fs5 fc0 sc0 ls8 ws2">Features</div><div class="t m0 x1 h8 y8 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls9 ws6">Operating conditions</span></div><div class="t m0 x5 h8 y9 ff1 fs6 fc0 sc0 lsa ws7">&#8211;<span class="_ _7"> </span>Operating powe<span class="_ _0"></span>r supply: 1.8 V to 3.6 V</div><div class="t m0 x5 h8 ya ff1 fs6 fc0 sc0 lsa ws8">&#8211;<span class="_ _7"> </span>T<span class="_ _4"></span>emperature range: -4<span class="_ _0"></span>0 &#176;C to 85 &#176;C</div><div class="t m0 x1 h8 yb ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 lsb ws9">Low power <span class="_ _8"></span>features</span></div><div class="t m0 x5 h8 yc ff1 fs6 fc0 sc0 lsc wsa">&#8211;<span class="_ _7"> </span>5 low power modes: W<span class="_ _0"></span>ait, Low power run </div><div class="t m0 x6 h8 yd ff1 fs6 fc0 sc0 lsd wsb">(5.9 &#181;A), Low power wait (3<span class="_ _0"></span> &#181;A), Active-halt </div><div class="t m0 x6 h8 ye ff1 fs6 fc0 sc0 lse wsc">with full RTC (1.4 &#181;A<span class="lsf wsd">), Halt (400 nA)</span></div><div class="t m0 x5 h8 yf ff1 fs6 fc0 sc0 ls10 wse">&#8211;<span class="_ _7"> </span>Dynamic power consumption: <span class="ff3 ls3 ws2"> </span></div><div class="t m0 x6 h8 y10 ff1 fs6 fc0 sc0 ls11 wsf">200 &#181;A/MHz + 330 &#181;A</div><div class="t m0 x5 h8 y11 ff1 fs6 fc0 sc0 ls12 ws10">&#8211;<span class="_ _7"> </span>Ultra-low leakage per I/0: 50 nA</div><div class="t m0 x5 h8 y12 ff1 fs6 fc0 sc0 ls13 ws11">&#8211;<span class="_ _7"> </span>Fast wakeup from Halt: 4.7 &#181;s</div><div class="t m0 x1 h8 y13 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls14 ws12">Advanced STM<span class="_ _8"></span>8 core</span></div><div class="t m0 x5 h8 y14 ff1 fs6 fc0 sc0 ls15 ws13">&#8211;<span class="_ _7"> </span>Harvard architecture and 3-st<span class="_ _0"></span>age pip<span class="_ _0"></span>eline</div><div class="t m0 x5 h8 y15 ff1 fs6 fc0 sc0 ls9 ws6">&#8211;<span class="_ _7"> </span>Max freq. 16 MHz, 16 CISC MIPS peak</div><div class="t m0 x5 h8 y16 ff1 fs6 fc0 sc0 ls16 ws14">&#8211;<span class="_ _7"> </span>Up to 40 ext<span class="_ _8"></span>ernal interrupt sources</div><div class="t m0 x1 h8 y17 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 lsd ws15">Reset and supply management</span></div><div class="t m0 x5 h8 y18 ff1 fs6 fc0 sc0 ls15 ws16">&#8211;<span class="_ _7"> </span>Low power<span class="_ _3"></span>, ultra-safe BOR reset with 5 </div><div class="t m0 x6 h8 y19 ff1 fs6 fc0 sc0 ls17 ws17">programmabl<span class="_ _0"></span>e thresholds</div><div class="t m0 x5 h8 y1a ff1 fs6 fc0 sc0 ls18 ws18">&#8211;<span class="_ _7"> </span>Ultra low power POR/PDR</div><div class="t m0 x5 h8 y1b ff1 fs6 fc0 sc0 ls19 ws19">&#8211;<span class="_ _7"> </span>Programmable volt<span class="_ _0"></span>age detector (PVD)</div><div class="t m0 x1 h8 y1c ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls1a ws1a">Clock management</span></div><div class="t m0 x5 h8 y1d ff1 fs6 fc0 sc0 ls1b ws1b">&#8211;<span class="_ _7"> </span>32 kHz and 1 to 16 MHz crystal oscillators</div><div class="t m0 x5 h8 y1e ff1 fs6 fc0 sc0 ls1c ws1c">&#8211;<span class="_ _7"> </span>Interna<span class="_ _8"></span>l 16 MHz fac<span class="_ _8"></span>tory-trimm<span class="_ _8"></span>ed RC </div><div class="t m0 x5 h8 y1f ff1 fs6 fc0 sc0 ls10 wse">&#8211;<span class="_ _7"> </span>38 kHz low consumption RC </div><div class="t m0 x5 h8 y20 ff1 fs6 fc0 sc0 ls1d ws1d">&#8211;<span class="_ _7"> </span>Clock security system</div><div class="t m0 x1 h8 y21 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls1e ws1e">Low power RTC</span></div><div class="t m0 x5 h8 y22 ff1 fs6 fc0 sc0 ls1f ws1f">&#8211;<span class="_ _7"> </span>BCD calendar with alarm inte<span class="_ _0"></span>rrupt</div><div class="t m0 x5 h8 y23 ff1 fs6 fc0 sc0 ls20 ws20">&#8211;<span class="_ _7"> </span>Digital calibration with +/- 0.5pp<span class="_ _0"></span>m accuracy</div><div class="t m0 x5 h8 y24 ff1 fs6 fc0 sc0 ls15 ws16">&#8211;<span class="_ _7"> </span>Advanced anti-tamper<span class="_ _0"></span> detection</div><div class="t m0 x1 h8 y25 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls21 ws21">LCD: 8x24 o<span class="_ _8"></span>r 4x28 w/ st<span class="_ _8"></span>ep-up conv<span class="_ _8"></span>erter</span></div><div class="t m0 x1 h8 y26 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls22">Memories</span></div><div class="t m0 x5 h8 y27 ff1 fs6 fc0 sc0 ls1a ws1a">&#8211;<span class="_ _7"> </span>64 KB Flash program memory and<span class="_ _0"></span> 256 </div><div class="t m0 x6 h8 y28 ff1 fs6 fc0 sc0 ls23 ws22">bytes data EEPROM with ECC, RWW</div><div class="t m0 x5 h8 y29 ff1 fs6 fc0 sc0 ls24 ws23">&#8211;<span class="_ _7"> </span>Flexible write and read pr<span class="_ _0"></span>otection modes</div><div class="t m0 x5 h8 y2a ff1 fs6 fc0 sc0 ls25 ws24">&#8211;<span class="_ _7"> </span>4 KB of RAM</div><div class="t m0 x7 h8 y2b ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls10">DMA</span></div><div class="t m0 x8 h8 y2c ff1 fs6 fc0 sc0 ls26 ws25">&#8211;<span class="_ _7"> </span>4 channels supporting ADC, SPIs, I2C, </div><div class="t m0 x9 h8 y2d ff1 fs6 fc0 sc0 ls1d ws1d">USART<span class="_ _4"></span>s, timers</div><div class="t m0 x8 h8 y2e ff1 fs6 fc0 sc0 ls19 ws19">&#8211;<span class="_ _7"> </span>1 channel for memory-to-memory</div><div class="t m0 x7 h8 y2f ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls24 ws23">12-bit ADC up to 1 Msps/27 ch<span class="_ _0"></span>annels</span></div><div class="t m0 x8 h8 y30 ff1 fs6 fc0 sc0 ls19 ws19">&#8211;<span class="_ _7"> </span>Internal reference volt<span class="_ _0"></span>age</div><div class="t m0 x7 h8 y31 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 lsa">Timers</span></div><div class="t m0 x8 h8 y32 ff1 fs6 fc0 sc0 ls12 ws26">&#8211;<span class="_ _7"> </span>Three 16-bit timers with<span class="_ _0"></span> 2 channels (used </div><div class="t m0 x9 h8 y33 ff1 fs6 fc0 sc0 lsd ws15">as IC, OC, PWM), quadrature encoder</div><div class="t m0 x8 h8 y34 ff1 fs6 fc0 sc0 ls13 ws11">&#8211;<span class="_ _7"> </span>One 16-bit advanced control timer with 3 </div><div class="t m0 x9 h8 y35 ff1 fs6 fc0 sc0 ls1f ws27">channels, suppo<span class="_ _0"></span>rting motor control</div><div class="t m0 x8 h8 y36 ff1 fs6 fc0 sc0 ls27 ws2">&#8211;<span class="_ _7"> </span>One 8-bit <span class="_ _8"></span>timer with 7-<span class="_ _8"></span>bit prescaler</div><div class="t m0 x8 h8 y37 ff1 fs6 fc0 sc0 ls15 ws16">&#8211;<span class="_ _7"> </span>2 watchdogs: 1 Window<span class="_ _3"></span>, 1 Independent </div><div class="t m0 x8 h8 y38 ff1 fs6 fc0 sc0 ls11 wsf">&#8211;<span class="_ _7"> </span>Beeper timer with 1, 2 o<span class="_ _0"></span>r 4 kHz frequen<span class="_ _0"></span>cies</div><div class="t m0 x7 h8 y39 ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls27">Communication<span class="_ _8"></span> interfaces</span></div><div class="t m0 x8 h8 y3a ff1 fs6 fc0 sc0 ls27 ws28">&#8211;<span class="_ _7"> </span>T<span class="_ _3"></span>wo<span class="_ _8"></span> synchronou<span class="_ _8"></span>s serial interfa<span class="_ _8"></span>ces (SPI)</div><div class="t m0 x8 h8 y3b ff1 fs6 fc0 sc0 ls18 ws18">&#8211;<span class="_ _7"> </span>Fast I2C 400 kHz SMBus and PMBus</div><div class="t m0 x8 h8 y3c ff1 fs6 fc0 sc0 ls12 ws10">&#8211;<span class="_ _7"> </span>Three USART<span class="_ _4"></span>s (ISO 7816 inte<span class="_ _0"></span>rface + IrDA)</div><div class="t m0 x7 h8 y3d ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls28 ws29">Up to 54 I/Os, all mappab<span class="ls23 ws2a">le on interrupt vectors</span></span></div><div class="t m0 x7 h8 y3e ff3 fs6 fc0 sc0 ls3 ws2">&#8226;<span class="_ _6"> </span><span class="ff1 ls29 ws2b">Development su<span class="_ _8"></span>pport</span></div><div class="t m0 x8 h8 y3f ff1 fs6 fc0 sc0 ls24 ws2c">&#8211;<span class="_ _7"> </span>Fast on-chip pr<span class="_ _0"></span>ogramming and n<span class="_ _0"></span>on- </div><div class="t m0 x9 h8 y40 ff1 fs6 fc0 sc0 ls19 ws19">intrusive debugging with SWIM</div><div class="t m0 x8 h8 y41 ff1 fs6 fc0 sc0 ls10 wse">&#8211;<span class="_ _7"> </span>Bootloader using USAR<span class="_ _0"></span>T</div><div class="c x7 y42 w2 h9"><div class="t m0 xa h8 y43 ff1 fs6 fc0 sc0 ls2a ws2">LQFP64</div></div><div class="t m0 xb ha y1 ff4 fs0 fc1 sc0 ls2b ws2">www<span class="_ _0"></span>.st.com</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><div class="d m1"></div></div><div class="pi" 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