PCI Express M.2 Specification 0.9.zip_m.2 specification_PCI_Express_M_2

<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/6250093374bc5c010559b313/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250093374bc5c010559b313/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> </div><div class="c x2 y2 w2 h3"><div class="t m0 x3 h4 y3 ff2 fs0 fc0 sc0 ls0 ws0"><span class="fc1 sc0"> </span></div><div class="t m0 x0 h4 y4 ff2 fs0 fc0 sc0 ls0 ws0"><span class="fc1 sc0"> </span></div></div><div class="c x2 y5 w3 h5"><div class="t m0 x3 h4 y6 ff2 fs0 fc0 sc0 ls0 ws0"><span class="fc1 sc0"> </span></div><div class="t m0 x0 h4 y7 ff2 fs0 fc0 sc0 ls0 ws0"><span class="fc1 sc0"> </span></div></div><div class="t m0 x4 h6 y8 ff3 fs1 fc0 sc0 ls0 ws0">PCI Express M.2 </div><div class="t m0 x5 h6 y9 ff3 fs1 fc0 sc0 ls0 ws0">Specification<span class="_ _0"></span> </div><div class="t m0 x6 h7 ya ff4 fs2 fc0 sc0 ls0 ws0">Revision <span class="_ _0"></span><span class="ls1">0.</span>9, Version 3<span class="ls2">.0</span> </div><div class="t m0 x7 h8 yb ff4 fs3 fc0 sc0 ls0 ws0">July <span class="ls3">31</span>, 2013 </div><div class="t m0 x8 h7 yc ff4 fs2 fc0 sc0 ls0 ws0"> </div><div class="t m0 x9 h2 yd ff1 fs0 fc0 sc0 ls0 ws0"> </div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>

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<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250093374bc5c010559b313/bg3.jpg"><div class="t m0 xd he y25 ff5 fs7 fc0 sc0 ls0 ws0">PCI Express M<span class="_ _0"></span>.2 Specification<span class="ff4"> </span></div><div class="t m0 x9 hf y26 ff4 fs8 fc0 sc0 ls0 ws0"> </div><div class="t m0 x9 he y27 ff5 fs8 fc0 sc0 ls0 ws0">PCI Express M.2 Specification<span class="ff4"> <span class="_ _5"> </span></span><span class="fs7 fc2 ls7">| </span><span class="ff4"> 3 </span></div><div class="t m0 x9 hf y28 ff4 fs8 fc0 sc0 ls0 ws0">Revision 0.9, July 31, 2013 </div><div class="t m0 x9 hb y29 ff4 fs6 fc0 sc0 ls0 ws0"> </div><div class="t m0 xe h10 y2a ff5 fs2 fc2 sc0 ls0 ws0">Revision History<span class="_ _0"></span> </div><div class="c x9 y2b w4 h11"><div class="t m0 xf he y2c ff5 fs7 fc0 sc0 ls0 ws0">Rev </div></div><div class="c x10 y2b w5 h11"><div class="t m0 x11 he y2c ff5 fs7 fc0 sc0 ls0 ws0">Version </div></div><div class="c x12 y2b w6 h11"><div class="t m0 x13 he y2c ff5 fs7 fc0 sc0 ls0 ws0">History </div></div><div class="c x14 y2b w7 h11"><div class="t m0 x13 he y2c ff5 fs7 fc0 sc0 ls0 ws0">Date </div></div><div class="c x9 y2d w4 h12"><div class="t m0 x13 hf y2e ff4 fs8 fc0 sc0 ls0 ws0">0.9 </div></div><div class="c x10 y2d w5 h12"><div class="t m0 x13 hf y2e ff4 fs8 fc0 sc0 ls0 ws0">3<span class="ls8">.0</span> </div></div><div class="c x12 y2d w6 h12"><div class="t m0 x13 h13 y2f ff5 fs8 fc0 sc0 ls0 ws0">Deleted 0.7a Information </div><div class="t m0 x13 hf y30 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 84. <span class="_ _7"> </span>Sleep Request Initiated by Ho<span class="ls9">st</span> </span></span></div><div class="t m0 x13 hf y31 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 84. <span class="_ _7"> </span>Sleep Request Initiated by the Device </span></span></div><div class="t m0 x13 hf y32 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 85. <span class="_ _7"> </span>W<span class="_ _0"></span>ak<span class="_ _1"></span>eup Sequence Initiated by the Host </span></span></div><div class="t m0 x13 hf y33 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.10.1.1, Example of Power On/Off Sequence </span></span></div><div class="t m0 x13 hf y34 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.10.1.2, Example of Power On/Off Sequence </span></span></div><div class="t m0 x13 hf y35 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.10.1.3, Proper Shutdown Handshaking Process. </span></span></div><div class="t m0 x13 hf y36 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.10.1.4, Example of Very-thin Notebooks Power On/Off </span></span></div><div class="t m0 x15 hf y37 ff4 fs8 fc0 sc0 ls0 ws0">Sequence </div><div class="t m0 x13 hf y38 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.11.1, DEVSLP </span></span></div><div class="t m0 x13 hf y39 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.11.2, DAS/DSS# </span></span></div><div class="t m0 x13 h13 y3a ff5 fs8 fc0 sc0 ls0 ws0">Note:<span class="ff4"> Information that was moved is not noted. </span></div><div class="t m0 x13 h13 y3b ff5 fs8 fc0 sc0 ls0 ws0">Added 0.9 Information </div><div class="t m0 x13 hf y3c ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.1.10.4, NFC Supplemental UIM Interface Wiring Example </span></span></div><div class="t m0 x13 hf y3d ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 85 <span class="_ _7"> </span>Supplemental NFC Signal Connection Example </span></span></div><div class="t m0 x13 hf y3e ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.7.1, DEVSLP </span></span></div><div class="t m0 x13 hf y3f ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">3.2.7.2, DAS/DSS# </span></span></div><div class="t m0 x13 hf y40 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">Information under Figure 83 </span></span></div><div class="t m0 x13 hf y41 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.3.1, Test Fixture Requirements </span></span></div><div class="t m0 x13 hf y42 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.3, Suggested Top Mount Signal Integrity PCB Layout </span></span></div><div class="t m0 x13 hf y43 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 100. <span class="_"> </span>Top Mount M<span class="_ _1"></span>odule Test Fixture PCB Layout </span></span></div><div class="t m0 x13 hf y44 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 101. <span class="_"> </span>Top Mount M<span class="_ _1"></span>other Board<span class="_ _0"></span> Test <span class="_ _1"></span>Fixture PCB </span></span></div><div class="t m0 x13 hf y45 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.3.3, Suggested Mid-Plane Signal Integrity PCB Layout </span></span></div><div class="t m0 x13 hf y46 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 102. <span class="_"> </span>Top Mount Connector Test Fixture </span></span></div><div class="t m0 x13 hf y47 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 103. <span class="_"> </span>M<span class="_ _1"></span>id Plane Co<span class="_ _0"></span>nnector Test Fix<span class="_ _1"></span>ture </span></span></div><div class="t m0 x13 hf y48 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 104. <span class="_"> </span>M<span class="_ _1"></span>id-Plane Module Test <span class="_ _0"></span>Fix<span class="_ _1"></span>ture PCB Layout </span></span></div><div class="t m0 x13 hf y49 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 105. <span class="_"> </span>M<span class="_ _1"></span>id Plane Mother Board<span class="_ _0"></span> Test <span class="_ _1"></span>Fixture PCB </span></span></div><div class="t m0 x13 hf y4a ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 106. <span class="_"> </span>Detail of Top Side SM<span class="_ _1"></span>A End Launch Connector Pad<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf y4b ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 107. <span class="_"> </span>Ground Void on Backside </span></span></div><div class="t m0 x13 hf y4c ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 108. <span class="_"> </span>Detail of Mid Plane Vias on Top Side M<span class="_ _1"></span>other Board<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf y4d ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 109. <span class="_"> </span>Detail of Ground Void on M<span class="_ _1"></span>id Plane Bottom Side </span></span></div><div class="t m0 x15 hf y4e ff4 fs8 fc0 sc0 ls0 ws0">Mother Board </div><div class="t m0 x13 hf y4f ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.4. RF Connector Related Test Setups </span></span></div><div class="t m0 x13 hf y50 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.4.2, Contact Resistance Measurement Setup & Test </span></span></div><div class="t m0 x15 hf y51 ff4 fs8 fc0 sc0 ls0 ws0">Procedure Example </div><div class="t m0 x13 hf y52 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 111. <span class="_"> </span>Contact Resistance M<span class="_ _1"></span>easurement <span class="_ _0"></span>Definitions </span></span></div><div class="t m0 x13 hf y53 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 112. <span class="_"> </span>Prepared <span class="_ _1"></span>W<span class="_ _0"></span>ires </span></span></div><div class="t m0 x13 hf y54 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Figure 113. <span class="_"> </span>Prepared <span class="_ _1"></span>W<span class="_ _0"></span>ire w<span class="_ _1"></span>ith Plu<span class="_ _0"></span>g </span></span></div><div class="t m0 x13 hf y55 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Table 50. <span class="_ _9"> </span>Example of Prepared <span class="_ _1"></span>W<span class="_ _0"></span>ire with Plug, Un<span class="ff8">it:mΩ</span> </span></span></div><div class="t m0 x13 hf y56 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _6"> </span><span class="fc0">Table 51. <span class="_ _9"> </span>Contact Resistance for the Sample <span class="_ _1"></span>W<span class="_ _0"></span>ires/Plugs, </span></span></div><div class="t m0 x15 hf y57 ff8 fs8 fc0 sc0 ls0 ws0">Unit:mΩ<span class="ff4"> </span></div><div class="t m0 x13 hf y58 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.6, Examples of FULL_CARD_PO<span class="_ _1"></span>W<span class="_ _0"></span>ER_OFF# Sequences </span></span></div><div class="t m0 x15 hf y59 ff4 fs8 fc0 sc0 ls0 ws0">(Informative) </div><div class="t m0 x13 hf y5a ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.6.1, Example of Power On/Off Sequence </span></span></div><div class="t m0 x13 hf y5b ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.6.2, Example of Tablet Power On/Off Sequence </span></span></div></div><div class="c x14 y2d w7 h12"><div class="t m0 x13 h14 y5c ff9 fs7 fc0 sc0 ls0 ws0">July <span class="lsa">31</span>, 2013 </div></div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250093374bc5c010559b313/bg4.jpg"><div class="t m0 xd he y25 ff5 fs7 fc0 sc0 ls0 ws0">PCI Express M<span class="_ _0"></span>.2 Specification<span class="ff4"> </span></div><div class="t m0 x9 hf y26 ff4 fs8 fc0 sc0 ls0 ws0"> </div><div class="t m0 x9 he y27 ff5 fs8 fc0 sc0 ls0 ws0">PCI Express M.2 Specification<span class="ff4"> <span class="_ _5"> </span></span><span class="fs7 fc2 ls7">| </span><span class="ff4"> 4 </span></div><div class="t m0 x9 hf y28 ff4 fs8 fc0 sc0 ls0 ws0">Revision 0.9, July 31, 2013 </div><div class="c x12 y5d w6 h15"><div class="t m0 x13 hf y5e ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">6.6.3, Example of Very-thin Notebooks Power On/Off Sequence </span></span></div><div class="t m0 x13 hf y5f ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _8"> </span><span class="fc0">Appendix A. <span class="_ _a"> </span>Acknowledgments </span></span></div><div class="t m0 x13 h13 y60 ff5 fs8 fc0 sc0 ls0 ws0">Specific Changes </div><div class="t m0 x13 hf y61 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">ECR numbers referenced below refer to the Tracker Table it<span class="_ _1"></span>em number<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf y62 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Implementation of all known and approved ECRs and Revie<span class="_ _1"></span>w Feedback<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf y63 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Updated references to HSIC, USB2.0, and USB3.0 per approved ECR <span class="lsb">131</span> </span></span></div><div class="t m0 x13 hf y64 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Figure 2: Removed reference to Type 3038 and update Type 22110<span class="_ _0"></span>-<span class="lsc">xx</span>-M<span class="_ _1"></span> to </span></span></div><div class="t m0 x15 hf y65 ff4 fs8 fc0 sc0 ls0 ws0">Type 22110-<span class="lsc">xx</span>-B-M </div><div class="t m0 x13 h16 y66 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Figure 3: Reworded note to <span class="ff6">Key G is intended for custo<span class="_ _0"></span>m use<span class="_ _1"></span>. Devices with </span></span></span></div><div class="t m0 x15 h16 y67 ff6 fs8 fc0 sc0 ls0 ws0">this key will not be M.2-compliant. Use at your own risk!<span class="ff4"> </span></div><div class="t m0 x13 hf y68 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Related note following Figure 3 was replaced and reworded slightly w<span class="_ _1"></span>ith </span></span></div><div class="t m0 x15 hf y69 ff4 fs8 fc0 sc0 ls0 ws0">actual text paragraph prior to the figure </div><div class="t m0 x13 hf y6a ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Table 1: Updated 1216, 2226, and 3026 Z-height options adding S1 and </span></span></div><div class="t m0 x15 hf y6b ff4 fs8 fc0 sc0 ls0 ws0">changing the word Preferred to Options per approved ECR 156 </div><div class="t m0 x13 hf y6c ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _b"> </span><span class="fc0">Figure 5: Updated the component area length dimension from 20.20 to 22.20 </span></span></div><div class="t m0 x13 hf y6d ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_"> </span><span class="fc0">Figure 7: Updated tolerance on 15.425<span class="_ _1"></span>mm dimension from <span class="ff7"></span>0.1<span class="_ _0"></span>5 to <span class="ff7"></span>0.10 </span></span></div><div class="t m0 x13 h16 y6e ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_"> </span><span class="fc0">Figure <span class="lsb">15</span>: Added <span class="ff6">0.20mm</span> chamfer dimension per approved ECR 155 </span></span></div><div class="t m0 x13 h16 y6f ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">16</span>: Added<span class="ff6"> <span class="lsb">4 </span></span></span></span></div><div class="t m2 x16 h17 y6f ff7 fs9 fc0 sc0 ls0 ws0"></div><div class="t m0 x17 h16 y6f ff6 fs8 fc0 sc0 ls0 ws0"> 0.15 for PCB.<span class="ff4"> Changed Top Side Component Zone </span></div><div class="t m0 x15 h16 y70 ff4 fs8 fc0 sc0 ls0 ws0">Limit to <span class="ff6">4 MIN Top Side Component Zone Limit<span class="_ _0"></span></span>. Updated bo<span class="_ _1"></span>ard width </div><div class="t m0 x15 h16 y71 ff4 fs8 fc0 sc0 ls0 ws0">tolerance from 19.85 <span class="ff7"></span>0.15 to<span class="ff6"> 19.85 </span></div><div class="t m2 x18 h17 y71 ff7 fs9 fc0 sc0 ls0 ws0"></div><div class="t m0 x19 h16 y71 ff6 fs8 fc0 sc0 ls0 ws0">0.10.<span class="ff4"> </span></div><div class="t m0 x13 hf y72 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_"> </span><span class="fc0">Figure <span class="lsb">18</span>, Figure <span class="lsd">19<span class="ls8">, </span></span>Figure <span class="lsd">20</span>, and Figure <span class="_ _0"></span><span class="lsd">21<span class="ls8">: </span></span>Dimensions table removed </span></span></div><div class="t m0 x15 hf y73 ff4 fs8 fc0 sc0 ls0 ws0">from figure. Per approved ECR 163, Diagrams <span class="_ _0"></span>replaced per <span class="_ _1"></span>approved ECR </div><div class="t m0 x15 hf y74 ff4 fs8 fc0 sc0 lsb ws0">169<span class="ls0"> </span></div><div class="t m0 x15 h18 y75 ff8 fs8 fc0 sc0 ls0 ws0">Add dimension “34x 0.55 Max<span class="_ _1"></span> (Gol<span class="_ _0"></span>d Pad Leading Edge)” to Top View Detail </div><div class="t m0 x15 h18 y76 ff8 fs8 fc0 sc0 ls0 ws0">and “33x 0.55 Max (Gold Pad Leading Edge)” Bottom View Detail to Figures </div><div class="t m0 x15 h18 y77 ff8 fs8 fc0 sc0 ls0 ws0">18 & 19 and “30x 0.55 Max (Gold Pad Leading Edge)” to Top View Detail </div><div class="t m0 x15 hf y78 ff4 fs8 fc0 sc0 ls0 ws0">Figures 20 & 21 </div><div class="t m0 x13 h16 y79 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">24</span>: Changed Antenna area dimension from 4 <span class="ff7"></span>0.15 to <span class="ff6">3.8mm </span></span></span></div><div class="t m2 x1a h17 y79 ff7 fs9 fc0 sc0 ls0 ws0"></div><div class="t m0 x1b h16 y79 ff6 fs8 fc0 sc0 ls0 ws0">0.15<span class="ff4"> per </span></div><div class="t m0 x15 hf y7a ff4 fs8 fc0 sc0 ls0 ws0">approved ECR 165 </div><div class="t m0 x13 h16 y7b ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table 6: Changed Cable Retention at 0<span class="ff7"></span> from 12 N Min to <span class="ff6">10 N Min</span> for 0.81 </span></span></div><div class="t m0 x15 hf y7c ff4 fs8 fc0 sc0 ls0 ws0">mm cable. per approved ECR 126 and 145 </div><div class="t m0 x13 h16 y7d ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table 7<span class="ls8">: </span>Changed Contact Resistance Initial value from 10 m<span class="ffa">Ω</span> Max to <span class="ff6">20 m<span class="ffb">Ω</span> </span></span></span></div><div class="t m0 x15 h16 y7e ff6 fs8 fc0 sc0 ls0 ws0">Max<span class="ff4">. Per approved ECR 157 </span></div><div class="t m0 x13 hf y7f ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">35</span>: Changed TBDs in Table to N/A </span></span></div><div class="t m0 x13 hf y80 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">12</span>: Changed Insertion Force to 25 N (2.04 KgF, 1 Newton = 1 Kg*m/s</span></span></div><div class="t m0 x1c h19 y81 ff4 fsa fc0 sc0 ls0 ws0">2</div><div class="t m0 x1d hf y80 ff4 fs8 fc0 sc0 ls0 ws0">) </div><div class="t m0 x15 hf y82 ff4 fs8 fc0 sc0 ls0 ws0">maximum. Per approved ECR 133 </div><div class="t m0 x13 h13 y83 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">38</span>: Updated connector tolerance from 20.15 <span class="ff7"></span><span class="lsb">0.</span>10 to 20.15 <span class="ff5"> <span class="ff7 sc1"></span>0.05</span> </span></span></div><div class="t m0 x13 h13 y84 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">49</span>: Updated connector measurement from 1.45 <span class="ff7"></span>0.10 to <span class="ff5">1.40</span><span class="ls8"> </span><span class="ff7"></span>0.10 </span></span></div><div class="t m0 x13 hf y85 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">51</span>: Updated to reflect pins 13-21 and 12-20 pad removal (per approved </span></span></div><div class="t m0 x15 hf y86 ff4 fs8 fc0 sc0 ls0 ws0">ECR 149) </div><div class="t m0 x13 h13 y87 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">52</span>: Updated connector tolerance from 20.15 <span class="ff7"></span>0.10 to 20.15 <span class="ff5"> <span class="ff7 sc1"></span>0.05 </span>and </span></span></div><div class="t m0 x15 h13 y88 ff4 fs8 fc0 sc0 ls0 ws0">changed measurement 0.72 max<span class="_ _1"></span> to<span class="_ _0"></span><span class="ff5"> 0.80 max</span> </div><div class="t m0 x13 hf y89 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">54<span class="ls8">, </span></span>Figure <span class="lsd">55<span class="ls8">, </span></span>Figure <span class="lsd">56</span>,<span class="_ _0"></span> Figure <span class="lsd">57<span class="ls8">, </span></span>Figure <span class="lsb">58<span class="lse">, </span></span>Figure <span class="lsb">59<span class="ls8">, </span></span>Figure <span class="lsb">60<span class="lse">, </span></span></span></span></div><div class="t m0 x15 h13 y8a ff4 fs8 fc0 sc0 lsb ws0">and <span class="ls0">Figure </span>61<span class="ls0">: updated measurement from 0.62 <span class="ff7"></span>0.10 to <span class="ff5">0.80 max</span> </span>and<span class="ls0"> </span></div><div class="t m0 x15 h13 y8b ff4 fs8 fc0 sc0 ls0 ws0">updated 0.60 max RSS area below module to <span class="ff5">0.68 max area below modul</span><span class="lsb">e.</span> </div><div class="t m0 x15 hf y8c ff4 fs8 fc0 sc0 ls0 ws0">(Per approved ECR 166) </div><div class="t m0 x13 hf y8d ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">62</span>: Added 8 missing pads and changed 21mm dimen<span class="_ _1"></span>sion to 21.30mm<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf y8e ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="ffc fc0"><span class="_ _d"></span><span class="ff4">2.5.5.3<span class="ls8">, </span>Option 3, Wafer-Head Style M2 Screw: Changed sentence<span class="ff8">—</span>This </span></span></span></div><div class="t m0 x15 h13 y8f ff4 fs8 fc0 sc0 ls0 ws0">screw is intended for use only with the <span class="ff5">shouldered</span> stand-off. </div><div class="t m0 x13 hf y90 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Chapter <span class="ffc"><span class="_ _d"></span><span class="ff4">3<span class="ls8">, </span>Electrical Specifications, updated per approved ECR <span class="lsb">151</span> </span></span></span></span></div><div class="t m0 x15 hf y91 ff4 fs8 fc0 sc0 ls0 ws0">- Removed 3.1.1, Supplemental NFC Signals </div><div class="t m0 x15 hf y92 ff4 fs8 fc0 sc0 ls0 ws0">- Figure <span class="lsb">85<span class="lse">, </span></span>Su<span class="_ _0"></span>pplemental NFC Signal Connect<span class="_ _1"></span>ion Example<span class="_ _0"></span>: Added </div><div class="t m0 x13 hf y93 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">15</span>: LED current definition removed from text and place<span class="_ _1"></span>d in Chapter 4<span class="_ _0"></span> </span></span></div><div class="t m0 x15 h16 y94 ffd fs8 fc0 sc0 ls0 ws0">“Th<span class="ff6">ese LED devices should be tied to +3.3V through a curren<span class="_ _1"></span>t limiting resistor. </span></div></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a 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<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250093374bc5c010559b313/bg5.jpg"><div class="t m0 xd he y25 ff5 fs7 fc0 sc0 ls0 ws0">PCI Express M<span class="_ _0"></span>.2 Specification<span class="ff4"> </span></div><div class="t m0 x9 hf y26 ff4 fs8 fc0 sc0 ls0 ws0"> </div><div class="t m0 x9 he y27 ff5 fs8 fc0 sc0 ls0 ws0">PCI Express M.2 Specification<span class="ff4"> <span class="_ _5"> </span></span><span class="fs7 fc2 ls7">| </span><span class="ff4"> 5 </span></div><div class="t m0 x9 hf y28 ff4 fs8 fc0 sc0 ls0 ws0">Revision 0.9, July 31, 2013 </div><div class="c x12 y95 w6 h1a"><div class="t m0 x15 hf y96 ffd fs8 fc0 sc0 ls0 ws0">Current should be limited to 9mA when LED is On.”<span class="ff4"> Per LED current ECR <span class="lsb">148</span>. </span></div><div class="t m0 x13 hf y97 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Added NFC UIM Supplemental pins section into Table 15 . Content split and </span></span></div><div class="t m0 x15 hf y98 ff4 fs8 fc0 sc0 ls0 ws0">added to Table 15 and paragraph 3.1.11 per ECR 151 </div><div class="t m0 x13 hf y99 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Figure <span class="lsb">86</span>: 3.3V fixed per approved ECR <span class="lsb">130</span>; Transistor type changed. </span></span></div><div class="t m0 x13 hf y9a ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="ffc fc0"><span class="_ _d"></span><span class="ff4">3.1.11.3<span class="ls8">, </span>W_DISABLE# Signal: Reworded Per approved W_Disable ECR 160. </span></span></span></div><div class="t m0 x13 hf y9b ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">24</span>: Pinout has 2nd PCIe host interface swap of PET and PER </span></span></div><div class="t m0 x13 hf y9c ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="ffc fc0"><span class="_ _d"></span><span class="ff4">3.2.10.1FULL_CARD_POWER_OFF#: Asserted high value changed from </span></span></span></div><div class="t m0 x15 h13 y9d ff8 fs8 fc0 sc0 ls0 ws0">≥1.7 V to<span class="ff5"> <span class="ffe">≥1.19. V<span class="ff4"> </span></span></span></div><div class="t m0 x13 hf y9e ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">26<span class="ls8">, </span></span>GPIO pin Function Assignment per Port Configurati<span class="_ _1"></span>on<span class="_ _0"></span> changed per </span></span></div><div class="t m0 x15 hf y9f ff4 fs8 fc0 sc0 ls0 ws0">Config 1 pinout update per approved ECR <span class="lsb">144</span> </div><div class="t m0 x15 hf ya0 ff4 fs8 fc0 sc0 ls0 ws0">- Removed GPIO12 </div><div class="t m0 x15 hf ya1 ff4 fs8 fc0 sc0 ls0 ws0">- Updated Port Config_3 values </div><div class="t m0 x15 hf ya2 ff4 fs8 fc0 sc0 ls0 ws0">- Added notes 5 and 6 </div><div class="t m0 x13 hf ya3 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">30<span class="ls8">, </span></span>Socket 2 PCIe-based WWAN Module Pinout: updated with 2nd PCIe </span></span></div><div class="t m0 x15 hf ya4 ff4 fs8 fc0 sc0 ls0 ws0">lane pins assignment per approved ECR 143. <span class="_ _0"></span>Adde<span class="_ _1"></span>d text under Table 30 </div><div class="t m0 x13 hf ya5 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">36<span class="ls8">, </span></span>DC Specification for 3.3V Logic Signaling: Added notes 3 & 4 </span></span></div><div class="t m0 x13 hf ya6 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">37<span class="ls8">, </span></span>DC Specification for 1.8V Logic Signaling: updated per approved </span></span></div><div class="t m0 x15 hf ya7 ff4 fs8 fc0 sc0 ls0 ws0">ECR <span class="lsb">153</span> </div><div class="t m0 x13 hf ya8 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">41<span class="ls8">, </span></span>Power Rating Table for the Various Modules and Connector Key<span class="_ _1"></span>s<span class="_ _0"></span><span class="ls8">: </span></span></span></div><div class="t m0 x15 hf ya9 ff4 fs8 fc0 sc0 ls0 ws0">Unified Table columns per approved ECR <span class="lsb">168</span> </div><div class="t m0 x13 hf yaa ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Table <span class="lsb">46<span class="ls8">, </span></span>Socket 2 Module Configuration Table<span class="lse">: <span class="_ _0"></span></span>Note 1 changed to address </span></span></div><div class="t m0 x15 hf yab ff4 fs8 fc0 sc0 ls0 ws0">SIG-<span class="_ _1"></span>W<span class="_ _0"></span>ide review feedback </div><div class="t m0 x13 hf yac ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Chapter 6, Annex: updated per approved ECRs 132 and 139 </span></span></div><div class="t m0 x15 hf yad ff4 fs8 fc0 sc0 ls0 ws0">- <span class="ffc"><span class="_ _d"></span><span class="ff4">6.3<span class="ls8">, </span>Signal Integrity Guideline<span class="ls8">: <span class="lsf">Re</span></span>written and added information </span></span></div><div class="t m0 x15 hf yae ff4 fs8 fc0 sc0 ls0 ws0">- <span class="ffc"><span class="_ _d"></span><span class="ff4">6.5<span class="ls8">, </span>Thermal Guideline Annex: Section reorganized and information added </span></span></div><div class="t m0 x13 hf yaf ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="ff8 fc0">Change “PCH” to “platform chipset”<span class="ff4"> </span></span></span></div><div class="t m0 x13 hf yb0 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Chapter 3.<span class="lsb">1.</span>6, update maximum clock frequency to <span class="lsb">208</span>MHz and data rate </span></span></div><div class="t m0 x15 hf yb1 ff4 fs8 fc0 sc0 lsb ws0">208<span class="ls0">Mb/s to align with SDIO3.0 </span></div><div class="t m0 x13 hf yb2 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _c"> </span><span class="fc0">Add Implementation Note in Chapter 6.3 with rega<span class="_ _0"></span>rd to Conn<span class="_ _1"></span>ector performance<span class="fc1 sc0"> </span></span></span></div><div class="t m0 x15 hf yb3 ff4 fs8 fc0 sc0 ls0 ws0">applies only to connectors defined in the spec </div></div><div class="c x9 yb4 w4 h1b"><div class="t m0 x13 hf yb5 ff4 fs8 fc3 sc0 ls0 ws0">0.7A<span class="ff9 fs7"> </span></div></div><div class="c x10 yb4 w5 h1b"><div class="t m0 x13 h14 yb6 ff9 fs7 fc3 sc0 ls0 ws0"> </div></div><div class="c x12 yb4 w6 h1b"><div class="t m0 x13 hf yb7 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Enabled bookmarks by using new template </span></span></div><div class="t m0 x13 h1c yb8 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="ff8 fc3">Added missing “#” in <span class="ff4 fs7">T<span class="_ _0"></span>able <span class="ls10">22<span class="_ _1"></span><span class="fs8 ls0"> <span class="lsb">and </span><span class="fs7">Table <span class="fc0 ls11">45</span></span> on signa<span class="_ _0"></span>ls SD<span class="_ _1"></span>IO_Reset, </span></span></span></span></span></div><div class="t m0 x1e hf yb9 ff4 fs8 fc3 sc0 ls0 ws0">SDIO_<span class="_ _1"></span>W<span class="_ _0"></span>ake and UART_Wake. </div><div class="t m0 x13 hf yba ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Changed max insertion force requirement from 20N to 25N in Section <span class="_ _0"></span><span class="ffc"><span class="_ _d"></span><span class="ff4">2.4.3<span class="ls8">. </span></span></span></span></span></div><div class="t m0 x1e h1c ybb ff4 fs7 fc3 sc0 ls0 ws0">Table <span class="ls11">12</span><span class="fs8">. </span></div><div class="t m0 x13 h1c ybc ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Changed 3V3A reference in <span class="fs7">Figure <span class="ls10">86</span></span> to 3.3V </span></span></div><div class="t m0 x13 h1c ybd ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Removed W<span class="_ _0"></span>AKE<span class="_ _1"></span># row from <span class="fs7">Table <span class="ls11">25</span></span>(Sock<span class="_ _0"></span>et 2). </span></span></div><div class="t m0 x13 hf ybe ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Renamed UIM_PO<span class="_ _1"></span>W<span class="_ _0"></span>ER_IN to UIM_PO<span class="_ _1"></span>W<span class="_ _0"></span>ER_SRC and UIM_PO<span class="_ _1"></span>W<span class="_ _0"></span>ER_OUT </span></span></div><div class="t m0 x1e hf ybf ff4 fs8 fc3 sc0 ls0 ws0">to UIM_PO<span class="_ _1"></span>W<span class="_ _0"></span>ER_SNK in <span class="ffc"><span class="_ _d"></span><span class="ff4">3.1.9 </span></span></div><div class="t m0 x13 hf yc0 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="ff8 fc3">Changed cell from “20 N min” to “20 N min (Ø1.13mm wire), 12N min </span></span></div><div class="t m0 x1e h1c yc1 ff8 fs8 fc3 sc0 ls0 ws0">(Ø0.81mm wire)” Section <span class="ffc"><span class="_ _d"></span><span class="ff4">2.3.7<span class="ls8">, </span><span class="fs7">Table 6</span>: </span></span></div><div class="t m0 x13 hf yc2 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Incorporated W<span class="_ _0"></span>G<span class="_ _1"></span> approved changes outlined in ENG-E12<span class="_ _0"></span>-13<span class="_ _1"></span>5_JAE </span></span></div><div class="t m0 x13 h16 yc3 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="_ _0"></span><span class="fc3">Added text to <span class="ffc"><span class="_ _d"></span><span class="ff4">2.4.6<span class="lse">: <span class="_ _0"></span></span><span class="ff6">Notwithstanding the aforementioned, the actual </span></span></span></span></span></div><div class="t m0 x1e h16 yc4 ff6 fs8 fc3 sc0 ls0 ws0">mechanical relationship between connector and module within a system is </div><div class="t m0 x1e h16 yc5 ff6 fs8 fc3 sc0 ls0 ws0">controlled by the platform<span class="ff4"> </span>implementer. Therefore platform implementers </div><div class="t m0 x1e h16 yc6 ff6 fs8 fc3 sc0 ls0 ws0">should<span class="ff4"> </span>pay attention to all elements of positioning connector and module to </div><div class="t m0 x1e h16 yc7 ff6 fs8 fc3 sc0 ls0 ws0">assure a proper mated condition.<span class="ff4"> </span></div><div class="t m0 x13 hf yc8 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="fc3">Replaced figures with Rev E draw<span class="_ _1"></span>ing<span class="_ _0"></span> </span></span></div><div class="t m0 x13 hf yc9 ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="fc3">Added from Rev E draw<span class="_ _1"></span>ings<span class="_ _0"></span> </span></span></div><div class="t m0 x1e h16 yca ff4 fs7 fc3 sc0 ls0 ws0">Figure <span class="ls11">23<span class="fs8 ls8">, </span></span>Figure <span class="ls10">25<span class="fs8 ls8">, </span></span>Figure <span class="ls11">28</span><span class="fs8"> <span class="ff8">–</span> <span class="ff6">Rec<span class="_ _0"></span>ommended Land Pattern</span> </span></div><div class="t m0 x13 hf ycb ff7 fs8 fc2 sc0 ls0 ws0"><span class="ff4"> <span class="fc3">Fix<span class="_ _1"></span>ed 3.2.1<span class="_ _0"></span>1.1.2 list and added 3.2.11.1.3<span class="ff9 fs7"> </span></span></span></div></div><div class="c x14 yb4 w7 h1b"><div class="t m0 x13 hf yb5 ff4 fs8 fc3 sc0 ls0 ws0">January 2, 2013<span class="ff9 fs7"> </span></div></div><div class="c x9 ycc w4 h1d"><div class="t m0 x13 hf ycd ff4 fs8 fc3 sc0 lsb ws0">0.<span class="ls0">7 </span></div></div><div class="c x10 ycc w5 h1d"><div class="t m0 x13 hf ycd ff4 fs8 fc3 sc0 ls0 ws0">1.0 </div></div><div class="c x12 ycc w6 h1d"><div class="t m0 x13 hf ycd ff4 fs8 fc3 sc0 ls0 ws0">The spec is structurally and content complete with a limited number of known </div><div class="t m0 x13 hf yce ff4 fs8 fc3 sc0 ls0 ws0">TBD parameters/items. </div><div class="t m0 x13 hf ycf ff4 fs8 fc3 sc0 ls0 ws0">Text edit and new template. </div></div><div class="c x14 ycc w7 h1d"><div class="t m0 x13 hf ycd ff4 fs8 fc3 sc0 ls0 ws0">November 17, 2012 </div></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d 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