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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625ec38f8cbeb85d572638d5/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">1.<span class="_ _0"> </span>General description</div><div class="t m0 x2 h3 y2 ff2 fs1 fc1 sc0 ls0 ws0">The LM75A is a temperature-to-digital con<span class="_ _1"></span>verter using an on-chip band<span class="_"> </span>gap temperature</div><div class="t m0 x2 h3 y3 ff2 fs1 fc1 sc0 ls0 ws0">sensor and Sigma-delta A-to-D conv<span class="_ _1"></span>ersion technique<span class="_ _1"></span>. The de<span class="_ _1"></span>vice is also a thermal</div><div class="t m0 x2 h3 y4 ff2 fs1 fc1 sc0 ls0 ws0">detector<span class="_ _2"> </span>providing<span class="_ _2"> </span>an<span class="_ _2"> </span>o<span class="_ _1"></span>v<span class="_ _1"></span>er<span class="_ _3"></span>temperature<span class="_ _2"> </span>detection<span class="_ _2"> </span>output.<span class="_ _2"> </span>The<span class="_ _2"> </span>LM75A<span class="_ _2"> </span>contains<span class="_ _2"> </span>a<span class="_ _2"> </span>number<span class="_ _2"> </span>of</div><div class="t m0 x2 h3 y5 ff2 fs1 fc1 sc0 ls0 ws0">data registers: Configuration register (Conf) to store the de<span class="_ _1"></span>vice settings such as de<span class="_ _1"></span>vice</div><div class="t m0 x2 h3 y6 ff2 fs1 fc1 sc0 ls0 ws0">operation mode<span class="_ _1"></span>, OS operation mode, OS polarity and OS f<span class="_ _1"></span>ault queue as described in</div><div class="t m0 x2 h3 y7 ff2 fs1 fc2 sc0 ls0 ws0">Section 7 “Functional description”<span class="fc1">; temperature register (T<span class="_ _4"></span>emp) to store the digital temp</span></div><div class="t m0 x2 h3 y8 ff2 fs1 fc1 sc0 ls0 ws0">reading, and set-point registers (T<span class="_ _4"></span>os and Th<span class="_ _1"></span>yst) to store programmab<span class="_ _1"></span>le o<span class="_ _1"></span>v<span class="_ _1"></span>er<span class="_ _3"></span>temperature</div><div class="t m0 x2 h3 y9 ff2 fs1 fc1 sc0 ls0 ws0">shutdown and h<span class="_ _1"></span>ysteresis limits<span class="_ _1"></span>, that can be communicated b<span class="_ _1"></span>y a controller via the 2-wire</div><div class="t m0 x2 h3 ya ff2 fs1 fc1 sc0 ls0 ws0">serial I</div><div class="t m0 x3 h4 yb ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x4 h3 ya ff2 fs1 fc1 sc0 ls0 ws0">C-bus interf<span class="_ _1"></span>ace<span class="_ _1"></span>. The de<span class="_ _1"></span>vice also includes an open-drain output (OS) which</div><div class="t m0 x2 h3 yc ff2 fs1 fc1 sc0 ls0 ws0">becomes activ<span class="_ _1"></span>e when the temperature e<span class="_ _1"></span>xceeds the progr<span class="_ _1"></span>ammed limits. There are three</div><div class="t m0 x2 h3 yd ff2 fs1 fc1 sc0 ls0 ws0">selectable logic address pins so that eight de<span class="_ _1"></span>vices can be connected on the same b<span class="_ _1"></span>us</div><div class="t m0 x2 h3 ye ff2 fs1 fc1 sc0 ls0 ws0">without address conflict.</div><div class="t m0 x2 h3 yf ff2 fs1 fc1 sc0 ls0 ws0">The LM75A can be configured f<span class="_ _1"></span>or diff<span class="_ _1"></span>erent operation conditions<span class="_ _1"></span>. It can be set in nor<span class="_ _3"></span>mal</div><div class="t m0 x2 h3 y10 ff2 fs1 fc1 sc0 ls0 ws0">mode to periodically monitor the ambient temperature, or in shutdown mode to minimiz<span class="_ _1"></span>e</div><div class="t m0 x2 h3 y11 ff2 fs1 fc1 sc0 ls0 ws0">power consumption. The OS output oper<span class="_ _1"></span>ates in either of two selectab<span class="_ _1"></span>le modes:</div><div class="t m0 x2 h3 y12 ff2 fs1 fc1 sc0 ls0 ws0">OS<span class="_"> </span>comparator mode or OS interrupt mode. Its activ<span class="_ _1"></span>e state can be selected as either</div><div class="t m0 x2 h3 y13 ff2 fs1 fc1 sc0 ls0 ws0">HIGH or LO<span class="_ _1"></span>W<span class="_ _5"></span>. The f<span class="_ _1"></span>ault queue that defines the number of consecutiv<span class="_ _1"></span>e f<span class="_ _1"></span>aults in order to</div><div class="t m0 x2 h3 y14 ff2 fs1 fc1 sc0 ls0 ws0">activate the OS output is prog<span class="_ _1"></span>rammab<span class="_ _1"></span>le as well as the set-point limits<span class="_ _1"></span>.</div><div class="t m0 x2 h3 y15 ff2 fs1 fc1 sc0 ls0 ws0">The temperature register alwa<span class="_ _6"></span>ys stores an 11-bit 2's complement data giving a</div><div class="t m0 x2 h5 y16 ff2 fs1 fc1 sc0 ls0 ws0">temperature<span class="_"> </span>resolution<span class="_"> </span>of<span class="_"> </span>0.125<span class="_"> </span><span class="ff3">°</span>C<span class="_ _6"></span>.<span class="_"> </span>This<span class="_"> </span>high<span class="_"> </span>temperature<span class="_"> </span>resolution<span class="_"> </span>is<span class="_"> </span>particular<span class="_ _3"></span>ly<span class="_"> </span>useful</div><div class="t m0 x2 h3 y17 ff2 fs1 fc1 sc0 ls0 ws0">in applications of measuring precisely the ther<span class="_ _3"></span>mal drift or r<span class="_ _3"></span>una<span class="_ _6"></span>way<span class="_ _4"></span>.</div><div class="t m0 x2 h3 y18 ff2 fs1 fc1 sc0 ls0 ws0">The de<span class="_ _6"></span>vice is powered-up in normal operation mode with the OS in comparator mode,</div><div class="t m0 x2 h5 y19 ff2 fs1 fc1 sc0 ls0 ws0">temperature threshold of 80<span class="_"> </span><span class="ff3">°</span>C and h<span class="_ _6"></span>ysteresis of 75<span class="_"> </span><span class="ff3">°</span>C, so that it can be used as a</div><div class="t m0 x2 h3 y1a ff2 fs1 fc1 sc0 ls0 ws0">stand-alone ther<span class="_ _3"></span>mostat with those pre-defined temper<span class="_ _1"></span>ature set points.</div><div class="t m0 x1 h2 y1b ff1 fs0 fc0 sc0 ls0 ws0">2.<span class="_ _0"> </span>Features</div><div class="t m0 x2 h3 y1c ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Pin-f<span class="_ _1"></span>or-pin replacement f<span class="_ _6"></span>or industr<span class="_ _3"></span>y standard LM75 and offers impro<span class="_ _6"></span>ved temperature</span></div><div class="t m0 x5 h5 y1d ff2 fs1 fc1 sc0 ls0 ws0">resolution of 0.125<span class="_"> </span><span class="ff3">°</span>C and specification of a single par<span class="_ _3"></span>t ov<span class="_ _6"></span>er power supply range from</div><div class="t m0 x5 h3 y1e ff2 fs1 fc1 sc0 ls0 ws0">2.8<span class="_"> </span>V to 5.5<span class="_"> </span>V</div><div class="t m0 x2 h3 y1f ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Small 8-pin package types: SO8 and TSSOP8</span></div><div class="t m0 x2 h3 y20 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">I</span></div><div class="t m0 x6 h4 y21 ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x7 h3 y20 ff2 fs1 fc1 sc0 ls0 ws0">C-bus interf<span class="_ _6"></span>ace with up to 8 de<span class="_ _1"></span>vices on the same bus</div><div class="t m0 x2 h3 y22 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">P<span class="_ _6"></span>ower supply r<span class="_ _6"></span>ange from 2.8<span class="_"> </span>V to 5.5<span class="_"> </span>V</span></div><div class="t m0 x2 h5 y23 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">T<span class="_ _4"></span>emperatures range from<span class="_"> </span><span class="ff3">−</span>55<span class="_"> </span><span class="ff3">°</span>C to +125<span class="_"> </span><span class="ff3">°<span class="_ _1"></span><span class="ff2">C</span></span></span></div><div class="t m0 x2 h5 y24 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">11-bit ADC that off<span class="_ _1"></span>ers a temperature resolution of 0.125<span class="_"> </span><span class="ff3">°</span>C</span></div><div class="t m0 x8 h6 y25 ff1 fs3 fc0 sc0 ls0 ws0">LM75A</div><div class="t m0 x8 h7 y26 ff1 fs4 fc0 sc0 ls0 ws0">Digital temperature sensor and thermal watchdog</div><div class="t m0 x8 h8 y27 ff1 fs5 fc0 sc0 ls0 ws0">Rev<span class="_ _4"></span>. 04 — 10 Jul<span class="_ _1"></span>y 2007<span class="_ _8"> </span>Product data sheet</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625ec38f8cbeb85d572638d5/bg2.jpg"><div class="t m0 x1 h9 y28 ff2 fs6 fc1 sc0 ls0 ws0">LM75A_4<span class="_ _9"> </span>© NXP B.V<span class="_ _5"></span>. 2007. All rights reser<span class="_ _3"></span>v<span class="_ _1"></span>ed.</div><div class="t m0 x1 ha y29 ff1 fs7 fc0 sc0 ls0 ws0">Product data sheet<span class="_ _a"> </span>Rev<span class="_ _5"></span>. 04 — 10 July 2007<span class="_ _b"> </span>2 of 24</div><div class="t m0 x1 hb y2a ff1 fs8 fc0 sc0 ls0 ws0">NXP Semiconductors</div><div class="t m0 x9 hc y2b ff1 fs9 fc0 sc0 ls0 ws0">LM75A</div><div class="t m0 xa hd y2c ff1 fs1 fc0 sc0 ls0 ws0">Digital temperature sensor and thermal watchdog</div><div class="t m0 x2 h3 y2d ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">T<span class="_ _4"></span>emperature accuracy of:</span></div><div class="t m0 xb h5 y2e ff4 fs1 fc0 sc0 ls0 ws0">u<span class="_ _c"> </span><span class="ff3 fc1">±<span class="ff2">2<span class="_"> </span></span>°<span class="ff2">C from<span class="_"> </span></span>−<span class="ff2">25<span class="_"> </span></span>°<span class="ff2">C to +100<span class="_"> </span></span>°<span class="ff2">C</span></span></div><div class="t m0 xb h5 y2f ff4 fs1 fc0 sc0 ls0 ws0">u<span class="_ _c"> </span><span class="ff3 fc1">±<span class="ff2">3<span class="_"> </span></span>°<span class="ff2">C from<span class="_"> </span></span>−<span class="ff2">55<span class="_"> </span></span>°<span class="ff2">C to +125<span class="_"> </span></span>°<span class="ff2">C</span></span></div><div class="t m0 x2 h3 y30 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Programmab<span class="_ _6"></span>le temperature threshold and hysteresis set points</span></div><div class="t m0 x2 h5 y31 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Supply current of 3.5<span class="_"> </span><span class="ff3">µ</span>A in shutdown mode f<span class="_ _6"></span>or power conservation</span></div><div class="t m0 x2 h3 y32 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Stand-alone operation as thermostat at power-up</span></div><div class="t m0 x2 h3 y33 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">ESD protection e<span class="_ _6"></span>xceeds 2000<span class="_"> </span>V HBM per JESD22-A114, 200<span class="_ _d"> </span>V MM per</span></div><div class="t m0 x5 h3 y34 ff2 fs1 fc1 sc0 ls0 ws0">JESD22-A115 and 1000<span class="_"> </span>V CDM per JESD22-C101</div><div class="t m0 x2 h3 y35 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Latch-up testing is done to JEDEC Standard JESD78 which e<span class="_ _1"></span>xceeds 100<span class="_"> </span>mA</span></div><div class="t m0 x1 h2 y36 ff1 fs0 fc0 sc0 ls0 ws0">3.<span class="_ _0"> </span>Applications</div><div class="t m0 x2 h3 y37 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">System ther<span class="_ _3"></span>mal management</span></div><div class="t m0 x2 h3 y38 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">P<span class="_ _6"></span>ersonal computers</span></div><div class="t m0 x2 h3 y39 ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Electronics equipment</span></div><div class="t m0 x2 h3 y3a ff4 fs1 fc0 sc0 ls0 ws0">n<span class="_ _7"> </span><span class="ff2 fc1">Industrial controllers</span></div><div class="t m0 x1 h2 y3b ff1 fs0 fc0 sc0 ls0 ws0">4.<span class="_ _0"> </span>Or<span class="_ _1"></span>dering inf<span class="_ _1"></span>ormation</div><div class="t m0 xc hb y3c ff1 fs8 fc0 sc0 ls0 ws0">4.1<span class="_ _e"> </span>Ordering options</div><div class="t m0 x2 he y3d ff1 fsa fc0 sc0 ls0 ws0">T<span class="_ _5"></span>able 1.<span class="_ _f"> </span>Ordering inf<span class="_ _6"></span>ormation</div><div class="t m0 xd he y3e ff1 fsa fc1 sc0 ls0 ws0">T<span class="_ _6"></span>ype number<span class="_ _10"> </span><span class="ls1">Pa<span class="_ _3"></span>cka<span class="_ _3"></span>g<span class="_ _3"></span>e</span></div><div class="t m0 xe he y3f ff1 fsa fc1 sc0 ls0 ws0">Name<span class="_ _11"> </span>Description<span class="_ _12"> </span>V<span class="_ _6"></span>ersion</div><div class="t m0 xd hf y40 ff2 fsa fc1 sc0 ls0 ws0">LM75AD<span class="_ _13"> </span>SO8<span class="_ _14"> </span>plastic small outline package; 8 leads;</div><div class="t m0 xf hf y41 ff2 fsa fc1 sc0 ls0 ws0">body<span class="_"> </span>width<span class="_"> </span>3.9<span class="_"> </span>mm</div><div class="t m0 x10 hf y40 ff2 fsa fc1 sc0 ls0 ws0">SO<span class="_ _6"></span>T96-1</div><div class="t m0 xd hf y42 ff2 fsa fc1 sc0 ls0 ws0">LM75ADP<span class="_ _15"> </span>TSSOP8<span class="_ _16"> </span>plastic thin shrink small outline package; 8 leads;</div><div class="t m0 xf hf y43 ff2 fsa fc1 sc0 ls0 ws0">body<span class="_"> </span>width<span class="_"> </span>3<span class="_"> </span>mm</div><div class="t m0 x10 hf y42 ff2 fsa fc1 sc0 ls0 ws0">SO<span class="_ _6"></span>T505-1</div><div class="t m0 x2 he y44 ff1 fsa fc0 sc0 ls0 ws0">T<span class="_ _5"></span>able 2.<span class="_ _f"> </span>Ordering options</div><div class="t m0 xd he y45 ff1 fsa fc1 sc0 ls0 ws0">T<span class="_ _6"></span>ype number<span class="_ _17"> </span>T<span class="_ _5"></span>opside mark<span class="_ _11"> </span>T<span class="_ _5"></span>emperature rang<span class="_ _3"></span>e</div><div class="t m0 xd hf y46 ff2 fsa fc1 sc0 ls0 ws0">LM75AD<span class="_ _18"> </span>LM75A<span class="_ _19"> </span>T</div><div class="t m0 x11 h10 y47 ff2 fsb fc1 sc0 ls0 ws0">amb</div><div class="t m0 x12 h11 y48 ff2 fsa fc1 sc0 ls0 ws0"> =<span class="_"> </span><span class="ff3">−</span>55<span class="_"> </span><span class="ff3">°</span>C to +125<span class="_"> </span><span class="ff3">°</span>C</div><div class="t m0 xd hf y49 ff2 fsa fc1 sc0 ls0 ws0">LM75ADP<span class="_ _1a"> </span>L75A<span class="_ _1b"> </span>T</div><div class="t m0 x11 h10 y4a ff2 fsb fc1 sc0 ls0 ws0">amb</div><div class="t m0 x12 h11 y4b ff2 fsa fc1 sc0 ls0 ws0"> =<span class="_"> </span><span class="ff3">−</span>55<span class="_"> </span><span class="ff3">°</span>C to +125<span class="_"> </span><span class="ff3">°</span>C</div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625ec38f8cbeb85d572638d5/bg3.jpg"><div class="t m0 x1 h9 y28 ff2 fs6 fc1 sc0 ls0 ws0">LM75A_4<span class="_ _9"> </span>© NXP B.V<span class="_ _5"></span>. 2007. All rights reser<span class="_ _3"></span>v<span class="_ _1"></span>ed.</div><div class="t m0 x1 ha y29 ff1 fs7 fc0 sc0 ls0 ws0">Product data sheet<span class="_ _a"> </span>Rev<span class="_ _5"></span>. 04 — 10 July 2007<span class="_ _b"> </span>3 of 24</div><div class="t m0 x1 hb y2a ff1 fs8 fc0 sc0 ls0 ws0">NXP Semiconductors</div><div class="t m0 x9 hc y2b ff1 fs9 fc0 sc0 ls0 ws0">LM75A</div><div class="t m0 xa hd y2c ff1 fs1 fc0 sc0 ls0 ws0">Digital temperature sensor and thermal watchdog</div><div class="t m0 x1 h2 y4c ff1 fs0 fc0 sc0 ls0 ws0">5.<span class="_ _0"> </span>Bloc<span class="_ _1"></span>k diagram</div><div class="t m0 x1 h2 y4d ff1 fs0 fc0 sc0 ls0 ws0">6.<span class="_ _0"> </span>Pinning inf<span class="_ _1"></span>ormation</div><div class="t m0 xc hb y4e ff1 fs8 fc0 sc0 ls0 ws0">6.1<span class="_ _e"> </span>Pinning</div><div class="t m0 xc hb y4f ff1 fs8 fc0 sc0 ls0 ws0">6.2<span class="_ _e"> </span>Pin description</div><div class="t m0 x13 he y50 ff1 fsa fc0 sc0 ls0 ws0">Fig 1.<span class="_ _1c"> </span>Block dia<span class="_ _1"></span>gram</div><div class="t m0 x14 ha y51 ff5 fs7 fc1 sc0 ls0 ws0">LM75A</div><div class="t m0 x15 h12 y52 ff6 fsc fc1 sc0 ls0 ws0">SDA</div><div class="t m0 x16 h12 y53 ff6 fsc fc1 sc0 ls0 ws0">V</div><div class="t m0 x17 h13 y54 ff6 fsd fc1 sc0 ls0 ws0">CC</div><div class="t m0 x18 h12 y52 ff6 fsc fc1 sc0 ls0 ws0">SCL<span class="_ _1d"></span>A0</div><div class="t m0 x19 h12 y55 ff6 fsc fc1 sc0 ls0 ws0">OS</div><div class="t m0 x1a h12 y52 ff6 fsc fc1 sc0 ls0 ws0">A1<span class="_ _1e"> </span>GND<span class="_ _1f"></span>A2</div><div class="t m2 x1b h14 y56 ff6 fse fc1 sc0 ls0 ws0">002aad029</div><div class="t m0 x1c h12 y57 ff6 fsc fc1 sc0 ls0 ws0">BIAS</div><div class="t m0 x1d h12 y58 ff6 fsc fc1 sc0 ls0 ws0">REFERENCE</div><div class="t m0 x1e h12 y59 ff6 fsc fc1 sc0 ls0 ws0">BAND GAP</div><div class="t m0 x1f h12 y5a ff6 fsc fc1 sc0 ls0 ws0">TEMP SENSOR</div><div class="t m0 x1d h12 y5b ff6 fsc fc1 sc0 ls0 ws0">OSCILLATOR</div><div class="t m0 x20 h12 y5c ff6 fsc fc1 sc0 ls0 ws0">POWER-ON</div><div class="t m0 x21 h12 y5d ff6 fsc fc1 sc0 ls0 ws0">RESET</div><div class="t m0 x22 h12 y5e ff6 fsc fc1 sc0 ls0 ws0">11-BIT</div><div class="t m0 x23 h12 y5f ff6 fsc fc1 sc0 ls0 ws0">SIGMA-DELTA</div><div class="t m0 x22 h12 y60 ff6 fsc fc1 sc0 ls0 ws0">A-to-D</div><div class="t m0 x24 h12 y61 ff6 fsc fc1 sc0 ls0 ws0">CONVERTER</div><div class="t m0 x25 h12 y57 ff6 fsc fc1 sc0 ls0 ws0">POINTER</div><div class="t m0 x26 h12 y58 ff6 fsc fc1 sc0 ls0 ws0">REGISTER</div><div class="t m0 x27 h12 y62 ff6 fsc fc1 sc0 ls0 ws0">TIMER</div><div class="t m0 x28 h12 y63 ff6 fsc fc1 sc0 ls0 ws0">COMPARATOR/</div><div class="t m0 x29 h12 y64 ff6 fsc fc1 sc0 ls0 ws0">INTERRUPT</div><div class="t m0 x26 h12 y65 ff6 fsc fc1 sc0 ls0 ws0">COUNTER</div><div class="t m0 x2a h12 y66 ff6 fsc fc1 sc0 ls0 ws0">LOGIC CONTROL AND INTERFACE</div><div class="t m0 x2b h12 y57 ff6 fsc fc1 sc0 ls0 ws0">CONFIGURATION</div><div class="t m0 x2c h12 y58 ff6 fsc fc1 sc0 ls0 ws0">REGISTER</div><div class="t m0 x2d h12 y67 ff6 fsc fc1 sc0 ls0 ws0">THYST</div><div class="t m0 x2c h12 y68 ff6 fsc fc1 sc0 ls0 ws0">REGISTER</div><div class="t m0 x2e h12 y69 ff6 fsc fc1 sc0 ls0 ws0">TOS</div><div class="t m0 x2c h12 y6a ff6 fsc fc1 sc0 ls0 ws0">REGISTER</div><div class="t m0 x2f h12 y6b ff6 fsc fc1 sc0 ls0 ws0">TEMPERATURE</div><div class="t m0 x2c h12 y6c ff6 fsc fc1 sc0 ls0 ws0">REGISTER</div><div class="t m0 x13 he y6d ff1 fsa fc0 sc0 ls0 ws0">Fig 2.<span class="_ _1c"> </span>Pin configuration for SO8<span class="_ _20"> </span>Fig 3.<span class="_ _1c"> </span>Pin configuration for TSSOP8</div><div class="t m0 x30 ha y6e ff5 fs7 fc1 sc0 ls0 ws0">LM75AD</div><div class="t m0 x1f h12 y6f ff6 fsc fc1 sc0 ls0 ws0">SDA<span class="_ _21"> </span>V</div><div class="t m0 x31 h13 y70 ff6 fsd fc1 sc0 ls0 ws0">CC</div><div class="t m0 x32 h12 y71 ff6 fsc fc1 sc0 ls0 ws0">SCL<span class="_ _21"> </span>A0</div><div class="t m0 x1d h12 y72 ff6 fsc fc1 sc0 ls0 ws0">OS<span class="_ _21"> </span>A1</div><div class="t m0 x33 h12 y73 ff6 fsc fc1 sc0 ls0 ws0">GND<span class="_ _21"> </span>A2</div><div class="t m2 x34 h14 y74 ff6 fse fc1 sc0 ls0 ws0">002aad027</div><div class="t m0 x35 h12 y75 ff6 fsc fc1 sc0 ls0 ws0">1</div><div class="t m0 x35 h12 y76 ff6 fsc fc1 sc0 ls0 ws0">2</div><div class="t m0 x35 h12 y77 ff6 fsc fc1 sc0 ls0 ws0">3</div><div class="t m0 x35 h12 y78 ff6 fsc fc1 sc0 ls0 ws0">4</div><div class="t m0 x36 h12 y77 ff6 fsc fc1 sc0 ls0 ws0">6</div><div class="t m0 x36 h12 y79 ff6 fsc fc1 sc0 ls0 ws0">5</div><div class="t m0 x36 h12 y7a ff6 fsc fc1 sc0 ls0 ws0">8</div><div class="t m0 x36 h12 y7b ff6 fsc fc1 sc0 ls0 ws0">7</div><div class="t m0 x37 ha y7c ff5 fs7 fc1 sc0 ls0 ws0">LM75ADP</div><div class="t m0 x38 h12 y7d ff6 fsc fc1 sc0 ls0 ws0">SDA<span class="_ _22"> </span>V</div><div class="t m0 x39 h13 y7e ff6 fsd fc1 sc0 ls0 ws0">CC</div><div class="t m0 x3a h12 y7f ff6 fsc fc1 sc0 ls0 ws0">SCL<span class="_ _22"> </span>A0</div><div class="t m0 x3b h12 y80 ff6 fsc fc1 sc0 ls0 ws0">OS<span class="_ _22"> </span>A1</div><div class="t m0 x3c h12 y81 ff6 fsc fc1 sc0 ls0 ws0">GND<span class="_ _22"> </span>A2</div><div class="t m2 x3d h14 y82 ff6 fse fc1 sc0 ls0 ws0">002aad028</div><div class="t m0 x3e h12 y83 ff6 fsc fc1 sc0 ls0 ws0">1</div><div class="t m0 x3e h12 y84 ff6 fsc fc1 sc0 ls0 ws0">2</div><div class="t m0 x3e h12 y85 ff6 fsc fc1 sc0 ls0 ws0">3</div><div class="t m0 x3e h12 y86 ff6 fsc fc1 sc0 ls0 ws0">4</div><div class="t m0 x3f h12 y87 ff6 fsc fc1 sc0 ls0 ws0">6</div><div class="t m0 x3f h12 y88 ff6 fsc fc1 sc0 ls0 ws0">5</div><div class="t m0 x3f h12 y89 ff6 fsc fc1 sc0 ls0 ws0">8</div><div class="t m0 x3f h12 y8a ff6 fsc fc1 sc0 ls0 ws0">7</div><div class="t m0 x2 he y8b ff1 fsa fc0 sc0 ls0 ws0">T<span class="_ _5"></span>able 3.<span class="_ _f"> </span>Pin description</div><div class="t m0 xd he y8c ff1 fsa fc1 sc0 ls0 ws0">Symbol<span class="_ _23"> </span>Pin<span class="_ _24"> </span>Description</div><div class="t m0 xd hf y8d ff2 fsa fc1 sc0 ls0 ws0">SD<span class="_ _6"></span>A<span class="_ _25"> </span>1<span class="_ _13"> </span>Digital I/O<span class="_ _6"></span>. I</div><div class="t m0 x40 h10 y8e ff2 fsb fc1 sc0 ls0 ws0">2</div><div class="t m0 x41 hf y8f ff2 fsa fc1 sc0 ls0 ws0">C-bus serial bidirectional data line; open-drain.</div><div class="t m0 xd hf y90 ff2 fsa fc1 sc0 ls0 ws0">SCL<span class="_ _26"> </span>2<span class="_ _13"> </span>Digital input. I</div><div class="t m0 x42 h10 y91 ff2 fsb fc1 sc0 ls0 ws0">2</div><div class="t m0 x43 hf y92 ff2 fsa fc1 sc0 ls0 ws0">C-bus serial clock input.</div><div class="t m0 xd hf y93 ff2 fsa fc1 sc0 ls0 ws0">OS<span class="_ _27"> </span>3<span class="_ _13"> </span>Overtemp Shutdown output; open-drain.</div><div class="t m0 xd hf y94 ff2 fsa fc1 sc0 ls0 ws0">GND<span class="_ _28"> </span>4<span class="_ _13"> </span>Ground. T<span class="_ _4"></span>o be connected to the system ground.</div><div class="t m0 xd hf y95 ff2 fsa fc1 sc0 ls0 ws0">A2<span class="_ _29"> </span>5<span class="_ _13"> </span>Digital input. User-defined address bit<span class="_"> </span>2.</div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625ec38f8cbeb85d572638d5/bg4.jpg"><div class="t m0 x1 h9 y28 ff2 fs6 fc1 sc0 ls0 ws0">LM75A_4<span class="_ _9"> </span>© NXP B.V<span class="_ _5"></span>. 2007. All rights reser<span class="_ _3"></span>v<span class="_ _1"></span>ed.</div><div class="t m0 x1 ha y29 ff1 fs7 fc0 sc0 ls0 ws0">Product data sheet<span class="_ _a"> </span>Rev<span class="_ _5"></span>. 04 — 10 July 2007<span class="_ _b"> </span>4 of 24</div><div class="t m0 x1 hb y2a ff1 fs8 fc0 sc0 ls0 ws0">NXP Semiconductors</div><div class="t m0 x9 hc y2b ff1 fs9 fc0 sc0 ls0 ws0">LM75A</div><div class="t m0 xa hd y2c ff1 fs1 fc0 sc0 ls0 ws0">Digital temperature sensor and thermal watchdog</div><div class="t m0 x1 h2 y96 ff1 fs0 fc0 sc0 ls0 ws0">7.<span class="_ _0"> </span>Functional description</div><div class="t m0 xc hb y97 ff1 fs8 fc0 sc0 ls0 ws0">7.1<span class="_ _e"> </span>General operation</div><div class="t m0 x2 h3 y98 ff2 fs1 fc1 sc0 ls0 ws0">The LM75A uses the on-chip band<span class="_"> </span>gap sensor to measure the de<span class="_ _1"></span>vice temperature with</div><div class="t m0 x2 h5 y99 ff2 fs1 fc1 sc0 ls0 ws0">the<span class="_"> </span>resolution<span class="_ _2"> </span>of<span class="_"> </span>0.125<span class="_"> </span><span class="ff3">°</span>C<span class="_ _2"> </span>and<span class="_"> </span>stores<span class="_"> </span>the<span class="_ _2"> </span>11-bit<span class="_"> </span>2's<span class="_ _2"> </span>complement<span class="_"> </span>digital<span class="_ _2"> </span>data,<span class="_"> </span>resulted<span class="_"> </span>from</div><div class="t m0 x2 h3 y9a ff2 fs1 fc1 sc0 ls0 ws0">11-bit<span class="_"> </span>A-to-D<span class="_ _2"> </span>conv<span class="_ _6"></span>ersion,<span class="_"> </span>into<span class="_"> </span>the<span class="_"> </span>de<span class="_ _6"></span>vice<span class="_"> </span>T<span class="_ _4"></span>emp<span class="_ _2"> </span>register<span class="_ _6"></span>.<span class="_"> </span>This<span class="_"> </span>T<span class="_ _4"></span>emp<span class="_ _2"> </span>register<span class="_"> </span>can<span class="_ _2"> </span>be<span class="_"> </span>read<span class="_"> </span>at</div><div class="t m0 x2 h3 y9b ff2 fs1 fc1 sc0 ls0 ws0">any time b<span class="_ _6"></span>y a controller on the I</div><div class="t m0 x44 h4 y9c ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x45 h3 y9b ff2 fs1 fc1 sc0 ls0 ws0">C-bus<span class="_ _6"></span>. Reading temperature data does not affect the</div><div class="t m0 x2 h3 y9d ff2 fs1 fc1 sc0 ls0 ws0">conv<span class="_ _6"></span>ersion in progress during the read operation.</div><div class="t m0 x2 h3 y9e ff2 fs1 fc1 sc0 ls0 ws0">The<span class="_ _2"> </span>device<span class="_ _2"> </span>can<span class="_ _2"> </span>be<span class="_ _2"> </span>set<span class="_ _2"> </span>to<span class="_"> </span>oper<span class="_ _1"></span>ate<span class="_ _2"> </span>in<span class="_"> </span>either<span class="_ _2"> </span>mode:<span class="_ _2"> </span>normal<span class="_"> </span>or<span class="_ _2"> </span>shutdown.<span class="_ _2"> </span>In<span class="_ _2"> </span>nor<span class="_ _3"></span>mal<span class="_ _2"> </span>operation</div><div class="t m0 x2 h3 y9f ff2 fs1 fc1 sc0 ls0 ws0">mode, the temp-to-digital con<span class="_ _6"></span>version is e<span class="_ _6"></span>xecuted e<span class="_ _6"></span>very 100<span class="_"> </span>ms and the T<span class="_ _4"></span>emp register is</div><div class="t m0 x2 h3 ya0 ff2 fs1 fc1 sc0 ls0 ws0">updated<span class="_"> </span>at<span class="_"> </span>the<span class="_ _2"> </span>end<span class="_"> </span>of<span class="_"> </span>each<span class="_ _2"> </span>conv<span class="_ _6"></span>ersion.<span class="_"> </span>In<span class="_"> </span>shutdo<span class="_ _1"></span>wn<span class="_"> </span>mode<span class="_ _1"></span>,<span class="_"> </span>the<span class="_"> </span>de<span class="_ _6"></span>vice<span class="_"> </span>becomes<span class="_"> </span>idle<span class="_ _6"></span>,<span class="_"> </span>data</div><div class="t m0 x2 h3 ya1 ff2 fs1 fc1 sc0 ls0 ws0">conv<span class="_ _6"></span>ersion is disabled and the T<span class="_ _4"></span>emp register holds the latest result; ho<span class="_ _1"></span>we<span class="_ _6"></span>ver<span class="_ _5"></span>, the device</div><div class="t m0 x2 h3 ya2 ff2 fs1 fc1 sc0 ls0 ws0">I</div><div class="t m0 x46 h4 ya3 ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x47 h3 ya2 ff2 fs1 fc1 sc0 ls0 ws0">C-bus interf<span class="_ _6"></span>ace is still active and register write/read operation can be perf<span class="_ _6"></span>or<span class="_ _3"></span>med. The</div><div class="t m0 x2 h3 ya4 ff2 fs1 fc1 sc0 ls0 ws0">de<span class="_ _6"></span>vice<span class="_"> </span>operation<span class="_"> </span>mode<span class="_"> </span>is<span class="_ _2"> </span>controllable<span class="_"> </span>b<span class="_ _6"></span>y<span class="_"> </span>programming<span class="_ _2"> </span>bit<span class="_"> </span>B0<span class="_"> </span>of<span class="_"> </span>the<span class="_ _2"> </span>configuration<span class="_"> </span>register<span class="_ _5"></span>.</div><div class="t m0 x2 h3 ya5 ff2 fs1 fc1 sc0 ls0 ws0">The temperature con<span class="_ _6"></span>version is initiated when the de<span class="_ _1"></span>vice is pow<span class="_ _1"></span>ered-up or put back into</div><div class="t m0 x2 h3 ya6 ff2 fs1 fc1 sc0 ls0 ws0">normal mode from shutdown.</div><div class="t m0 x2 h3 ya7 ff2 fs1 fc1 sc0 ls0 ws0">In<span class="_ _2"> </span>addition,<span class="_ _2"> </span>at<span class="_ _2"> </span>the<span class="_ _2"> </span>end<span class="_ _2"> </span>of<span class="_ _2"> </span>each<span class="_ _2"> </span>conv<span class="_ _6"></span>ersion<span class="_ _2"> </span>in<span class="_ _2"> </span>nor<span class="_ _3"></span>mal<span class="_ _2"> </span>mode,<span class="_ _2"> </span>the<span class="_ _2"> </span>temper<span class="_ _6"></span>ature<span class="_"> </span>data<span class="_ _2"> </span>(or<span class="_ _2"> </span>T<span class="_ _4"></span>emp)</div><div class="t m0 x2 h3 ya8 ff2 fs1 fc1 sc0 ls0 ws0">in the T<span class="_ _4"></span>emp register is automatically compared with the ov<span class="_ _6"></span>er<span class="_ _3"></span>temperature shutdown</div><div class="t m0 x2 h3 ya9 ff2 fs1 fc1 sc0 ls0 ws0">threshold<span class="_"> </span>data<span class="_ _2"> </span>(or<span class="_ _2"> </span>T<span class="_ _4"></span>os)<span class="_ _2"> </span>stored<span class="_"> </span>in<span class="_ _2"> </span>the<span class="_ _2"> </span>T<span class="_ _4"></span>os<span class="_"> </span>register<span class="_ _5"></span>,<span class="_"> </span>and<span class="_ _2"> </span>the<span class="_ _2"> </span>hysteresis<span class="_ _2"> </span>data<span class="_ _2"> </span>(or<span class="_ _2"> </span>Thyst)<span class="_ _2"> </span>stored</div><div class="t m0 x2 h3 yaa ff2 fs1 fc1 sc0 ls0 ws0">in the Th<span class="_ _6"></span>yst register<span class="_ _1"></span>, in order to set the state of the de<span class="_ _1"></span>vice OS output accordingly<span class="_ _4"></span>. The</div><div class="t m0 x2 h3 yab ff2 fs1 fc1 sc0 ls0 ws0">de<span class="_ _6"></span>vice T<span class="_ _4"></span>os and Thyst registers are write/read capable<span class="_ _1"></span>, and both operate with 9-bit</div><div class="t m0 x2 h3 yac ff2 fs1 fc1 sc0 ls0 ws0">2's<span class="_"> </span>complement digital data. T<span class="_ _4"></span>o match with this 9-bit operation, the T<span class="_ _4"></span>emp register uses</div><div class="t m0 x2 h3 yad ff2 fs1 fc1 sc0 ls0 ws0">only the 9<span class="_"> </span>MSB bits of its 11-bit data f<span class="_ _1"></span>or the comparison.</div><div class="t m0 x2 h3 yae ff2 fs1 fc1 sc0 ls0 ws0">The wa<span class="_ _6"></span>y that the OS output responds to the compar<span class="_ _3"></span>ison oper<span class="_ _1"></span>ation depends upon the OS</div><div class="t m0 x2 h3 yaf ff2 fs1 fc1 sc0 ls0 ws0">operation<span class="_ _2"> </span>mode<span class="_ _2"> </span>selected<span class="_"> </span>b<span class="_ _6"></span>y<span class="_"> </span>configuration<span class="_ _2"> </span>bit<span class="_ _2"> </span>B1,<span class="_"> </span>and<span class="_ _2"> </span>the<span class="_ _2"> </span>user-defined<span class="_ _2"> </span>f<span class="_ _1"></span>ault<span class="_"> </span>queue<span class="_ _2"> </span>defined</div><div class="t m0 x2 h3 yb0 ff2 fs1 fc1 sc0 ls0 ws0">by configur<span class="_ _1"></span>ation bits B3 and B4.</div><div class="t m0 x2 h3 yb1 ff2 fs1 fc1 sc0 ls0 ws0">In OS comparator mode, the OS output beha<span class="_ _6"></span>ves lik<span class="_ _6"></span>e a ther<span class="_ _3"></span>mostat. It becomes active</div><div class="t m0 x2 h3 yb2 ff2 fs1 fc1 sc0 ls0 ws0">when the T<span class="_ _4"></span>emp e<span class="_ _6"></span>xceeds the T</div><div class="t m0 x48 h4 yb3 ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x49 h3 yb2 ff2 fs1 fc1 sc0 ls0 ws0">, and is reset when the T<span class="_ _4"></span>emp drops below the T</div><div class="t m0 x4a h4 yb3 ff2 fs2 fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x19 h3 yb2 ff2 fs1 fc1 sc0 ls0 ws0">.</div><div class="t m0 x2 h3 yb4 ff2 fs1 fc1 sc0 ls0 ws0">Reading the de<span class="_ _1"></span>vice registers or putting the de<span class="_ _6"></span>vice into shutdown does not change the</div><div class="t m0 x2 h3 yb5 ff2 fs1 fc1 sc0 ls0 ws0">state of the OS output. The OS output in this case can be used to control cooling f<span class="_ _1"></span>ans or</div><div class="t m0 x2 h3 yb6 ff2 fs1 fc1 sc0 ls0 ws0">thermal switches.</div><div class="t m0 x2 h3 yb7 ff2 fs1 fc1 sc0 ls0 ws0">In OS interrupt mode, the OS output is used f<span class="_ _1"></span>or thermal interr<span class="_ _3"></span>uption. When the de<span class="_ _6"></span>vice is</div><div class="t m0 x2 h3 yb8 ff2 fs1 fc1 sc0 ls0 ws0">powered-up<span class="_ _5"></span>, the OS output is first activated only when the T<span class="_ _4"></span>emp e<span class="_ _6"></span>xceeds the T</div><div class="t m0 x4b h4 yb9 ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x4c h3 yb8 ff2 fs1 fc1 sc0 ls0 ws0">; then it</div><div class="t m0 x2 h3 yba ff2 fs1 fc1 sc0 ls0 ws0">remains active indefinitely until being reset b<span class="_ _6"></span>y a read of any register<span class="_ _6"></span>. Once the OS output</div><div class="t m0 x2 h3 ybb ff2 fs1 fc1 sc0 ls0 ws0">has<span class="_ _2"> </span>been<span class="_ _2"> </span>activated<span class="_ _2"> </span>b<span class="_ _6"></span>y<span class="_"> </span>crossing<span class="_ _2"> </span>T</div><div class="t m0 x4d h4 ybc ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x4e h3 ybb ff2 fs1 fc1 sc0 ls0 ws0">and<span class="_ _2"> </span>then<span class="_ _2"> </span>reset,<span class="_ _2"> </span>it<span class="_ _2"> </span>can<span class="_ _2"> </span>be<span class="_"> </span>activ<span class="_ _6"></span>ated<span class="_ _2"> </span>again<span class="_"> </span>only<span class="_ _2"> </span>when<span class="_ _2"> </span>the</div><div class="t m0 x2 h3 ybd ff2 fs1 fc1 sc0 ls0 ws0">T<span class="_ _4"></span>emp<span class="_"> </span>drops<span class="_ _2"> </span>below<span class="_ _2"> </span>the<span class="_"> </span>T</div><div class="t m0 x4f h4 ybe ff2 fs2 fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x50 h3 ybd ff2 fs1 fc1 sc0 ls0 ws0">;<span class="_"> </span>then<span class="_ _2"> </span>again,<span class="_"> </span>it<span class="_"> </span>remains<span class="_ _2"> </span>activ<span class="_ _1"></span>e<span class="_"> </span>indefinitely<span class="_ _2"> </span>until<span class="_"> </span>being<span class="_ _2"> </span>reset<span class="_"> </span>by<span class="_ _2"> </span>a</div><div class="t m0 x2 h3 ybf ff2 fs1 fc1 sc0 ls0 ws0">read of any register<span class="_ _5"></span>. The OS interr<span class="_ _3"></span>upt operation w<span class="_ _6"></span>ould be continued in this sequence:</div><div class="t m0 x2 h3 yc0 ff2 fs1 fc1 sc0 ls0 ws0">T</div><div class="t m0 x13 h4 yc1 ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x51 h3 yc0 ff2 fs1 fc1 sc0 ls0 ws0">trip, Reset, T</div><div class="t m0 x52 h4 yc1 ff2 fs2 fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x2a h3 yc0 ff2 fs1 fc1 sc0 ls0 ws0">trip, Reset, T</div><div class="t m0 x53 h4 yc1 ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x54 h3 yc0 ff2 fs1 fc1 sc0 ls0 ws0">trip, Reset, T</div><div class="t m0 x55 h4 yc1 ff2 fs2 fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x56 h3 yc0 ff2 fs1 fc1 sc0 ls0 ws0">trip, Reset, etc.</div><div class="t m0 xd hf yc2 ff2 fsa fc1 sc0 ls0 ws0">A1<span class="_ _29"> </span>6<span class="_ _13"> </span>Digital input. User-defined address bit<span class="_"> </span>1.</div><div class="t m0 xd hf yc3 ff2 fsa fc1 sc0 ls0 ws0">A0<span class="_ _29"> </span>7<span class="_ _13"> </span>Digital input. User-defined address bit<span class="_"> </span>0.</div><div class="t m0 xd hf yc4 ff2 fsa fc1 sc0 ls0 ws0">V</div><div class="t m0 x57 h10 yc5 ff2 fsb fc1 sc0 ls0 ws0">CC</div><div class="t m0 x58 hf yc6 ff2 fsa fc1 sc0 ls0 ws0">8<span class="_ _13"> </span>P<span class="_ _6"></span>ower supply<span class="_ _4"></span>.</div><div class="t m0 x2 he yc7 ff1 fsa fc0 sc0 ls0 ws0">T<span class="_ _5"></span>able 3.<span class="_ _f"> </span>Pin description</div><div class="t m3 x59 h15 yc8 ff2 fsf fc0 sc0 ls0 ws0"> …continued</div><div class="t m0 xd he yc9 ff1 fsa fc1 sc0 ls0 ws0">Symbol<span class="_ _23"> </span>Pin<span class="_ _24"> </span>Description</div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625ec38f8cbeb85d572638d5/bg5.jpg"><div class="t m0 x1 h9 y28 ff2 fs6 fc1 sc0 ls0 ws0">LM75A_4<span class="_ _9"> </span>© NXP B.V<span class="_ _5"></span>. 2007. All rights reser<span class="_ _3"></span>v<span class="_ _1"></span>ed.</div><div class="t m0 x1 ha y29 ff1 fs7 fc0 sc0 ls0 ws0">Product data sheet<span class="_ _a"> </span>Rev<span class="_ _5"></span>. 04 — 10 July 2007<span class="_ _b"> </span>5 of 24</div><div class="t m0 x1 hb y2a ff1 fs8 fc0 sc0 ls0 ws0">NXP Semiconductors</div><div class="t m0 x9 hc y2b ff1 fs9 fc0 sc0 ls0 ws0">LM75A</div><div class="t m0 xa hd y2c ff1 fs1 fc0 sc0 ls0 ws0">Digital temperature sensor and thermal watchdog</div><div class="t m0 x2 h3 y2d ff2 fs1 fc1 sc0 ls0 ws0">In both cases, compar<span class="_ _1"></span>ator mode and interrupt mode, the OS output is activated only if a</div><div class="t m0 x2 h3 yca ff2 fs1 fc1 sc0 ls0 ws0">number of consecutiv<span class="_ _6"></span>e faults, defined b<span class="_ _6"></span>y the device f<span class="_ _6"></span>ault queue, has been met. The f<span class="_ _6"></span>ault</div><div class="t m0 x2 h3 ycb ff2 fs1 fc1 sc0 ls0 ws0">queue is programmab<span class="_ _6"></span>le and stored in the two bits, B3 and B4, of the Configuration</div><div class="t m0 x2 h3 ycc ff2 fs1 fc1 sc0 ls0 ws0">register<span class="_ _6"></span>. Also<span class="_ _6"></span>, the OS output active state is selectable as HIGH or LO<span class="_ _6"></span>W by setting</div><div class="t m0 x2 h3 ycd ff2 fs1 fc1 sc0 ls0 ws0">accordingly the configuration register bit B2.</div><div class="t m0 x2 h3 yce ff2 fs1 fc1 sc0 ls0 ws0">At<span class="_ _2"> </span>power-up<span class="_ _5"></span>,<span class="_"> </span>the<span class="_ _2"> </span>de<span class="_ _6"></span>vice<span class="_"> </span>is<span class="_ _2"> </span>put<span class="_ _2"> </span>into<span class="_ _2"> </span>normal<span class="_"> </span>oper<span class="_ _1"></span>ation<span class="_ _2"> </span>mode,<span class="_ _2"> </span>the<span class="_ _2"> </span>T</div><div class="t m0 x2b h4 ycf ff2 fs2 fc1 sc0 ls0 ws0">os</div><div class="t m0 x5a h5 yce ff2 fs1 fc1 sc0 ls0 ws0">is<span class="_ _2"> </span>set<span class="_ _2"> </span>to<span class="_ _2"> </span>80<span class="_"> </span><span class="ff3">°</span>C,<span class="_ _2"> </span>the<span class="_ _2"> </span>T</div><div class="t m0 x5b h4 ycf ff2 fs2 fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x2 h5 yd0 ff2 fs1 fc1 sc0 ls0 ws0">is<span class="_"> </span>set<span class="_ _2"> </span>to<span class="_"> </span>75<span class="_"> </span><span class="ff3">°</span>C<span class="_ _6"></span>,<span class="_"> </span>the<span class="_"> </span>OS<span class="_"> </span>activ<span class="_ _6"></span>e<span class="_"> </span>state<span class="_"> </span>is<span class="_ _2"> </span>selected<span class="_"> </span>LO<span class="_ _6"></span>W<span class="_"> </span>and<span class="_"> </span>the<span class="_"> </span>f<span class="_ _6"></span>ault<span class="_"> </span>queue<span class="_"> </span>is<span class="_ _2"> </span>equal<span class="_"> </span>to<span class="_"> </span>1.<span class="_ _2"> </span>The</div><div class="t m0 x2 h3 yd1 ff2 fs1 fc1 sc0 ls0 ws0">temp reading data is not av<span class="_ _6"></span>ailable until the first con<span class="_ _1"></span>v<span class="_ _1"></span>ersion is completed in about 100<span class="_"> </span>ms.</div><div class="t m0 x2 h3 yd2 ff2 fs1 fc1 sc0 ls0 ws0">The OS response to the temperature is illustrated in<span class="_"> </span><span class="fc2">Figure<span class="_"> </span>4</span>.</div><div class="t m0 xc hb yd3 ff1 fs8 fc0 sc0 ls0 ws0">7.2<span class="_ _e"> </span>I</div><div class="t m0 x46 he yd4 ff1 fsa fc0 sc0 ls0 ws0">2</div><div class="t m0 x57 hb yd3 ff1 fs8 fc0 sc0 ls0 ws0">C-bus serial interface</div><div class="t m0 x2 h3 yd5 ff2 fs1 fc1 sc0 ls0 ws0">The LM75A can be connected to a compatible 2-wire serial interf<span class="_ _6"></span>ace I</div><div class="t m0 x5c h4 yd6 ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x5d h3 yd5 ff2 fs1 fc1 sc0 ls0 ws0">C-bus as a sla<span class="_ _6"></span>ve</div><div class="t m0 x2 h3 yd7 ff2 fs1 fc1 sc0 ls0 ws0">de<span class="_ _6"></span>vice<span class="_"> </span>under<span class="_"> </span>the<span class="_"> </span>control<span class="_"> </span>of<span class="_"> </span>a<span class="_ _2"> </span>controller<span class="_"> </span>or<span class="_"> </span>master<span class="_"> </span>de<span class="_ _6"></span>vice,<span class="_"> </span>using<span class="_ _2"> </span>two<span class="_"> </span>de<span class="_ _6"></span>vice<span class="_"> </span>ter<span class="_ _3"></span>minals<span class="_ _1"></span>,<span class="_"> </span>SCL</div><div class="t m0 x2 h3 yd8 ff2 fs1 fc1 sc0 ls0 ws0">and<span class="_ _2"> </span>SD<span class="_ _6"></span>A.<span class="_ _2"> </span>The<span class="_ _2"> </span>controller<span class="_ _2"> </span>must<span class="_ _2"> </span>pro<span class="_ _6"></span>vide<span class="_"> </span>the<span class="_ _2a"> </span>SCL<span class="_ _2a"> </span>clock<span class="_ _2a"> </span>signal<span class="_"> </span>and<span class="_ _2a"> </span>write/read<span class="_"> </span>data<span class="_ _2a"> </span>to/from<span class="_ _2a"> </span>the</div><div class="t m0 x2 h3 yd9 ff2 fs1 fc1 sc0 ls0 ws0">de<span class="_ _6"></span>vice<span class="_"> </span>through<span class="_ _2"> </span>the<span class="_"> </span>SD<span class="_ _5"></span>A<span class="_"> </span>terminal.<span class="_"> </span>Notice<span class="_ _2"> </span>that<span class="_ _2"> </span>if<span class="_"> </span>the<span class="_ _2a"> </span>I</div><div class="t m0 x5e h4 yda ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x5f h3 yd9 ff2 fs1 fc1 sc0 ls0 ws0">C-bus<span class="_ _2a"> </span>common<span class="_"> </span>pull-up<span class="_ _2a"> </span>resistors<span class="_"> </span>hav<span class="_ _6"></span>e</div><div class="t m0 x2 h3 ydb ff2 fs1 fc1 sc0 ls0 ws0">not been installed as required f<span class="_ _1"></span>or I</div><div class="t m0 x60 h4 ydc ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x61 h5 ydb ff2 fs1 fc1 sc0 ls0 ws0">C-bus<span class="_ _6"></span>, then an external pull-up resistor<span class="_ _6"></span>, about 10<span class="_"> </span>k<span class="ff3">Ω</span>,</div><div class="t m0 x2 h3 ydd ff2 fs1 fc1 sc0 ls0 ws0">is needed f<span class="_ _6"></span>or each of these two ter<span class="_ _3"></span>minals. The b<span class="_ _6"></span>us communication protocols are</div><div class="t m0 x2 h3 yde ff2 fs1 fc1 sc0 ls0 ws0">described in<span class="_"> </span><span class="fc2">Section<span class="_"> </span>7.10</span>.</div><div class="t m0 xc hb ydf ff1 fs8 fc0 sc0 ls0 ws0">7.3<span class="_ _e"> </span>Slave ad<span class="_ _6"></span>dress</div><div class="t m0 x2 h3 ye0 ff2 fs1 fc1 sc0 ls0 ws0">The LM75A slav<span class="_ _6"></span>e address on the I</div><div class="t m0 x62 h4 ye1 ff2 fs2 fc1 sc0 ls0 ws0">2</div><div class="t m0 x63 h3 ye0 ff2 fs1 fc1 sc0 ls0 ws0">C-bus is partially defined by the logic applied to the</div><div class="t m0 x2 h3 ye2 ff2 fs1 fc1 sc0 ls0 ws0">de<span class="_ _1"></span>vice<span class="_"> </span>address<span class="_ _2"> </span>pins<span class="_"> </span>A2,<span class="_ _2"> </span>A1<span class="_"> </span>and<span class="_ _2"> </span>A0.<span class="_"> </span>Each<span class="_ _2"> </span>of<span class="_"> </span>them<span class="_ _2"> </span>is<span class="_"> </span>typically<span class="_ _2"> </span>connected<span class="_"> </span>either<span class="_ _2"> </span>to<span class="_"> </span>GND<span class="_"> </span>f<span class="_ _6"></span>or</div><div class="t m0 x2 h3 ye3 ff2 fs1 fc1 sc0 ls0 ws0">logic<span class="_"> </span>0, or to V</div><div class="t m0 x35 h4 ye4 ff2 fs2 fc1 sc0 ls0 ws0">CC</div><div class="t m0 x64 h3 ye3 ff2 fs1 fc1 sc0 ls0 ws0"> f<span class="_ _6"></span>or logic<span class="_"> </span>1. These pins represent the three LSB bits of the device 7-bit</div><div class="t m0 x2 h3 ye5 ff2 fs1 fc1 sc0 ls0 ws0">address. The other f<span class="_ _6"></span>our MSB bits of the address data are preset to ‘1001’ by hard wiring</div><div class="t m0 x2 h3 ye6 ff2 fs1 fc1 sc0 ls0 ws0">inside the LM75A.<span class="_"> </span><span class="fc2">T<span class="_ _4"></span>able<span class="_"> </span>4<span class="fc1"> sho<span class="_ _6"></span>ws the device’<span class="_ _5"></span>s complete address and indicates that up to</span></span></div><div class="t m0 x65 h16 ye7 ff2 fs7 fc1 sc0 ls0 ws0">(1)<span class="_ _2b"> </span>OS<span class="_"> </span>is<span class="_"> </span>reset<span class="_ _2a"> </span>b<span class="_ _6"></span>y<span class="_"> </span>either<span class="_"> </span>reading<span class="_"> </span>register<span class="_ _6"></span>.<span class="_"> </span>It<span class="_"> </span>is<span class="_ _2c"> </span>assumed<span class="_"> </span>that<span class="_"> </span>the<span class="_ _2c"> </span>fault<span class="_ _2c"> </span>queue<span class="_"> </span>is<span class="_"> </span>met<span class="_ _2c"> </span>at<span class="_"> </span>each<span class="_"> </span>T</div><div class="t m0 x66 h13 ye8 ff2 fsd fc1 sc0 ls0 ws0">os</div><div class="t m0 x4c h16 ye7 ff2 fs7 fc1 sc0 ls0 ws0">and</div><div class="t m0 x67 h16 ye9 ff2 fs7 fc1 sc0 ls0 ws0">T</div><div class="t m0 x68 h13 yea ff2 fsd fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x69 h16 ye9 ff2 fs7 fc1 sc0 ls0 ws0"> crossing point.</div><div class="t m0 x13 he yeb ff1 fsa fc0 sc0 ls0 ws0">Fig 4.<span class="_ _1c"> </span>OS response to temperature</div><div class="t m2 x6a h14 yec ff6 fse fc1 sc0 ls0 ws0">002aad032</div><div class="t m0 x62 h13 yed ff6 fsd fc1 sc0 ls0 ws0">(1)<span class="_ _2d"> </span>(1)<span class="_ _2e"> </span>(1)</div><div class="t m0 x1c h12 yee ff6 fsc fc1 sc0 ls0 ws0">T</div><div class="t m0 x35 h13 yef ff6 fsd fc1 sc0 ls0 ws0">os</div><div class="t m0 x21 h12 yf0 ff6 fsc fc1 sc0 ls0 ws0">T</div><div class="t m0 x1c h13 yf1 ff6 fsd fc1 sc0 ls0 ws0">hyst</div><div class="t m0 x32 h12 yf2 ff6 fsc fc1 sc0 ls0 ws0">OS reset</div><div class="t m0 x6b h12 yf3 ff6 fsc fc1 sc0 ls0 ws0">OS active</div><div class="t m0 x32 h12 yf4 ff6 fsc fc1 sc0 ls0 ws0">OS reset</div><div class="t m0 x6b h12 yf5 ff6 fsc fc1 sc0 ls0 ws0">OS active</div><div class="t m0 x6c h12 yf6 ff6 fsc fc1 sc0 ls0 ws0">OS output in comparator mode</div><div class="t m0 x6d h12 yf7 ff6 fsc fc1 sc0 ls0 ws0">OS output in interrupt mode</div><div class="t m0 x6e h12 yf8 ff6 fsc fc1 sc0 ls0 ws0">reading temperature limits</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>