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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625154bb74bc5c01059a218b/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"> APPLICATION <span class="_ _0"></span>NOTE </div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y3 ff1 fs1 fc0 sc0 ls2 ws2">R01AN1296EJ01<span class="_ _1"></span>20 Rev. 1.20 <span class="_ _2"> </span> <span class="_ _3"> </span>Page 1 of 22 </div><div class="t m0 x1 h3 y4 ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014 <span class="_ _4"> </span><span class="ls1 ws1"> </span></div><div class="t m0 x1 h4 y5 ff2 fs2 fc0 sc0 ls1 ws4">RL78 Family </div><div class="t m0 x1 h2 y6 ff1 fs0 fc0 sc0 ls4 ws5">IEC60730/60335 oriented Self <span class="ws1">Test additional Library </span></div><div class="t m0 x1 h5 y7 ff2 fs3 fc0 sc0 ls5 ws1">Introduction </div><div class="t m0 x1 h3 y8 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y9 ff3 fs1 fc0 sc0 ls6 ws6">Today, as automatic electronic controls systems continue<span class="_ _1"></span> to<span class="ls7 ws7"> expand into many diverse applications, the requirement of </span></div><div class="t m0 x1 h6 ya ff3 fs1 fc0 sc0 ls8 ws8">reliability and safety are becoming an ever increasing factor in system design. </div><div class="t m0 x1 h6 yb ff3 fs1 fc0 sc0 ls9 ws9">For example, the i<span class="_ _1"></span>ntroduction of t<span class="_ _1"></span>he IEC60730 safety<span class="_ _1"></span> standard for ho<span class="_ _1"></span>usehold appl<span class="_ _1"></span>iances requires<span class="_ _1"></span> manufactures t<span class="_ _1"></span>o </div><div class="t m0 x1 h6 yc ff3 fs1 fc0 sc0 lsa wsa">design automatic electronic co<span class="_ _1"></span>ntrols that ensure<span class="lsb wsb"> safe and reliable operation of their<span class="_ _5"></span> products. </span></div><div class="t m0 x1 h6 yd ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 ye ff3 fs1 fc0 sc0 lsc wsc">The IEC60730 standard<span class="_ _5"></span> covers all aspects of produ<span class="_ _5"></span>ct design but Annex H is of key importance for de<span class="_ _5"></span>sign of </div><div class="t m0 x1 h6 yf ff3 fs1 fc0 sc0 ls9 wsd">Microcontroll<span class="_ _1"></span>er based control<span class="_ _1"></span> systems. Thi<span class="_ _1"></span>s provides t<span class="_ _1"></span>hree <span class="lsd wse">soft<span class="_ _1"></span>ware classifications for <span class="ls3 wsf">a<span class="_ _1"></span>utomatic electronic controls: </span></span></div><div class="t m0 x1 h6 y10 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y11 ff3 fs1 fc0 sc0 lse ws10">1. Class A: C<span class="_ _1"></span>ontrol funct<span class="_ _1"></span>ions, w<span class="_ _1"></span>hich are not<span class="_ _1"></span> intended t<span class="_ _1"></span>o be relie<span class="_ _1"></span>d upon for<span class="_ _1"></span> the safety of t<span class="_ _1"></span>he equipm<span class="_ _1"></span>ent. </div><div class="t m0 x3 h6 y12 ff3 fs1 fc0 sc0 lsf ws11">Examples: Room thermostats, humidity contro<span class="ls10 ws12">ls, lighting contro<span class="_ _5"></span>ls, timers, and switches. </span></div><div class="t m0 x3 h6 y13 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y14 ff3 fs1 fc0 sc0 ls11 ws13">2. Class B:<span class="_ _1"></span> Control f<span class="_ _1"></span>unctions,<span class="_ _1"></span> which are i<span class="_ _1"></span>ntended t<span class="_ _1"></span>o prevent<span class="_ _1"></span> unsafe operat<span class="_ _1"></span>ion of the<span class="_ _1"></span> controlled e<span class="_ _1"></span>quipm<span class="_ _1"></span>ent. </div><div class="t m0 x3 h6 y15 ff3 fs1 fc0 sc0 ls12 ws14">Examples: Therm<span class="_ _1"></span>al cut-offs and doo<span class="lsc ws15">r locks for laundr<span class="_ _5"></span>y equipment. </span></div><div class="t m0 x3 h6 y16 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y17 ff3 fs1 fc0 sc0 ls13 ws16">3. Class C: C<span class="_ _1"></span>ontrol functi<span class="_ _1"></span>ons, whic<span class="_ _1"></span>h are intende<span class="_ _1"></span>d to preve<span class="_ _1"></span>nt special hazar<span class="_ _1"></span>ds </div><div class="t m0 x3 h6 y18 ff3 fs1 fc0 sc0 ls14 ws17">Examples: Autom<span class="_ _1"></span>atic burner controls<span class="ls15 ws18"> and therm<span class="_ _1"></span>al cut-outs for closed. </span></div><div class="t m0 x1 h6 y19 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y1a ff3 fs1 fc0 sc0 ls16 ws19">Appliances such as washing m<span class="ls12 ws14">achines, dishwashers, dryers, re<span class="ls3 ws1a">frige<span class="_ _1"></span>rators, freezers, and Cook<span class="ls10 ws1b">ers / Stoves will tend to fall </span></span></span></div><div class="t m0 x1 h6 y1b ff3 fs1 fc0 sc0 ls17 ws1">under the cl<span class="_ _1"></span>assification <span class="_ _1"></span>of Class B. <span class="_ _1"></span> </div><div class="t m0 x1 h3 y1c ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y1d ff3 fs1 fc0 sc0 ls17 ws1c">This Applicat<span class="_ _1"></span>ion Note pr<span class="_ _1"></span>ovides guidel<span class="_ _1"></span>ines of how t<span class="_ _1"></span>o use flex<span class="ls18 ws1d">ible sample software <span class="_ _1"></span>routines to assist with complian<span class="_ _5"></span>ce </span></div><div class="t m0 x1 h6 y1e ff3 fs1 fc0 sc0 ls19 ws1e">with IEC60730<span class="_ _1"></span>/60335 class B<span class="_ _1"></span> safety standard<span class="_ _1"></span>s. <span class="fc1 ls1 ws1"> </span></div><div class="t m0 x1 h6 y1f ff3 fs1 fc0 sc0 ls1a ws1f">Although these rou<span class="_ _5"></span>tines were developed on the assu<span class="_ _5"></span>mption of<span class="ls1b ws20"> trying I<span class="_ _5"></span>EC60730/60335 compliance test as a basis, th<span class="_ _5"></span>ey </span></div><div class="t m0 x1 h6 y20 ff3 fs1 fc0 sc0 ls1c ws21">can be implemented in any system for self testing of Renesas Microcontroller families.<span class="fc1 ls1 ws1"> </span></div><div class="t m0 x1 h6 y21 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y22 ff3 fs1 fc0 sc0 ls1d ws22">These software routines provided are designed<span class="_ _5"></span> to be used af<span class="ls1e ws23">ter the system power o<span class="_ _5"></span>n, or reset condition and <span class="_ _5"></span>also during </span></div><div class="t m0 x1 h6 y23 ff3 fs1 fc0 sc0 lsf ws24">the application program execution. The end u<span class="_ _5"></span>ser has the flex<span class="ls1e ws25">ibility of what routin<span class="_ _5"></span>es are included and how to integrate </span></div><div class="t m0 x1 h6 y24 ff3 fs1 fc0 sc0 ls1b ws26">these routines into their overall app<span class="_ _5"></span>lication system design. This document and th<span class="_ _5"></span>e accompanying test ha<span class="_ _5"></span>rness code </div><div class="t m0 x1 h6 y25 ff3 fs1 fc0 sc0 ls7 ws27">provide examples of how to do th<span class="_ _5"></span>is. </div><div class="t m0 x1 h6 y26 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y27 ff3 fs1 fc0 sc0 ls1b ws28">Note. This document is made i<span class="_ _5"></span>magining the European Norm EN6033<span class="_ _5"></span>5-1:2002/A1:2004 Ann<span class="_ _5"></span>ex R, in which the Norm </div><div class="t m0 x1 h6 y28 ff3 fs1 fc0 sc0 ls1f ws29">IEC 60730-1<span class="_ _1"></span> (EN60730-1:<span class="_ _1"></span>2000) is use<span class="_ _1"></span>d in som<span class="_ _1"></span>e points. The A<span class="_ _1"></span>nnex R of t<span class="_ _1"></span>he menti<span class="_ _1"></span>oned Norm<span class="_ _1"></span> contains just a si<span class="_ _1"></span>ngle </div><div class="t m0 x1 h6 y29 ff3 fs1 fc0 sc0 ls20 ws2a">sheet that jumps to the IEC 60730-1 for definition<span class="_ _5"></span>s, information and applicable p<span class="_ _5"></span>aragraphs. </div><div class="t m0 x1 h5 y2a ff2 fs3 fc0 sc0 ls1 ws1"> </div><div class="t m0 x4 h3 y2b ff1 fs1 fc0 sc0 ls9 ws1">R01AN1296E<span class="_ _1"></span>J0120</div><div class="t m0 x5 h3 y2c ff1 fs1 fc0 sc0 ls3 ws3">Rev. 1.20</div><div class="t m0 x6 h3 y2d ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014</div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
</body>
</html>
<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625154bb74bc5c01059a218b/bg2.jpg"><div class="t m0 x1 h5 y2e ff2 fs3 fc0 sc0 ls21 ws2b">RL78 Family <span class="_ _6"> </span>IEC60730/60335 oriented Se<span class="ls22 ws2c">lf Test additional Library </span></div><div class="t m0 x1 h3 y2f ff1 fs1 fc0 sc0 ls23 ws2d">R01AN1296EJ01<span class="_ _1"></span>20 Rev. 1.20 <span class="_ _7"> </span> <span class="_ _3"> </span>Page 2 of 22 </div><div class="t m0 x1 h3 y4 ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014 <span class="_ _4"> </span><span class="ls1 ws1"> </span></div><div class="t m0 x1 h5 y30 ff2 fs3 fc0 sc0 ls22 ws2c">Target Devices </div><div class="t m0 x1 h3 y31 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y32 ff3 fs1 fc0 sc0 ls24 ws2e">RL78 Fami<span class="_ _1"></span>ly Microcontr<span class="_ _1"></span>ollers (exce<span class="_ _1"></span>pt RL78/G<span class="_ _1"></span>10 Group)<span class="_ _1"></span> </div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625154bb74bc5c01059a218b/bg3.jpg"><div class="t m0 x1 h5 y2e ff2 fs3 fc0 sc0 ls21 ws2b">RL78 Family <span class="_ _6"> </span>IEC60730/60335 oriented Se<span class="ls22 ws2c">lf Test additional Library </span></div><div class="t m0 x1 h3 y2f ff1 fs1 fc0 sc0 ls23 ws2d">R01AN1296EJ01<span class="_ _1"></span>20 Rev. 1.20 <span class="_ _7"> </span> <span class="_ _3"> </span>Page 3 of 22 </div><div class="t m0 x1 h3 y4 ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014 <span class="_ _4"> </span><span class="ls1 ws1"> </span></div><div class="t m0 x1 h5 y33 ff2 fs3 fc0 sc0 ls25 ws1">Contents </div><div class="t m0 x7 h7 y34 ff1 fs1 fc0 sc0 ls26 ws1">1.<span class="ff3 fs3 ls1"> <span class="_ _8"> </span></span><span class="ls6 ws2f">Self Test Librar<span class="ls27 ws10">ies Introduction ..............................................................................................<span class="_ _1"></span><span class="ls28 ws30">........... 4<span class="ff3 fs3 ls1 ws1"> </span></span></span></span></div><div class="t m0 x7 h7 y35 ff4 fs1 fc0 sc0 ls1 ws1"><span class="ff3 fs3"> <span class="_ _9"> </span></span><span class="ff1 ls1d ws31">Interrupt .....................................................................................................................<span class="ls28 ws30">........................ 4</span></span><span class="ff3 fs3"> </span></div><div class="t m0 x7 h7 y36 ff4 fs1 fc0 sc0 ls1 ws1"><span class="ff3 fs3"> <span class="_ _9"> </span></span><span class="ff1 ls28 ws32">ADC ...........................................................................................................................<span class="ws30">........................ 4</span></span><span class="ff3 fs3"> </span></div><div class="t m0 x7 h7 y37 ff4 fs1 fc0 sc0 ls1 ws1"><span class="ff3 fs3"> <span class="_ _9"> </span></span><span class="ff1 ls28 ws33">PORT ..........................................................................................................................<span class="ws30">...................... 4</span></span><span class="ff3 fs3"> </span></div><div class="t m0 x7 h7 y38 ff4 fs1 fc0 sc0 ls1 ws1"><span class="ff3 fs3"> <span class="_ _9"> </span></span><span class="ff1 ls3 ws3">SERIAL COMMUNI<span class="ls1d ws34">CATION ..........................................................................................................<span class="_ _1"></span><span class="ls28 ws30">... 4<span class="ff3 fs3 ls1 ws1"> </span></span></span></span></div><div class="t m0 x7 h7 y39 ff1 fs1 fc0 sc0 ls26 ws1">2.<span class="ff3 fs3 ls1"> <span class="_ _8"> </span></span><span class="ls27 ws10">Self Test Library Functions ...................................................................................................<span class="ls28 ws30">............ 5</span></span><span class="ff3 fs3 ls1"> </span></div><div class="t m0 x7 h7 y3a ff1 fs1 fc0 sc0 ls16 ws1">2.4<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls29">Interrupt <span class="ls28 ws35">Tests ...............................................................................................................<span class="ws30">.................... 5</span></span><span class="ff3 fs3 ls1"> </span></span></div><div class="t m0 x7 h7 y3b ff1 fs1 fc0 sc0 ls16 ws1">2.5<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls1d ws29">ADC Tests <span class="_ _b"></span>.....................................................................................................................<span class="ls28 ws30">.................... 6<span class="ff3 fs3 ls1 ws1"> </span></span></span></div><div class="t m0 x7 h7 y3c ff1 fs1 fc0 sc0 ls16 ws1">2.6<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls10 ws36">PORT Tests <span class="_ _c"></span><span class="ls28 ws1">...............................................................................................................................<span class="ws30">........ 7</span><span class="ff3 fs3 ls1"> </span></span></span></div><div class="t m0 x7 h7 y3d ff1 fs1 fc0 sc0 ls16 ws1">2.7<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls1d ws29">SERIAL Tests <span class="_ _d"></span>..................................................................................................................<span class="ls28 ws30">.................. 8<span class="ff3 fs3 ls1 ws1"> </span></span></span></div><div class="t m0 x7 h7 y3e ff1 fs1 fc0 sc0 ls1 ws1">3<span class="ff3 fs3"> <span class="_ _e"> </span></span><span class="ls1d ws37">Benchmarking ..................................................................................................................<span class="ls1b ws38">............... 10</span></span><span class="ff3 fs3"> </span></div><div class="t m0 x7 h7 y3f ff1 fs1 fc0 sc0 ls16 ws1">3.1<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls2a ws39">Development En<span class="ls1d ws3a">vironment .......................................................................................................<span class="ls2b ws3b">....... 10</span></span></span><span class="ff3 fs3 ls1"> </span></div><div class="t m0 x7 h7 y40 ff1 fs1 fc0 sc0 ls16 ws1">3.2<span class="ff3 fs3 ls1"> <span class="_ _a"> </span></span><span class="ls6">Cubesuite+ <span class="ls1d ws3c">Settings ...........................................................................................................<span class="ls20 ws3d">............. 10<span class="_ _1"></span><span class="ff3 fs3 ls1 ws1"> </span></span></span></span></div><div class="t m0 x7 h7 y41 ff1 fs1 fc0 sc0 ls1 ws1">4<span class="ff3 fs3"> <span class="_ _e"> </span></span><span class="ls14 ws3e">Additional Hardware Resources <span class="_ _c"></span><span class="ls1d ws3f">...................................................................................................... 13<span class="_ _1"></span><span class="ff3 fs3 ls1 ws1"> </span></span></span></div><div class="t m0 x7 h7 y42 ff1 fs1 fc0 sc0 ls3 ws3">Revision Re<span class="ls28 ws40">cord ...............................................................................................................<span class="ls27 ws41">....................... 20<span class="ff3 fs3 ls1 ws1"> </span></span></span></div><div class="t m0 x7 h7 y43 ff1 fs1 fc0 sc0 ls8 ws42">General Precautions in the H<span class="ls15 ws43">andling of MPU/MC<span class="ls1b ws44">U Products <span class="_ _f"></span>................................................................. <span class="_ _10"></span>21<span class="ff3 fs3 ls1 ws1"> </span></span></span></div><div class="t m0 x7 h3 y44 ff1 fs1 fc0 sc0 ls1 ws1"> </div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625154bb74bc5c01059a218b/bg4.jpg"><div class="t m0 x1 h5 y2e ff2 fs3 fc0 sc0 ls21 ws2b">RL78 Family <span class="_ _6"> </span>IEC60730/60335 oriented Se<span class="ls22 ws2c">lf Test additional Library </span></div><div class="t m0 x1 h3 y2f ff1 fs1 fc0 sc0 ls23 ws2d">R01AN1296EJ01<span class="_ _1"></span>20 Rev. 1.20 <span class="_ _7"> </span> <span class="_ _3"> </span>Page 4 of 22 </div><div class="t m0 x1 h3 y4 ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014 <span class="_ _4"> </span><span class="ls1 ws1"> </span></div><div class="t m0 x1 h5 y33 ff2 fs3 fc0 sc0 ls2c ws45">1. <span class="_ _11"> </span>Self Test Libraries Introduction </div><div class="t m0 x1 h6 y45 ff3 fs1 fc0 sc0 ls12 ws46">The self test library (STL) provides sel<span class="_ _1"></span>f test functions cove<span class="lsa ws47">ring the CPU re<span class="_ _1"></span>gisters, intern<span class="ls12 ws46">al memory and system<span class="_ _1"></span> clock. </span></span></div><div class="t m0 x1 h6 y46 ff3 fs1 fc0 sc0 ls15 ws48">The library test harness provides an <span class="ls2d ws49">Application Program<span class="_ _1"></span>mers Interface (API) fo<span class="lsa ws4a">r eac<span class="_ _1"></span>h of the self test m<span class="_ _1"></span>odules, which </span></span></div><div class="t m0 x1 h6 y47 ff3 fs1 fc0 sc0 ls2a ws4b">are described in this applications <span class="ls2e ws4c">note<span class="_ _5"></span>. These ca<span class="_ _5"></span>n be used<span class="_ _5"></span> in custo<span class="_ _5"></span>mer’s ap<span class="_ _5"></span>plicatio<span class="_ _5"></span>n wherev<span class="_ _5"></span>er requir<span class="_ _5"></span>ed. </span></div><div class="t m0 x1 h6 y48 ff3 fs1 fc0 sc0 ls3 ws4d">On the assumption of trying VDE certification test, t<span class="_ _1"></span>he self<span class="ls2 ws4e"> test library functions are <span class="_ _1"></span>built as separate m<span class="_ _1"></span>odules. The </span></div><div class="t m0 x1 h6 y49 ff3 fs1 fc0 sc0 ls27 ws4f">CubeSuite+ test harness allows each<span class="_ _5"></span> of the tests functions to be selected in turn and ru<span class="_ _5"></span>n as a stand alone function. In </div><div class="t m0 x1 h6 y4a ff3 fs1 fc0 sc0 ls2b ws50">order to minimise the affects of the optimisation in the C <span class="ls2f ws51">compiler and minimise resources used, all of t<span class="_ _1"></span>he self test </span></div><div class="t m0 x1 h6 y4b ff3 fs1 fc0 sc0 ls2a ws52">library files have been written in<span class="_ _5"></span> assembler. The default <span class="ls1e ws53">build of the test h<span class="_ _5"></span>arness C files has been built with the </span></div><div class="t m0 x1 h6 y4c ff3 fs1 fc0 sc0 ls20 ws2a">optimisation set to “Non<span class="_ _5"></span>e” in the CubeSuite+. </div><div class="t m0 x1 h6 y4d ff3 fs1 fc0 sc0 ls2d ws54">The system hardware require<span class="_ _1"></span>ments includ<span class="ls30 ws55">e that at least two independe<span class="_ _1"></span>nt clock sources are available, e.g. Crystal / </span></div><div class="t m0 x1 h6 y4e ff3 fs1 fc0 sc0 ls18 ws56">ceramic oscillator and an independ<span class="_ _5"></span>ent oscillator or external<span class="ls28 ws57"> input source. The requirement is needed to pro<span class="_ _5"></span>vide an </span></div><div class="t m0 x1 h6 y4f ff3 fs1 fc0 sc0 ls31 ws58">independent cl<span class="_ _1"></span>ock reference <span class="_ _1"></span>for monit<span class="_ _1"></span>oring the system<span class="_ _1"></span> clock. The RL7<span class="_ _1"></span>8 is able to p<span class="_ _1"></span>rovide these <span class="_ _1"></span>using the Hig<span class="_ _1"></span>h speed </div><div class="t m0 x1 h6 y50 ff3 fs1 fc0 sc0 ls1d ws59">and Low speed intern<span class="_ _5"></span>al oscillators wh<span class="lsb wsb">ich are in<span class="_ _5"></span>dependent of each other. </span></div><div class="t m0 x1 h6 y51 ff3 fs1 fc0 sc0 ls30 ws55">Equally the application can provide a m<span class="_ _1"></span>ore accurate external <span class="ls2f ws5a">refe<span class="_ _1"></span>rence clock or external cr<span class="ls30 ws55">ystal/resonators for the m<span class="_ _1"></span>ain </span></span></div><div class="t m0 x1 h6 y52 ff3 fs1 fc0 sc0 ls32 ws44">system cl<span class="_ _1"></span>ock can equall<span class="_ _1"></span>y be used. </div><div class="t m0 x1 h3 y53 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y54 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y55 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y56 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y57 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h3 y58 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x8 h8 y59 ff2 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x9 h8 y5a ff2 fs1 fc0 sc0 ls2f ws5b">Figure 1 Self Test Library (STL) Confi<span class="_ _1"></span>guration </div><div class="t m0 x1 h3 y5b ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y5c ff3 fs1 fc0 sc0 ls6 ws5c">The following CPU self test functions are <span class="ls1c ws21">included in the RL78 self test library. </span></div><div class="t m0 x3 h5 y5d ff4 fs3 fc0 sc1 ls1 ws1"><span class="ff2 sc0"> <span class="_ _11"> </span><span class="ff1 fs1 ls3">Interrupt </span></span></div><div class="t m0 xa h6 y5e ff3 fs1 fc0 sc0 ls23 ws5d">Verifies the interrupt occ<span class="_ _1"></span>urren<span class="ls12 ws14">ce and function call for the sam<span class="_ _1"></span>e. </span></div><div class="t m0 x3 h5 y5f ff4 fs3 fc0 sc1 ls1 ws1"><span class="ff2 sc0"> <span class="_ _11"> </span><span class="ff1 fs1 ls2b">ADC </span></span></div><div class="t m0 xa h6 y60 ff3 fs1 fc0 sc0 ls13 ws5e">Verifies the int<span class="_ _1"></span>errupt occurre<span class="_ _1"></span>nce after an ADC is t<span class="_ _1"></span>riggered and t<span class="_ _1"></span>he value obtaine<span class="_ _1"></span>d after the </div><div class="t m0 xa h6 y61 ff3 fs1 fc0 sc0 ls33 ws1">conversion. </div><div class="t m0 x3 h5 y62 ff4 fs3 fc0 sc1 ls1 ws1"><span class="ff2 sc0"> <span class="_ _11"> </span><span class="ff1 fs1 ls2a">PORT </span></span></div><div class="t m0 xa h6 y63 ff3 fs1 fc0 sc0 ls10 ws12">Verifies the high and low states when the high or low value is written to the port. </div><div class="t m0 x3 h5 y64 ff4 fs3 fc0 sc1 ls1 ws1"><span class="ff2 sc0"> <span class="_ _11"> </span><span class="ff1 fs1 ls2f ws5b">SERIAL COMMUNICATI<span class="_ _1"></span>ON </span></span></div><div class="t m0 xa h6 y65 ff3 fs1 fc0 sc0 ls15 ws18">Verifies the uart interface co<span class="_ _1"></span>mm<span class="lsa wsa">unication of the serial port. </span></div><div class="t m0 xa h6 y66 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 xa h6 y67 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 xa h6 y68 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 xa h6 y69 ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 xa h6 y6a ff3 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 xa h6 y6b ff3 fs1 fc0 sc0 ls1 ws1"> </div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/625154bb74bc5c01059a218b/bg5.jpg"><div class="t m0 x1 h5 y2e ff2 fs3 fc0 sc0 ls21 ws2b">RL78 Family <span class="_ _6"> </span>IEC60730/60335 oriented Se<span class="ls22 ws2c">lf Test additional Library </span></div><div class="t m0 x1 h3 y2f ff1 fs1 fc0 sc0 ls23 ws2d">R01AN1296EJ01<span class="_ _1"></span>20 Rev. 1.20 <span class="_ _7"> </span> <span class="_ _3"> </span>Page 5 of 22 </div><div class="t m0 x1 h3 y4 ff1 fs1 fc0 sc0 ls3 ws3">May 16, 2014 <span class="_ _4"> </span><span class="ls1 ws1"> </span></div><div class="t m0 x1 h5 y30 ff2 fs3 fc0 sc0 ls2c ws45">2. <span class="_ _11"> </span>Self Test Library Functions </div><div class="t m0 x1 h3 y31 ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h5 y6c ff2 fs3 fc0 sc0 ls22 ws1">2.1 <span class="_ _12"> </span><span class="fs4 ls34 ws5f">Interrupt Tests </span></div><div class="t m0 x1 h3 y6d ff1 fs1 fc0 sc0 ls1 ws1"> </div><div class="t m0 x1 h6 y6e ff3 fs1 fc0 sc0 lsf ws60">This section describes Interrupt tests routines. The test harness contro<span class="_ _5"></span>l file ‘<span class="fc2 ls35 ws1">main<span class="_ _5"></span>.c<span class="_ _5"></span></span><span class="ls13 ws61">’ provides exam<span class="_ _1"></span>ples of the API <span class="_ _1"></span>for </span></div><div class="t m0 x1 h6 y6f ff3 fs1 fc0 sc0 ls12 ws62">each of the Interrupt tests using “C” language. </div><div class="t m0 x1 h6 y70 ff3 fs1 fc0 sc0 ls1e ws63">These modules test Interrupt operation. </div><div class="t m0 x1 h6 y71 ff3 fs1 fc0 sc0 ls36 ws64">The following Interrupts <span class="_ _5"></span>are tested: </div><div class="t m0 xb h6 y72 ff5 fs1 fc0 sc0 ls1 ws1">o<span class="ff1 ls3 ws65"> INTP0</span><span class="ff3"> </span></div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>