dm9000.zip

/* dm9000.c: Version 1.2 12/15/2003 A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. Copyright (C) 1997 Sten Wang This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match 06/22/2001 Support DM9801 progrmming E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 R17 = (R17 & 0xfff0) | NF + 3 E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 R17 = (R17 & 0xfff0) | NF v1.00 modify by simon 2001.9.5 change for kernel 2.4.x v1.1 11/09/2001 fix force mode bug v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>: Fixed phy reset. Added tx/rx 32 bit mode. Cleaned up for kernel merge. -------------------------------------- 12/15/2003 Initial port to u-boot by Sascha Hauer <saschahauer@web.de> 06/03/2008 Remy Bohmer <linux@bohmer.net> - Fixed the driver to work with DM9000A. (check on ISR receive status bit before reading the FIFO as described in DM9000 programming guide and application notes) - Added autodetect of databus width. - Made debug code compile again. - Adapt eth_send such that it matches the DM9000* application notes. Needed to make it work properly for DM9000A. - Adapted reset procedure to match DM9000 application notes (i.e. double reset) - some minor code cleanups These changes are tested with DM9000{A,EP,E} together with a 200MHz Atmel AT91SAM9261 core TODO: external MII is not functional, only internal at the moment. */ #include <common.h> #include <command.h> #include <net.h> #include <asm/io.h rel='nofollow' onclick='return false;'> #include <dm9000.h> #include "dm9000x.h" /* Board/System/Debug information/definition ---------------- */ /* #define CONFIG_DM9000_DEBUG */ #ifdef CONFIG_DM9000_DEBUG #define DM9000_DBG(fmt,args...) printf(fmt, ##args) #define DM9000_DMP_PACKET(func,packet,length) \ do { \ int i; \ printf("%s: length: %d\n", func, length); \ for (i = 0; i < length; i++) { \ if (i % 8 == 0) \ printf("\n%s: %02x: ", func, i); \ printf("%02x ", ((unsigned char *) packet)[i]); \ } printf("\n"); \ } while(0) #else #define DM9000_DBG(fmt,args...) #define DM9000_DMP_PACKET(func,packet,length) #endif /* Structure/enum declaration ------------------------------- */ typedef struct board_info { u32 runt_length_counter; /* counter: RX length < 64byte */ u32 long_length_counter; /* counter: RX length > 1514byte */ u32 reset_counter; /* counter: RESET */ u32 reset_tx_timeout; /* RESET caused by TX Timeout */ u32 reset_rx_status; /* RESET caused by RX Statsus wrong */ u16 tx_pkt_cnt; u16 queue_start_addr; u16 dbug_cnt; u8 phy_addr; u8 device_wait_reset; /* device state */ unsigned char srom[128]; void (*outblk)(volatile void *data_ptr, int count); void (*inblk)(void *data_ptr, int count); void (*rx_status)(u16 *RxStatus, u16 *RxLen); struct eth_device netdev; } board_info_t; static board_info_t dm9000_info; /* function declaration ------------------------------------- */ static int dm9000_probe(void); static u16 phy_read(int); static void phy_write(int, u16); static u8 DM9000_ior(int); static void DM9000_iow(int reg, u8 value); /* DM9000 network board routine ---------------------------- */ #define DM9000_outb(d,r) writeb(d, (volatile u8 *)(r)) #define DM9000_outw(d,r) writew(d, (volatile u16 *)(r)) #define DM9000_outl(d,r) writel(d, (volatile u32 *)(r)) #define DM9000_inb(r) readb((volatile u8 *)(r)) #define DM9000_inw(r) readw((volatile u16 *)(r)) #define DM9000_inl(r) readl((volatile u32 *)(r)) #ifdef CONFIG_DM9000_DEBUG static void dump_regs(void) { DM9000_DBG("\n"); DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0)); DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(1)); DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(2)); DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(3)); DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4)); DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(5)); DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(6)); DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(DM9000_ISR)); DM9000_DBG("\n"); } #endif static void dm9000_outblk_8bit(volatile void *data_ptr, int count) { int i; for (i = 0; i < count; i++) DM9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA); } static void dm9000_outblk_16bit(volatile void *data_ptr, int count) { int i; u32 tmplen = (count + 1) / 2; for (i = 0; i < tmplen; i++) DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA); } static void dm9000_outblk_32bit(volatile void *data_ptr, int count) { int i; u32 tmplen = (count + 3) / 4; for (i = 0; i < tmplen; i++) DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA); } static void dm9000_inblk_8bit(void *data_ptr, int count) { int i; for (i = 0; i < count; i++) ((u8 *) data_ptr)[i] = DM9000_inb(DM9000_DATA); } static void dm9000_inblk_16bit(void *data_ptr, int count) { int i; u32 tmplen = (count + 1) / 2; for (i = 0; i < tmplen; i++) ((u16 *) data_ptr)[i] = DM9000_inw(DM9000_DATA); } static void dm9000_inblk_32bit(void *data_ptr, int count) { int i; u32 tmplen = (count + 3) / 4; for (i = 0; i < tmplen; i++) ((u32 *) data_ptr)[i] = DM9000_inl(DM9000_DATA); } static void dm9000_rx_status_32bit(u16 *RxStatus, u16 *RxLen) { u32 tmpdata; DM9000_outb(DM9000_MRCMD, DM9000_IO); tmpdata = DM9000_inl(DM9000_DATA); *RxStatus = __le16_to_cpu(tmpdata); *RxLen = __le16_to_cpu(tmpdata >> 16); } static void dm9000_rx_status_16bit(u16 *RxStatus, u16 *RxLen) { DM9000_outb(DM9000_MRCMD, DM9000_IO); *RxStatus = __le16_to_cpu(DM9000_inw(DM9000_DATA)); *RxLen = __le16_to_cpu(DM9000_inw(DM9000_DATA)); } static void dm9000_rx_status_8bit(u16 *RxStatus, u16 *RxLen) { DM9000_outb(DM9000_MRCMD, DM9000_IO); *RxStatus = __le16_to_cpu(DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8)); *RxLen = __le16_to_cpu(DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8)); } /* Search DM9000 board, allocate space and register it */ int dm9000_probe(void) { u32 id_val; id_val = DM9000_ior(DM9000_VIDL); id_val |= DM9000_ior(DM9000_VIDH) << 8; id_val |= DM9000_ior(DM9000_PIDL) << 16; id_val |= DM9000_ior(DM9000_PIDH) << 24; if (id_val == DM9000_ID) { printf("dm9000 i/o: 0x%x, id: 0x%x \n", CONFIG_DM9000_BASE, id_val); return 0; } else { printf("dm9000 not found at 0x%08x id: 0x%08x\n", CONFIG_DM9000_BASE, id_val); return -1; } } /* General Purpose dm9000 reset routine */ static void dm9000_reset(void) { DM9000_DBG("resetting DM9000\n"); /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */ /* DEBUG: Make all GPIO0 outputs, all others inputs */ DM9000_iow(DM9000_GPCR, GPCR_GPIO0_OUT); /* Step 1: Power internal PHY by writing 0 to GPIO0 pin */ DM9000_iow(DM9000_GPR, 0); /* Step 2: Software reset */ DM9000_iow(DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST)); do { DM9000_DBG("resetting the DM9000, 1st reset\n"); udelay(25); /* Wait at least 20 us */ } while (DM9000_ior(DM9000_NCR) & 1); DM9000_iow(DM9000_NCR, 0); DM9000_iow(DM9000_NCR, (NCR_LBK_INT_MAC | NCR_RST)); /* Issue a second reset */ do { DM9000_DBG("resetting the DM9000, 2nd reset\n"); udelay(25); /* Wait at least 20 us */ } while (DM9000_ior(DM9000_NCR) & 1); /* Check whether the ethernet controller is present */ if ((DM9000_ior(DM9000_PIDL) != 0x0) || (DM9000_ior(DM9000_PIDH) != 0x90)) printf("ERROR: resetting DM900