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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250d1266caf59619220e2c0/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">Copyright ©<span class="_"> </span>2006-2010 ARM Limited. All rights reserved.</div><div class="t m0 x2 h2 y2 ff1 fs0 fc0 sc0 ls1 ws1">ARM DDI 0403Derrata 2010_Q3 (ID100710)</div><div class="t m0 x3 h3 y3 ff1 fs1 fc0 sc0 ls2 ws2">ARM</div><div class="t m0 x4 h4 y4 ff1 fs2 fc0 sc0 ls3 ws2">®</div><div class="t m0 x5 h3 y3 ff1 fs1 fc0 sc0 ls4 ws3">v7-M Architecture</div><div class="t m0 x6 h3 y5 ff1 fs1 fc0 sc0 ls5 ws2">Reference<span class="_"> </span>Manual</div><div class="t m0 x7 h5 y6 ff2 fs3 fc0 sc0 ls6 ws4">Errat<span class="_ _0"></span>a markup</div></div><div class="pi" data-data='{"ctm":[1.777778,0.000000,0.000000,1.777778,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250d1266caf59619220e2c0/bg2.jpg"><div class="t m0 x8 h6 y7 ff3 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x8 h2 y8 ff1 fs0 fc0 sc0 ls7 ws2">ii<span class="_ _1"> </span><span class="ff3 ls8 ws5">Copyright ©<span class="_"> </span>2006-2010 ARM Limited. All rights reserved.<span class="_ _2"> </span></span><span class="ls9">ARM DDI 0403Derrata 2010_Q3</span></div><div class="t m0 x9 h2 y9 ff3 fs0 fc0 sc0 ls0 ws2">Non-Confidential<span class="_ _3"> </span><span class="ff1 lsa">ID100710</span></div><div class="t m0 xa h7 ya ff2 fs4 fc0 sc0 lsb ws6">ARMv7-M Architecture Reference<span class="_"> </span>Manual</div><div class="t m0 xa h8 yb ff4 fs5 fc0 sc0 lsc ws7">Copyright ©<span class="_"> </span>2006-2010 ARM Limi<span class="lsd ws8">ted. All rights reserved.</span></div><div class="t m0 xa h6 yc ff2 fs0 fc0 sc0 lse ws9">Release Information</div><div class="t m0 xa h9 yd ff4 fs0 fc0 sc0 lsf wsa">The following changes have been made to this document.</div><div class="t m0 xa h6 ye ff2 fs0 fc0 sc0 ls8 ws5">Proprietary Notice</div><div class="t m0 xa h9 yf ff4 fs0 fc0 sc0 ls10 wsb">This ARM Architecture Refe<span class="_ _4"></span>rence Manual is protected <span class="ls11 wsc">by copyright and the practice or implementation of the </span></div><div class="t m0 xa h9 y10 ff4 fs0 fc0 sc0 ls12 wsd">information her<span class="_ _0"></span>ein may be protected by <span class="ls13 wse">one or more patents or pending applica<span class="ls14 wsf">tions. No part of this ARM Architecture </span></span></div><div class="t m0 xa h9 y11 ff4 fs0 fc0 sc0 ls3 ws10">Reference Manual <span class="_ _4"></span>may be reproduced in<span class="ls15 ws11"> any form by <span class="ls16 ws12">any means without the express <span class="ls1 ws13">prior written permission of ARM. </span></span></span></div><div class="t m0 xa ha y12 ff5 fs0 fc0 sc0 ls0 ws14">No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this ARM </div><div class="t m0 xa h9 y13 ff5 fs0 fc0 sc0 ls17 ws15">Architecture Reference Manual<span class="ff4 ls3 ws2">.</span></div><div class="t m0 xa h9 y14 ff4 fs0 fc0 sc0 ls16 ws16">Y<span class="_ _5"></span>our access to the information in this ARM Architecture Re<span class="lse ws17">ference Manual is conditiona<span class="ls14 ws18">l upon your acceptance that you </span></span></div><div class="t m0 xa h9 y15 ff4 fs0 fc0 sc0 ls14 ws19">will not use or permit others to use the <span class="ls18 ws1a">information fo<span class="ls19 ws1b">r the purposes of determining whether implementations of the ARM </span></span></div><div class="t m0 xa h9 y16 ff4 fs0 fc0 sc0 ls1a ws1c">architecture infringe any thir<span class="_ _0"></span>d party patents.</div><div class="t m0 xa h9 y17 ff4 fs0 fc0 sc0 ls1b ws1d">This ARM Architecture Reference Manual <span class="ls1c ws1e">is provided “as is”. ARM makes no re<span class="ls14 ws1f">presentations or <span class="_ _0"></span>warranties, either </span></span></div><div class="t m0 xa h9 y18 ff4 fs0 fc0 sc0 ls9 ws20">express or implied, included<span class="lsa ws21"> but not limited to, warranties of merchantab<span class="_ _4"></span><span class="ls1 ws13">ility<span class="_ _0"></span>, fitness for a particular purpose, or </span></span></div><div class="t m0 xa h9 y19 ff4 fs0 fc0 sc0 ls1d ws22">non-infringement, <span class="_ _0"></span>that the content of th<span class="ls0 ws23">is ARM Architecture Reference Manual is <span class="ls1e ws24">suitable for any particular purpose o<span class="_ _0"></span>r </span></span></div><div class="t m0 xa h9 y1a ff4 fs0 fc0 sc0 ls8 ws25">that any practice or impl<span class="ls3 ws26">ementation of the contents of th<span class="ls14 ws27">e A<span class="_ _4"></span>RM Architecture Reference Manu<span class="ls1 ws28">al will not infringe any third </span></span></span></div><div class="t m0 xa h9 y1b ff4 fs0 fc0 sc0 ls1f ws29">party patents, copyrights<span class="_ _0"></span>, trade secrets, or other rights.</div><div class="t m0 xa h9 y1c ff4 fs0 fc0 sc0 ls20 ws2a">This ARM Architectur<span class="_ _4"></span>e Reference Manual may inc<span class="_ _4"></span>lude <span class="ls10 ws2b">technical inaccuracies or typographical errors.</span></div><div class="t m0 xa h9 y1d ff4 fs0 fc0 sc0 lse ws2b">T<span class="_ _0"></span>o the extent not prohibited by law<span class="_ _5"></span>, <span class="ls1 ws2c">in no event will ARM be liable for any <span class="ws2d">damages, including without limitation any </span></span></div><div class="t m0 xa h9 y1e ff4 fs0 fc0 sc0 ls1 ws2d">direct loss, lost revenue, lost profits or<span class="_ _4"></span><span class="ws13"> data, special, indirect, consequential, </span>inci<span class="_ _4"></span>dental or punitive damages, however </div><div class="t m0 xa h9 y1f ff4 fs0 fc0 sc0 ls0 ws2e">caused and regardless of the th<span class="lsa ws21">eory of liability<span class="_ _0"></span>, arising out <span class="_ _4"></span>of<span class="ls14 ws2f"> or related to any furnishing<span class="ls8 ws30">, practicing, modifying or any </span></span></span></div><div class="t m0 xa h9 y20 ff4 fs0 fc0 sc0 ls15 ws11">use of this ARM Architecture Refe<span class="_ _4"></span>rence Manual, even if <span class="ls9 ws20">ARM has bee<span class="_ _4"></span>n advised of the poss<span class="_ _0"></span>i<span class="_ _4"></span>bility of such damages.</span></div><div class="t m0 xa h9 y21 ff4 fs0 fc0 sc0 ls21 ws31">W<span class="_ _5"></span>ords and logos marked with </div><div class="t m0 xb hb y22 ff4 fs6 fc0 sc0 ls3 ws2">®</div><div class="t m0 xc h9 y23 ff4 fs0 fc0 sc0 ls22 ws32"> or </div><div class="t m0 xd hb y22 ff4 fs6 fc0 sc0 ls3 ws2">™</div><div class="t m0 xe h9 y23 ff4 fs0 fc0 sc0 ls0 ws33"> are registered trademarks or trademarks of<span class="ls23 ws34"> ARM Limited, except as<span class="_ _0"></span> otherwise stated </span></div><div class="t m0 xa h9 y24 ff4 fs0 fc0 sc0 ls9 ws20">below in this proprietary notic<span class="ls1d ws35">e. Other brands and names mentioned her<span class="_ _0"></span>ein <span class="ls14 ws2f">may be the trademarks of their respective </span></span></div><div class="t m0 xa h9 y25 ff4 fs0 fc0 sc0 ls1c ws2">owners.</div><div class="t m0 xa h9 y26 ff4 fs0 fc0 sc0 ls1d ws2">Copyright </div><div class="t m0 xf hb y27 ff4 fs6 fc0 sc0 ls3 ws2">©</div><div class="t m0 x10 h9 y28 ff4 fs0 fc0 sc0 ls24 ws36"> 2006-2010 ARM<span class="_ _0"></span> Limited</div><div class="t m0 xa h9 y29 ff4 fs0 fc0 sc0 ls24 ws36">1<span class="_ _0"></span>10 Fulbourn Road Cambridg<span class="_ _0"></span>e, England CB1 9NJ</div><div class="t m0 x11 hc y2a ff2 fs7 fc0 sc0 ls25 ws37">Chang<span class="_ _0"></span>e history</div><div class="t m0 x12 hc y2b ff2 fs7 fc0 sc0 ls26 ws2">Date<span class="_ _6"> </span>Issue<span class="_ _7"> </span>Confidentiality<span class="_ _8"> </span>Change</div><div class="t m0 x12 hd y2c ff4 fs7 fc0 sc0 ls27 ws38">June 2006<span class="_ _9"> </span>A<span class="_ _a"> </span>Non-confidential<span class="_ _b"> </span>Initial release</div><div class="t m0 x12 hd y2d ff4 fs7 fc0 sc0 ls28 ws39">July 2007<span class="_ _c"> </span>B<span class="_ _d"> </span>Non-confidential<span class="_ _b"> </span>Second release, <span class="ls29 ws3a">errata and changes <span class="_ _4"></span><span class="ls2a ws2">documented <span class="ls2b">separately</span></span></span></div><div class="t m0 x12 hd y2e ff4 fs7 fc0 sc0 ls2c ws3b">September 2008<span class="_ _e"> </span>C<span class="_ _d"> </span>Non-confidential, </div><div class="t m0 x13 hd y2f ff4 fs7 fc0 sc0 ls2d ws3c">Restrict<span class="_ _4"></span>ed Access</div><div class="t m0 x14 hd y2e ff4 fs7 fc0 sc0 ls2e ws3d">Options for additional wa<span class="ls2f ws3e">tchpoint based tr<span class="_ _0"></span>ace in the DWT<span class="_ _0"></span>, plus errata </span></div><div class="t m0 x14 hd y2f ff4 fs7 fc0 sc0 ls2c ws3b">updates and clarifications.</div><div class="t m0 x12 hd y30 ff4 fs7 fc0 sc0 ls30 ws3f">12 February 2010<span class="_ _f"> </span>D<span class="_ _a"> </span>Non-confidential<span class="_ _b"> </span>Fourth release, adds<span class="ls27 ws38"> DSP and Flo<span class="_ _4"></span>ating-point extensions, and extensive </span></div><div class="t m0 x14 hd y31 ff4 fs7 fc0 sc0 ls30 ws3f">clarifications and reorganization.</div><div class="t m0 x12 hd y32 ff6 fs7 fc0 sc0 ls29 ws3a">Novemb<span class="ff4">er 201</span>0 D<span class="ff4">errata 2010_Q3</span> N<span class="ff4">on-confidential</span> M<span class="ff4">arked-up e<span class="ls2c ws3b">rrata PDF<span class="_ _0"></span>, see page iii for mo<span class="_ _4"></span>re information.</span></span></div></div><div class="pi" data-data='{"ctm":[1.777778,0.000000,0.000000,1.777778,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250d1266caf59619220e2c0/bg3.jpg"><div class="t m0 x15 h6 y7 ff3 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x16 h2 y8 ff1 fs0 fc0 sc0 ls9 ws2">ARM DDI 0403Derrata 2010_Q3<span class="_ _10"> </span><span class="ff3 ls19 ws40">Copyright ©<span class="_"> </span>2006-2010 ARM Limited. All rights reserved.<span class="_ _11"> </span></span><span class="ls7">iii</span></div><div class="t m0 x16 h2 y9 ff1 fs0 fc0 sc0 ls15 ws2">ID100710<span class="_ _3"> </span><span class="ff3 ls31">Non-Confidential</span></div><div class="t m0 x17 h9 y33 ff4 fs0 fc0 sc0 lsf wsa">Restricted Rights Legend: Use, duplication <span class="_ _0"></span><span class="ls31 ws41">or disclosure<span class="_ _4"></span> by the United States Gove<span class="ls10 ws2b">rnme<span class="_ _4"></span>nt is subject to the restrictions </span></span></div><div class="t m0 x17 h9 y34 ff4 fs0 fc0 sc0 ls32 ws42">set forth in DF<span class="_ _5"></span>ARS 252.227-7013 (c)(1)(ii) an<span class="_ _0"></span>d F<span class="_ _0"></span>AR 52.227-19.</div><div class="t m0 x17 ha y35 ff5 fs0 fc0 sc0 ls1 ws13">This document is Non-Confidential but <span class="_ _4"></span>any disclosure by you is subject to you pr<span class="ls8 ws43">oviding notice to and the </span></div><div class="t m0 x17 h9 y36 ff5 fs0 fc0 sc0 lse ws44">acceptance by the recipient of, the conditions set <span class="_ _4"></span>out above<span class="ff4 ls3 ws2">.</span></div><div class="t m0 x17 h9 y37 ff4 fs0 fc0 sc0 ls0 ws2e">In this document, where the te<span class="ls1 ws13">rm ARM is used <span class="_ _4"></span>to refer to the company it <span class="ls33 ws45">means “ARM or any of <span class="ls14 ws2f">its subsidiaries as </span></span></span></div><div class="t m0 x17 h9 y38 ff4 fs0 fc0 sc0 ls34 ws2">appropriate”.</div><div class="c x17 y39 w2 he"><div class="t m0 x18 hf y3a ff5 fs8 fc0 sc0 ls35 ws2">Note</div></div><div class="t m0 x17 h9 y3b ff4 fs0 fc0 sc0 ls0 ws23"> <span class="_ _12"></span>The term ARM is also used to refer to<span class="_ _4"></span><span class="ls3 ws10"> versions of the AR<span class="_ _4"></span>M architecture, for ex<span class="ls1e ws46">ample ARMv6 refers to version 6 of<span class="_ _0"></span> the </span></span></div><div class="t m0 x17 h9 y3c ff4 fs0 fc0 sc0 lse ws44">ARM architecture. The conte<span class="_ _4"></span>xt makes it clear<span class="ls9 ws2d"> when the term is used in <span class="_ _4"></span>this way<span class="_ _0"></span>.</span></div><div class="c x17 y3d w2 he"><div class="t m0 x18 hf y3a ff5 fs8 fc0 sc0 ls35 ws2">Note</div></div><div class="t m0 x17 h9 y3e ff4 fs0 fc0 sc0 ls15 ws11"> <span class="_ _12"></span>For this errata PDF<span class="_ _5"></span>, pages i to iii <span class="_ _4"></span>have <span class="ls10 ws2b">been replaced, by an edit to the PDF<span class="_ _5"></span>, to in<span class="wsb">clude <span class="_ _4"></span>this note, and to show this errata </span></span></div><div class="t m0 x17 h9 y3f ff4 fs0 fc0 sc0 ls19 ws47">PDF in the Change History table. The rema<span class="ls3 ws48">inder of the PDF is the original releas<span class="_ _4"></span><span class="ls1e ws49">e PDF of issue D of the document, with </span></span></div><div class="t m0 x17 h9 y40 ff4 fs0 fc0 sc0 ls1f ws29">errata markups added.</div></div><div class="pi" data-data='{"ctm":[1.777778,0.000000,0.000000,1.777778,0.000000,0.000000]}'></div></div>
<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250d1266caf59619220e2c0/bg4.jpg"><div class="t m0 x8 h6 y41 ff7 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x8 h2 y42 ff8 fs0 fc0 sc0 ls7 ws2">iv<span class="_ _13"> </span><span class="ff7 ls8 ws5">Copyright ©<span class="_"> </span>2006-2008, 2010 ARM Limited. All rights reserved.<span class="_ _14"> </span></span><span class="ls19 ws40">ARM DDI 0403D</span></div><div class="t m0 x19 h2 y43 ff7 fs0 fc0 sc0 ls3 ws4a">Non-Confidential, Unrestricted Access<span class="_ _15"> </span><span class="ff8 lsa ws2">ID021310</span></div></div><div class="pi" data-data='{"ctm":[1.777778,0.000000,0.000000,1.777778,-49.777778,-172.444444]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250d1266caf59619220e2c0/bg5.jpg"><div class="t m0 x16 h2 y44 ff8 fs0 fc0 sc0 ls0 ws0">ARM DDI 0403D<span class="_ _14"> </span><span class="ff7 ws40">Copyright ©<span class="_"> </span>2006-2008, 2010 ARM Limited. All rights reserved.<span class="_ _16"> </span></span><span class="ls3 ws2">v</span></div><div class="t m0 x16 h2 y45 ff8 fs0 fc0 sc0 ls15 ws2">ID021310<span class="_ _15"> </span><span class="ff7 ls19 ws40">Non-Confidential, Unrestricted Access</span></div><div class="t m0 x16 h10 y46 ff8 fs9 fc0 sc0 ls3 ws2">Content<span class="_ _0"></span>s</div><div class="t m0 x16 h11 y47 ff9 fs9 fc0 sc0 ls36 ws4b">ARMv7-M Architecture Reference<span class="_"> </span>Manual</div><div class="t m0 x1a h12 y48 ff9 fsa fc0 sc0 ls37 ws2">Preface</div><div class="t m0 x1b h13 y49 ff8 fs5 fc0 sc0 ls38 ws4c">About this manual <span class="_ _17"> </span>............<span class="ls39 ws2">..........................................<span class="_ _0"></span>......................<span class="ls3a ws4d">..<span class="_"> </span> xxii</span></span></div><div class="t m0 x1b h13 y4a ff8 fs5 fc0 sc0 ls3b ws4e">Using this manual <span class="_"> </span>....................<span class="_ _0"></span>...........<span class="ls3c ws2">.........<span class="_ _0"></span>...................<span class="_ _0"></span>................... xxiii</span></div><div class="t m0 x1b h13 y4b ff8 fs5 fc0 sc0 ls3d ws4f">Conventions ..........<span class="ls39 ws2">..........................................<span class="_ _0"></span>............................<span class="lsd ws50">......<span class="_"> </span> xxvi</span></span></div><div class="t m0 x1b h13 y4c ff8 fs5 fc0 sc0 ls3e ws51">Further reading <span class="_"> </span>.....<span class="ls39 ws2">..........................................<span class="_ _0"></span>............................<span class="ls3f ws52">......<span class="_ _4"></span> xxvii</span></span></div><div class="t m0 x1b h13 y4d ff8 fs5 fc0 sc0 ls40 ws53">Feedback ...........<span class="_ _0"></span>.........................<span class="_ _0"></span>.........................<span class="_ _0"></span>.......................<span class="_ _0"></span>.....<span class="_ _18"></span> <span class="_ _12"></span>xxviii</div><div class="t m0 x16 h14 y4e ff9 fsb fc0 sc0 ls41 ws54">Part<span class="_"> </span>A<span class="_ _19"> </span>Application Le<span class="ls42 ws55">vel Architecture</span></div><div class="t m0 x1c h12 y4f ff9 fsa fc0 sc0 ls43 ws2">Chapter<span class="_"> </span>1<span class="_ _1a"> </span>Introduction</div><div class="t m0 x1a h13 y50 ff8 fs5 fc0 sc0 ls44 ws56">A1.1<span class="_ _1b"> </span>About the ARMv7 architecture, and ar<span class="ls3b ws57">chitecture profiles <span class="_ _1c"></span>..............<span class="_ _0"></span>.<span class="_ _1d"> </span> A1-32</span></div><div class="t m0 x1a h13 y51 ff8 fs5 fc0 sc0 ls45 ws58">A1.2<span class="_ _1b"> </span>The ARMv7-M<span class="_ _0"></span> architecture profile <span class="_ _17"> </span>....<span class="_ _0"></span>......................<span class="_ _0"></span>.......................<span class="_ _18"> </span> A1-33</div><div class="t m0 x1a h13 y52 ff8 fs5 fc0 sc0 ls46 ws59">A1.3<span class="_ _1b"> </span>Architecture extensions <span class="_ _4"></span>..................<span class="_ _0"></span><span class="ls3c ws5a">.................<span class="_ _0"></span>......................<span class="_ _0"></span>.........<span class="_ _1d"> </span> A1-<span class="_ _0"></span>35</span></div><div class="t m0 x1c h12 y53 ff9 fsa fc0 sc0 ls47 ws5b">Chapter<span class="_"> </span>2<span class="_ _1a"> </span>Application Level Programmers’ Model</div><div class="t m0 x1a h13 y54 ff8 fs5 fc0 sc0 ls48 ws5c">A2.1<span class="_ _1b"> </span>About the application level programme<span class="_ _4"></span><span class="ls49 ws5d">rs’ model <span class="_ _1d"> </span>.......<span class="_ _0"></span>....................<span class="_ _18"> </span> A2-38</span></div><div class="t m0 x1a h13 y55 ff8 fs5 fc0 sc0 ls4a ws5e">A2.2<span class="_ _1b"> </span>ARM processor data types and arithmet<span class="ls4b ws5f">ic ..............<span class="ls4c ws2">...........<span class="ls38 ws60">............<span class="_ _1d"> </span> A2-39</span></span></span></div><div class="t m0 x1a h13 y56 ff8 fs5 fc0 sc0 ls3b ws4e">A2.3<span class="_ _1b"> </span>Registers and execution state <span class="_ _4"></span>......................<span class="_ _0"></span>......................<span class="_ _0"></span>............<span class="_ _1d"> </span> A2-46</div><div class="t m0 x1a h13 y57 ff8 fs5 fc0 sc0 ls4d ws61">A2.4<span class="_ _1b"> </span>Exceptions, faults and interrupts <span class="_ _18"> </span>....<span class="ls39 ws2">....................................<span class="ls38 ws60">............<span class="_ _1d"> </span> A2-50</span></span></div><div class="t m0 x1a h13 y58 ff8 fs5 fc0 sc0 ls4e ws62">A2.5<span class="_ _1b"> </span>Coprocessor support <span class="_ _1c"></span>.....<span class="ls39 ws2">..........................................<span class="_ _0"></span>...........<span class="ls38 ws60">............<span class="_ _1d"> </span> A2-52</span></span></div><div class="t m0 x1a h13 y59 ff8 fs5 fc0 sc0 ls4f ws63">A2.6<span class="_ _1b"> </span>The optional Floating-point extension <span class="_ _1d"> </span>....<span class="_ _0"></span>............................<span class="_ _0"></span>............<span class="_ _1d"> </span> A2-53</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d 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