STM32 UCOSII操作系统

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  • 2022-04-11 05:00
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STM32单片机uCOSII操作系统,经过测试很好用
STM32 UCOSII操作系统.rar
  • STM32 UCOSII操作系统
  • MALLOC
  • malloc.c
    5.2KB
  • malloc.h
    2.3KB
  • HARDWARE
  • IIC
  • myiic.c
    3KB
  • myiic.h
    1.3KB
  • TPAD
  • tpad.h
    444B
  • tpad.c
    4.3KB
  • KEY
  • key.h
    1.1KB
  • key.c
    1.8KB
  • BEEP
  • beep.h
    651B
  • beep.c
    1KB
  • LCD
  • lcd.c
    80.6KB
  • font.h
    15.8KB
  • lcd.h
    9.1KB
  • 24CXX
  • 24cxx.c
    3.4KB
  • 24cxx.h
    1.5KB
  • TIMER
  • timer.c
    7.4KB
  • timer.h
    180B
  • SRAM
  • sram.c
    4.4KB
  • sram.h
    371B
  • LED
  • led.h
    638B
  • led.c
    1.3KB
  • TOUCH
  • ctiic.c
    3.2KB
  • ctiic.h
    1.3KB
  • ott2001a.h
    2KB
  • touch.c
    15.1KB
  • touch.h
    2.9KB
  • ott2001a.c
    4.7KB
  • CORE
  • core_cm3.h
    83.7KB
  • startup_stm32f10x_hd.s
    15.1KB
  • core_cm3.c
    16.9KB
  • startup_stm32f10x_md.s
    12.5KB
  • SYSTEM
  • sys
  • sys.c
    616B
  • sys.h
    2.7KB
  • delay
  • delay.c
    4.9KB
  • delay.h
    1.5KB
  • usart
  • usart.c
    5KB
  • usart.h
    1.3KB
  • OBJ
  • UCOSII-3.hex
    167.9KB
  • USER
  • stm32f10x_conf.h
    3.2KB
  • stm32f10x.h
    619.1KB
  • UCOSII-3.Opt
    4.1KB
  • stm32f10x_it.c
    2.4KB
  • UCOSII-3.Uv2
    5.2KB
  • system_stm32f10x.c
    35.7KB
  • system_stm32f10x.h
    2KB
  • stm32f10x_it.h
    1.9KB
  • main.c
    10.7KB
  • STM32F10x_FWLib
  • inc
  • stm32f10x_bkp.h
    7.4KB
  • stm32f10x_usart.h
    16.2KB
  • stm32f10x_exti.h
    6.7KB
  • stm32f10x_pwr.h
    4.3KB
  • stm32f10x_gpio.h
    19.7KB
  • stm32f10x_dac.h
    14.9KB
  • stm32f10x_i2c.h
    29.3KB
  • stm32f10x_sdio.h
    21.4KB
  • stm32f10x_rcc.h
    29.7KB
  • stm32f10x_cec.h
    6.4KB
  • stm32f10x_dma.h
    20.3KB
  • stm32f10x_dbgmcu.h
    3.7KB
  • stm32f10x_crc.h
    2.1KB
  • stm32f10x_rtc.h
    3.8KB
  • stm32f10x_tim.h
    51.2KB
  • stm32f10x_adc.h
    21.2KB
  • stm32f10x_can.h
    26.9KB
  • stm32f10x_wwdg.h
    2.9KB
  • stm32f10x_fsmc.h
    26.4KB
  • misc.h
    8.8KB
  • stm32f10x_iwdg.h
    3.7KB
  • stm32f10x_spi.h
    17.3KB
  • stm32f10x_flash.h
    24.8KB
  • src
  • stm32f10x_dac.c
    18.6KB
  • stm32f10x_flash.c
    61.1KB
  • stm32f10x_rtc.c
    8.4KB
  • stm32f10x_pwr.c
    8.6KB
  • stm32f10x_sdio.c
    28.3KB
  • stm32f10x_rcc.c
    50.1KB
  • stm32f10x_iwdg.c
    4.8KB
内容介绍
/** ****************************************************************************** * @file stm32f10x_tim.c * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief This file provides all the TIM firmware functions. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2> ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x_tim.h" #include "stm32f10x_rcc.h" /** @addtogroup STM32F10x_StdPeriph_Driver * @{ */ /** @defgroup TIM * @brief TIM driver modules * @{ */ /** @defgroup TIM_Private_TypesDefinitions * @{ */ /** * @} */ /** @defgroup TIM_Private_Defines * @{ */ /* ---------------------- TIM registers bit mask ------------------------ */ #define SMCR_ETR_Mask ((uint16_t)0x00FF) #define CCMR_Offset ((uint16_t)0x0018) #define CCER_CCE_Set ((uint16_t)0x0001) #define CCER_CCNE_Set ((uint16_t)0x0004) /** * @} */ /** @defgroup TIM_Private_Macros * @{ */ /** * @} */ /** @defgroup TIM_Private_Variables * @{ */ /** * @} */ /** @defgroup TIM_Private_FunctionPrototypes * @{ */ static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, uint16_t TIM_ICFilter); static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, uint16_t TIM_ICFilter); static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, uint16_t TIM_ICFilter); static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, uint16_t TIM_ICFilter); /** * @} */ /** @defgroup TIM_Private_Macros * @{ */ /** * @} */ /** @defgroup TIM_Private_Variables * @{ */ /** * @} */ /** @defgroup TIM_Private_FunctionPrototypes * @{ */ /** * @} */ /** @defgroup TIM_Private_Functions * @{ */ /** * @brief Deinitializes the TIMx peripheral registers to their default reset values. * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. * @retval None */ void TIM_DeInit(TIM_TypeDef* TIMx) { /* Check the parameters */ assert_param(IS_TIM_ALL_PERIPH(TIMx)); if (TIMx == TIM1) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); } else if (TIMx == TIM2) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); } else if (TIMx == TIM3) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); } else if (TIMx == TIM4) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); } else if (TIMx == TIM5) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); } else if (TIMx == TIM6) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); } else if (TIMx == TIM7) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); } else if (TIMx == TIM8) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); } else if (TIMx == TIM9) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE); } else if (TIMx == TIM10) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE); } else if (TIMx == TIM11) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE); } else if (TIMx == TIM12) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE); } else if (TIMx == TIM13) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE); } else if (TIMx == TIM14) { RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE); } else if (TIMx == TIM15) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE); } else if (TIMx == TIM16) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE); } else { if (TIMx == TIM17) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE); } } } /** * @brief Initializes the TIMx Time Base Unit peripheral according to * the specified parameters in the TIM_TimeBaseInitStruct. * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef * structure that contains the configuration information for the * specified TIM peripheral. * @retval None */ void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) { uint16_t tmpcr1 = 0; /* Check the parameters */ assert_param(IS_TIM_ALL_PERIPH(TIMx)); assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); tmpcr1 = TIMx->CR1; if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM2) || (TIMx == TIM3)|| (TIMx == TIM4) || (TIMx == TIM5)) { /* Select the Counter Mode */ tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; } if((TIMx != TIM6) && (TIMx != TIM7)) { /* Set the clock division */ tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD)); tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; } TIMx->CR1 = tmpcr1; /* Set the Autoreload value */ TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; /* Set the Prescaler value */ TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; if ((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| (TIMx == TIM16) || (TIMx == TIM17)) { /* Set the Repetition Counter value */ TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; } /* Generate an update event to reload the Prescaler and the Repetition counter values immediately */ TIMx->EGR = TIM_PSCReloadMode_Immediate; } /** * @brief Initializes the TIMx Channel1 according to the specified * parameters in the TIM_OCInitStruct. * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. * @param TIM_OCInitStru
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