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<div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/628c8a1d16e0ca7141659c0d/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">SOLOMON SYSTECH </div><div class="t m0 x1 h3 y2 ff1 fs1 fc0 sc0 ls1 ws1">SEMICONDUCTOR TECHNICAL DATA<span class="ff2 ls2 ws2"> </span></div><div class="t m0 x2 h4 y3 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x3 h5 y4 ff4 fs3 fc0 sc0 ls3 ws3">This document contains information <span class="ls4 ws4">on a new product. Specifications and in<span class="ls5 ws5">formation herein are subject to change </span></span></div><div class="t m0 x3 h5 y5 ff4 fs3 fc0 sc0 ls6 ws6">without notice. </div><div class="t m0 x3 h5 y6 ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 x3 h6 y7 ff5 fs3 fc0 sc0 ls4 ws2">http://www.solomon-systech.com </div><div class="t m0 x4 h7 y8 ff2 fs3 fc0 sc0 ls7 ws2">SSD2828QN4<span class="ff1 ls2"> </span></div><div class="t m0 x5 h5 y9 ff4 fs3 fc0 sc0 ls8 ws7">Rev 1.3 <span class="_ _0"> </span>P 1/168 <span class="_ _1"> </span>Mar 2013 </div><div class="t m0 x6 h7 ya ff4 fs3 fc0 sc0 ls9 ws2">Copyright <span class="ff6 ls2">©</span><span class="lsa ws8"> 2013 <span class="ff1 lsb ws9">Solomon S<span class="_ _2"></span>ystech Limited</span></span><span class="ls2"> </span></div><div class="t m0 x7 h5 yb ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h8 yc ff4 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 yd ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 ye ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 yf ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y10 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y11 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y12 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y13 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y14 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y15 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y16 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y17 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y18 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y19 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1a ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1b ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1c ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1d ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1e ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y1f ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y20 ff3 fs2 fc0 sc0 lsc ws2"> </div><div class="t m0 x1 h4 y21 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x8 h9 y22 ff2 fs0 fc0 sc0 ls2 ws2"> </div><div class="t m0 x8 h9 y23 ff2 fs0 fc0 sc0 ls2 ws2"> </div><div class="t m0 x8 h9 y24 ff2 fs0 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 ha y25 ff2 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y26 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y27 ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y28 ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y29 ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y2a ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y2b ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y2c ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y2d ff2 fs1 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 h4 y2e ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 x9 hc y2f ff2 fs4 fc0 sc0 lsd ws2">SSD2828QN4 </div><div class="t m0 xa hd y30 ff7 fs5 fc0 sc0 lse wsa">Advance Information </div><div class="t m0 xb he y31 ff2 fs6 fc0 sc0 lsf wsb">MIPI Master Bridge </div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
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<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/628c8a1d16e0ca7141659c0d/bg2.jpg"><div class="t m0 x1 h4 y32 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y33 ff1 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y34 ff1 fs3 fc0 sc0 ls10 ws2">SSD2828QN4 <span class="_ _3"> </span><span class="ff4 ls8 ws7">Rev 1.3 <span class="_ _4"> </span>P 2/168 <span class="_ _1"> </span>Mar 2013<span class="_ _5"> </span> <span class="_ _6"> </span></span><span class="ls11 wsc">Solomo<span class="_ _7"></span>n Systec<span class="_ _7"></span>h</span></div><div class="t m0 x1 h5 y35 ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 xd ha y36 ff2 fs2 fc0 sc0 ls12 wsd">Appendix 1: IC Revisi<span class="_ _7"></span>on history of SSD2828 Speci<span class="_ _7"></span>fication </div><div class="t m0 x1 ha y37 ff2 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 xe ha y38 ff2 fs2 fc0 sc0 ls2 wse">Version Change <span class="_ _8"></span>Items <span class="_ _9"> </span>Effective <span class="_ _8"></span>Date </div><div class="t m0 xf h4 y39 ff3 fs2 fc0 sc0 ls13 wsf">1.0 <span class="_ _a"> </span>Initial release of Advance Information <span class="_ _b"> </span>16-Oct-12 </div><div class="t m0 xf h8 y3a ff3 fs2 fc0 sc0 ls14 ws10">1.1 -<span class="ff4 ls2 ws2"> <span class="_ _c"> </span></span><span class="ls15 ws11">Modify the <span class="_ _7"></span>descriptio<span class="_ _7"></span>n of END and<span class="_ _7"></span> CO (Section <span class="_ _7"></span>8.1.38) </span></div><div class="t m0 x10 h8 y3b ff3 fs2 fc0 sc0 ls2 ws2">-<span class="ff4"> <span class="_ _c"> </span></span><span class="ls16 ws12">Modify the timing<span class="_ _2"></span> for data latch in RGB timing (Section 14.4) </span></div><div class="t m0 x11 h4 y3a ff3 fs2 fc0 sc0 ls17 ws2">13-Dec-12 </div><div class="t m0 xf h8 y3c ff3 fs2 fc0 sc0 ls14 ws10">1.2 -<span class="ff4 ls2 ws2"> <span class="_ _c"> </span></span><span class="ls18 ws13">Specify the prefix T in RGB timing (Sectio<span class="_ _2"></span>n14.4) <span class="_ _d"> </span>09-Jan-13 </span></div><div class="t m0 xf h8 y3d ff3 fs2 fc0 sc0 ls14 ws10">1.3 -<span class="ff4 ls2 ws2"> <span class="_ _c"> </span></span><span class="ls19 ws14">Modify R<span class="_ _7"></span>GB color arra<span class="_ _7"></span>ngement (Ta<span class="_ _7"></span>ble 6-3) </span></div><div class="t m0 x10 h8 y3e ff3 fs2 fc0 sc0 ls2 ws2">-<span class="ff4"> <span class="_ _c"> </span></span><span class="ls1a ws15">Update power up and powe<span class="_ _7"></span>r down sequence (Sectio<span class="_ _7"></span>n 15 & Section 16) </span></div><div class="t m0 x10 h8 y3f ff3 fs2 fc0 sc0 ls2 ws2">-<span class="ff4"> <span class="_ _c"> </span></span><span class="ls17 ws16">Include current<span class="_ _7"></span> consum<span class="_ _7"></span>ption of using<span class="_ _7"></span> VDDIO=3.3V <span class="_ _7"></span>(Section 13) </span></div><div class="t m0 x11 h4 y3d ff8 fs2 fc0 sc0 ls1b ws2">27<span class="ff3">-</span>Mar<span class="ff3">-13 </span></div><div class="t m0 x1 ha y40 ff2 fs2 fc0 sc0 ls2 ws2"> </div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/628c8a1d16e0ca7141659c0d/bg3.jpg"><div class="t m0 x1 h4 y32 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y33 ff1 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y34 ff1 fs3 fc0 sc0 ls10 ws2">SSD2828QN4 <span class="_ _3"> </span><span class="ff4 ls8 ws7">Rev 1.3 <span class="_ _4"> </span>P 3/168 <span class="_ _1"> </span>Mar 2013<span class="_ _5"> </span> <span class="_ _6"> </span></span><span class="ls11 wsc">Solomo<span class="_ _7"></span>n Systec<span class="_ _7"></span>h</span></div><div class="t m0 x1 h5 y35 ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 x1 hb y41 ff2 fs1 fc0 sc0 ls1c ws2">CONTENTS </div><div class="t m0 x1 hb y42 ff2 fs1 fc0 sc0 ls2 ws2">1<span class="ff3"> <span class="_ _e"> </span></span>GENERAL DESCRIPTION<span class="_ _f"> </span>.......................................................................................................<span class="_ _f"> </span>9<span class="ff3"> </span></div><div class="t m0 x1 hb y43 ff2 fs1 fc0 sc0 ls2 ws2">2<span class="ff3"> <span class="_ _e"> </span></span>FEATURES.................................................................................................................................<span class="_ _f"> </span>10<span class="ff3"> </span></div><div class="t m0 x12 hf y44 ff3 fs2 fc0 sc0 ls14 ws2">2.1<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">R<span class="fs3 ls1d">EFERENCES<span class="_ _11"></span></span><span class="ls1e">........................................................................................................................................................10</span></span> </span></div><div class="t m0 x12 hf y45 ff3 fs2 fc0 sc0 ls14 ws2">2.2<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">D<span class="fs3 ls1f">EFINITIONS<span class="_ _12"> </span></span><span class="ls1e">........................................................................................................................................................10</span></span> </span></div><div class="t m0 x1 hb y46 ff2 fs1 fc0 sc0 ls2 ws2">3<span class="ff3"> <span class="_ _e"> </span></span>ORDERING INFORMATION<span class="_ _13"></span>.................................................................................................<span class="_ _f"> </span>11<span class="ff3"> </span></div><div class="t m0 x1 hb y47 ff2 fs1 fc0 sc0 ls2 ws2">4<span class="ff3"> <span class="_ _e"> </span></span><span class="ls20 ws17">BLOCK DIAGRAM<span class="_"> </span>..................................................................................................................<span class="_ _f"> </span></span>11<span class="ff3"> </span></div><div class="t m0 x1 hb y48 ff2 fs1 fc0 sc0 ls2 ws2">5<span class="ff3"> <span class="_ _e"> </span></span><span class="ws18">FUNCTIONAL DESCRIPTION<span class="_ _14"> </span>..............................................................................................<span class="_ _f"> </span>14</span><span class="ff3"> </span></div><div class="t m0 x12 hf y49 ff3 fs2 fc0 sc0 ls14 ws2">5.1<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">F<span class="fs3 ls21">UNCTIONAL </span>B<span class="fs3 ls22">LOCKS<span class="_ _11"></span></span><span class="ls1e">...............................................................................................................................<span class="ls1a">...........14</span></span></span> </span></div><div class="t m0 x12 hf y4a ff3 fs2 fc0 sc0 ls14 ws2">5.2<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">C<span class="fs3 ls23 ws19">LOCK AND </span>R<span class="fs3 ls24">ESET </span>M<span class="fs3 ls25">ODULE<span class="_"> </span></span><span class="ls1e">...............................................................................................................................</span></span></span>14<span class="fs1 ls2"> </span></div><div class="t m0 x12 hf y4b ff3 fs2 fc0 sc0 ls14 ws2">5.3<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">E<span class="fs3 lsb">XTERNAL </span>I<span class="fs3 ls8">NTERFACE</span><span class="ls1e">...............................................................................................................................<span class="ls26">..........<span class="_ _2"></span>15</span></span></span> </span></div><div class="t m0 x12 hf y4c ff3 fs2 fc0 sc0 ls14 ws2">5.4<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">P<span class="fs3 ls27">ROTOCOL </span>C<span class="fs3 ls28">ONTRO<span class="_ _7"></span>L <span class="fs2 ls2">U</span><span class="ls29">NIT <span class="fs2 ls1e">(PCU).......................................................................................................................<span class="_ _2"></span>15<span class="fs1 ls2"> </span></span></span></span></span></span></div><div class="t m0 x12 hf y4d ff3 fs2 fc0 sc0 ls14 ws2">5.5<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">P<span class="fs3 ls2a">ACKET </span>P<span class="fs3 ls22">ROCESSING </span>U<span class="fs3 ls29">NIT </span><span class="ls1e">(PPU)<span class="_ _13"> </span>.......................................................................................................................15</span></span> </span></div><div class="t m0 x12 hf y4e ff3 fs2 fc0 sc0 ls14 ws2">5.6<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">E<span class="fs3 ls2b">RROR </span>C<span class="fs3 ls2c">ORRECTION </span>C<span class="fs3 ls2d">ODE</span>/<span class="fs3"> </span>C<span class="fs3 ls2e">YCLIC </span>R<span class="fs3 ls23">EDUNDANCY </span>C<span class="fs3 ls2f">HECK </span><span class="ls30">(ECC/CRC)<span class="_ _2"></span>............................................................<span class="_ _2"></span>16</span></span> </span></div><div class="t m0 x12 hf y4f ff3 fs2 fc0 sc0 ls14 ws2">5.7<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">L<span class="fs3 ls2d ws1a">ONG AND </span>C<span class="fs3 ls1f">OMMAND </span>B<span class="fs3 ls6">UFFE<span class="_ _2"></span>RS<span class="_ _11"> </span></span><span class="ls1e">..........................................................................................................................<span class="_ _2"></span>16</span></span> </span></div><div class="t m0 x12 hf y50 ff3 fs2 fc0 sc0 ls14 ws2">5.8<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">I<span class="fs3 ls23 ws1b">NTERRUPT SIGNAL<span class="_ _13"> </span></span><span class="ls1e">...............................................................................................................................<span class="ls1a">...............16</span></span></span> </span></div><div class="t m0 x12 hf y51 ff3 fs2 fc0 sc0 ls14 ws2">5.9<span class="fs1 ls2"> <span class="_ _10"> </span></span><span class="ls17">D-PHY<span class="fs3 ls2"> <span class="fs2">C</span><span class="ls31">ONTROLLER<span class="_ _11"></span></span></span><span class="ls1e">...............................................................................................................................<span class="ls1a">...........16<span class="fs1 ls2"> </span></span></span></span></div><div class="t m0 x12 hf y52 ff3 fs2 fc0 sc0 ls14 ws2">5.10<span class="fs1 ls2"> <span class="_ _15"> </span><span class="fs2">A<span class="fs3 ls32">NALOG </span>T<span class="fs3 ls33">RANSCEIVER<span class="_ _13"> </span></span><span class="ls1e">...............................................................................................................................<span class="ls26">........16</span></span></span> </span></div><div class="t m0 x12 hf y53 ff3 fs2 fc0 sc0 ls14 ws2">5.11<span class="fs1 ls2"> <span class="_ _15"> </span><span class="fs2">I<span class="fs3 lsb">NTERNAL </span><span class="ls1e">PLL<span class="_ _13"> </span>....................................................................................................................................................<span class="_ _2"></span>17</span></span> </span></div><div class="t m0 x1 hb y54 ff2 fs1 fc0 sc0 ls2 ws2">6<span class="ff3"> <span class="_ _e"> </span></span>SSD2828QN4 PIN ASSIGNMENT<span class="_ _11"></span>...........................................................................................<span class="_ _f"> </span>18<span class="ff3"> </span></div><div class="t m0 x1 hb y55 ff2 fs1 fc0 sc0 ls2 ws2">7<span class="ff3"> <span class="_ _e"> </span></span>PIN DESCRIPTION<span class="_ _14"> </span>..................................................................................................................<span class="_ _f"> </span>20<span class="ff3"> </span></div><div class="t m0 x1 hb y56 ff2 fs1 fc0 sc0 ls2 ws2">8<span class="ff3"> <span class="_ _e"> </span></span><span class="ls20 ws17">COMMAND TABLE<span class="_ _13"></span>.................................................................................................................<span class="_ _f"> </span>2</span>3<span class="ff3"> </span></div><div class="t m0 x12 hf y57 ff3 fs2 fc0 sc0 ls14 ws2">8.1<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">R<span class="fs3 ls34">EGISTER </span>D<span class="fs3 lsa">ESCRIPTION<span class="_ _2"></span></span><span class="ls1e">...............................................................................................................................<span class="ls26">........25</span></span></span> </span></div><div class="t m0 x13 h10 y58 ff9 fs2 fc0 sc0 ls14 ws2">8.1.1<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls35 ws1c">Device Identifica<span class="ls36 ws1d">tion Regi</span></span><span class="ls37">ster<span class="_ _2"></span>.................................................................................................<span class="ls17">....................25<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y59 ff9 fs2 fc0 sc0 ls14 ws2">8.1.2<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 1<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................26<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5a ff9 fs2 fc0 sc0 ls14 ws2">8.1.3<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 2<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................27<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5b ff9 fs2 fc0 sc0 ls14 ws2">8.1.4<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 3<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................28<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5c ff9 fs2 fc0 sc0 ls14 ws2">8.1.5<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 4<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................29<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5d ff9 fs2 fc0 sc0 ls14 ws2">8.1.6<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 5<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................30<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5e ff9 fs2 fc0 sc0 ls14 ws2">8.1.7<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 6<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................31<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y5f ff9 fs2 fc0 sc0 ls14 ws2">8.1.8<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls36">Configuratio<span class="ls3a ws20">n Regi</span><span class="ls37">ster.........................................................................................................<span class="ls17">.......................<span class="_ _2"></span>33<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y60 ff9 fs2 fc0 sc0 ls14 ws2">8.1.9<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls3b ws21">VC Control </span><span class="ls37">Register<span class="_ _2"></span>............................................................................................................<span class="ls17">........................35<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y61 ff9 fs2 fc0 sc0 ls14 ws2">8.1.10<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3c ws22">PLL Control </span><span class="ls37">Register<span class="_ _11"></span>...........................................................................................................<span class="ls17">.......................36<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y62 ff9 fs2 fc0 sc0 ls14 ws2">8.1.11<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls38 ws23">PLL Configura<span class="ls3d ws24">tion Regi<span class="_ _7"></span><span class="ls37 ws2">ster<span class="_ _11"></span>.....................................................................................................<span class="ls17">...................37<span class="ff3 fs1 ls2"> </span></span></span></span></span></div><div class="t m0 x13 h10 y63 ff9 fs2 fc0 sc0 ls14 ws2">8.1.12<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3b ws21">Clock Contro<span class="ls3c ws25">l Regi</span></span><span class="ls37">ster.........................................................................................................<span class="ls17">.......................38<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y64 ff9 fs2 fc0 sc0 ls14 ws2">8.1.13<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws26">Packet Size Contro<span class="ws27">l Regist<span class="ls37 ws28">er 1.................................................................................................<span class="_ _2"></span></span></span></span><span class="ls17">...................39<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y65 ff9 fs2 fc0 sc0 ls14 ws2">8.1.14<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws26">Packet Size Contro<span class="ws27">l Regist<span class="ls37 ws28">er 2.................................................................................................<span class="_ _2"></span></span></span></span><span class="ls17">...................40<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y66 ff9 fs2 fc0 sc0 ls14 ws2">8.1.15<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws26">Packet Size Contro<span class="ws27">l Regist<span class="ls37 ws28">er 3.................................................................................................<span class="_ _2"></span></span></span></span><span class="ls17">...................41<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y67 ff9 fs2 fc0 sc0 ls14 ws2">8.1.16<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls38 ws23">Generic Packet Dr<span class="ls37 ws29">op Registe<span class="_ _7"></span>r<span class="_ _13"> </span>...................................................................................................<span class="ls1a ws2">.................42<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y68 ff9 fs2 fc0 sc0 ls14 ws2">8.1.17<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3c ws22">Operation Cont<span class="ls12 wsd">rol Regi</span></span><span class="ls37">ster<span class="_ _14"> </span>.....................................................................................................<span class="ls17">...................43<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y69 ff9 fs2 fc0 sc0 ls14 ws2">8.1.18<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3c ws22">Maximum Return <span class="ls39 ws1f">Size Register<span class="_ _11"></span>...................................................................................................<span class="_ _2"></span></span></span><span class="ls1a">................44<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y6a ff9 fs2 fc0 sc0 ls14 ws2">8.1.19<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls35 ws1c">Return Data Co<span class="ls3c ws22">unt Regi</span></span><span class="ls37">ster<span class="_ _2"></span>.....................................................................................................<span class="ls17">...................45<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y6b ff9 fs2 fc0 sc0 ls14 ws2">8.1.20<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls36 ws1d">ACK Response St<span class="ls37 ws29">atus Re<span class="_ _7"></span>gister<span class="_ _2"></span>...................................................................................................<span class="ls1a ws2">.................<span class="_ _2"></span>46<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y6c ff9 fs2 fc0 sc0 ls14 ws2">8.1.21<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3f ws2a">Line Contro<span class="ls38 ws23">l Regi</span></span><span class="ls37">ster..........................................................................................................<span class="_ _2"></span><span class="ls17">........................47<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y6d ff9 fs2 fc0 sc0 ls14 ws2">8.1.22<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3a ws2b">Interrupt Cont<span class="ls40 ws2c">rol Regi</span></span><span class="ls37">ster<span class="_ _13"> </span>.....................................................................................................<span class="_ _2"></span><span class="ls17">.....................49<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y6e ff9 fs2 fc0 sc0 ls14 ws2">8.1.23<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3f ws2a">Interrupt Stat<span class="ls40 ws2c">us Regi<span class="_ _7"></span><span class="ls37 ws2">ster<span class="_ _12"></span>......................................................................................................<span class="ls17">.......................<span class="_ _2"></span>50<span class="ff3 fs1 ls2"> </span></span></span></span></span></div><div class="t m0 x13 h10 y6f ff9 fs2 fc0 sc0 ls14 ws2">8.1.24<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">Error Status R<span class="_ _7"></span>egister<span class="_ _14"> </span>..........................................................................................................<span class="ls17 ws2">........................52<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y70 ff9 fs2 fc0 sc0 ls14 ws2">8.1.25<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 1<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................54<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y71 ff9 fs2 fc0 sc0 ls14 ws2">8.1.26<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 2<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................55<span class="ff3 fs1 ls2"> </span></span></span></div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/628c8a1d16e0ca7141659c0d/bg4.jpg"><div class="t m0 x1 h4 y32 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y33 ff1 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y34 ff1 fs3 fc0 sc0 ls10 ws2">SSD2828QN4 <span class="_ _3"> </span><span class="ff4 ls8 ws7">Rev 1.3 <span class="_ _4"> </span>P 4/168 <span class="_ _1"> </span>Mar 2013<span class="_ _5"> </span> <span class="_ _6"> </span></span><span class="ls11 wsc">Solomo<span class="_ _7"></span>n Systec<span class="_ _7"></span>h</span></div><div class="t m0 x1 h5 y35 ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 x13 h10 y72 ff9 fs2 fc0 sc0 ls14 ws2">8.1.27<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 3<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................56<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y73 ff9 fs2 fc0 sc0 ls14 ws2">8.1.28<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 4<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................57<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y74 ff9 fs2 fc0 sc0 ls14 ws2">8.1.29<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 5<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................58<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y75 ff9 fs2 fc0 sc0 ls14 ws2">8.1.30<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 6<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................59<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y76 ff9 fs2 fc0 sc0 ls14 ws2">8.1.31<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls12 wsd">HS TX Timer <span class="ls37 ws29">Register 1<span class="_ _12"></span>.........................................................................................................</span></span><span class="ls17">.....................<span class="_ _2"></span>60<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y77 ff9 fs2 fc0 sc0 ls14 ws2">8.1.32<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls12 wsd">HS TX Timer <span class="ls37 ws29">Register 2<span class="_ _12"></span>.........................................................................................................</span></span><span class="ls17">.....................<span class="_ _2"></span>61<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y78 ff9 fs2 fc0 sc0 ls14 ws2">8.1.33<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls38 ws23">LP RX Timer <span class="ls37 ws29">Register 1<span class="_ _12"></span>.........................................................................................................</span></span><span class="ls17">.....................<span class="_ _2"></span>62<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y79 ff9 fs2 fc0 sc0 ls14 ws2">8.1.34<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls38 ws23">LP RX Timer <span class="ls37 ws29">Register 2<span class="_ _12"></span>.........................................................................................................</span></span><span class="ls17">.....................<span class="_ _2"></span>63<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y7a ff9 fs2 fc0 sc0 ls14 ws2">8.1.35<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls41 ws2d">TE Status </span><span class="ls37">Register<span class="_ _2"></span>.............................................................................................................<span class="ls17">..........................<span class="_ _2"></span>64<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y7b ff9 fs2 fc0 sc0 ls14 ws2">8.1.36<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">SPI Read Register<span class="_ _17"></span>..............................................................................................................</span><span class="ls17">.........................65<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y7c ff9 fs2 fc0 sc0 ls14 ws2">8.1.37<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws28">PLL Lock Register..............................................................................................................</span><span class="ls17">.........................66<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y7d ff9 fs2 fc0 sc0 ls14 ws2">8.1.38<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3a ws2b">Test Re</span><span class="ls37">gister<span class="_"> </span>..................................................................................................................<span class="ls17">.............................67<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y7e ff9 fs2 fc0 sc0 ls14 ws2">8.1.39<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls42 ws2e">TE Count </span><span class="ls37">Register<span class="_ _2"></span>..............................................................................................................<span class="ls17">.........................<span class="_ _2"></span>69<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y7f ff9 fs2 fc0 sc0 ls14 ws2">8.1.40<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws27">Analog Contro<span class="ls3c ws22">l Regi</span></span><span class="ls37">ster<span class="_ _13"> </span>........................................................................................................<span class="ls17">.....................70<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y80 ff9 fs2 fc0 sc0 ls14 ws2">8.1.41<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Analog Control <span class="ls37 ws28">Register 2<span class="_ _13"> </span>......................................................................................................</span></span><span class="ls17">....................<span class="_ _2"></span>71<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y81 ff9 fs2 fc0 sc0 ls14 ws2">8.1.42<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Analog Control <span class="ls37 ws28">Register 3<span class="_ _13"> </span>......................................................................................................</span></span><span class="ls17">....................<span class="_ _2"></span>72<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y82 ff9 fs2 fc0 sc0 ls14 ws2">8.1.43<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Analog Control <span class="ls37 ws28">Register 4<span class="_ _13"> </span>......................................................................................................</span></span><span class="ls17">....................<span class="_ _2"></span>73<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y83 ff9 fs2 fc0 sc0 ls14 ws2">8.1.44<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls44 ws30">Interrupt Output <span class="ls3b ws31">Control Re</span></span><span class="ls39">gister<span class="_ _14"> </span>..............................................................................................<span class="ls1a">................<span class="_ _2"></span>74<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y84 ff9 fs2 fc0 sc0 ls14 ws2">8.1.45<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls38 ws1e">RGB Interface Cont<span class="ls39 ws1f">rol Register 7<span class="_ _2"></span>...............................................................................................</span></span><span class="ls1a">................<span class="_ _2"></span>75<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y85 ff9 fs2 fc0 sc0 ls14 ws2">8.1.46<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3f ws2a">Lane Configura<span class="ls36 ws1d">tion Regi<span class="_ _7"></span><span class="ls37 ws2">ster<span class="_ _2"></span>....................................................................................................<span class="ls17">...................<span class="_ _2"></span>76<span class="ff3 fs1 ls2"> </span></span></span></span></span></div><div class="t m0 x13 h10 y86 ff9 fs2 fc0 sc0 ls14 ws2">8.1.47<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls39 ws1f">Delay Adjustment Re<span class="_ _7"></span>gister 7<span class="_ _11"></span>....................................................................................................<span class="ls17 ws2">...................77<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y87 ff9 fs2 fc0 sc0 ls14 ws2">8.1.48<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Pull Control Re<span class="ls37 ws29">gister 1<span class="_ _17"></span>........................................................................................................</span></span><span class="ls17">.......................78<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y88 ff9 fs2 fc0 sc0 ls14 ws2">8.1.49<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Pull Control Re<span class="ls37 ws29">gister 2<span class="_ _17"></span>........................................................................................................</span></span><span class="ls17">.......................80<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y89 ff9 fs2 fc0 sc0 ls14 ws2">8.1.50<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Pull Control Re<span class="ls37 ws29">gister 3<span class="_ _17"></span>........................................................................................................</span></span><span class="ls17">.......................81<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y8a ff9 fs2 fc0 sc0 ls14 ws2">8.1.51<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws27">CABC Brightness Cont<span class="ls39 ws32">rol Register 1<span class="_ _2"></span>.............................................................................................</span></span><span class="ls1a">.............82<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y8b ff9 fs2 fc0 sc0 ls14 ws2">8.1.52<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e ws27">CABC Brightness Cont<span class="ls39 ws32">rol Register 2<span class="_ _2"></span>.............................................................................................</span></span><span class="ls1a">.............83<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y8c ff9 fs2 fc0 sc0 ls14 ws2">8.1.53<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls45 ws33">CABC Brightness St<span class="ls37 ws29">atus Regi<span class="_ _7"></span>ster<span class="_ _13"> </span>................................................................................................<span class="ls1a ws2">...............<span class="_ _2"></span>84<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y8d ff9 fs2 fc0 sc0 ls14 ws2">8.1.54<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls12 wsd">Encoder Contro<span class="ls46 ws34">l Regi<span class="_ _7"></span><span class="ls37 ws2">ster<span class="_ _13"> </span>.......................................................................................................<span class="_ _2"></span><span class="ls17">....................85<span class="ff3 fs1 ls2"> </span></span></span></span></span></div><div class="t m0 x13 h10 y8e ff9 fs2 fc0 sc0 ls14 ws2">8.1.55<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls47 ws35">Video Sync Delay Re<span class="_ _7"></span>gi<span class="ls37 ws2">ster<span class="_ _11"></span>......................................................................................................<span class="ls17">....................<span class="_ _2"></span>86<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y8f ff9 fs2 fc0 sc0 ls14 ws2">8.1.56<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls45">Trimming <span class="ls37">Register<span class="_ _14"> </span>..............................................................................................................<span class="ls17">........................<span class="_ _2"></span>87<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y90 ff9 fs2 fc0 sc0 ls14 ws2">8.1.57<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">GPIO1 Register.................................................................................................................</span><span class="ls17">..........................<span class="_ _2"></span>89<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y91 ff9 fs2 fc0 sc0 ls14 ws2">8.1.58<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">GPIO2 Register.................................................................................................................</span><span class="ls17">..........................<span class="_ _2"></span>91<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y92 ff9 fs2 fc0 sc0 ls14 ws2">8.1.59<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYA01 Regist<span class="_ _7"></span>er<span class="_"> </span>................................................................................................................<span class="ls17 ws2">........................93<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y93 ff9 fs2 fc0 sc0 ls14 ws2">8.1.60<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYA23 Regist<span class="_ _7"></span>er<span class="_"> </span>................................................................................................................<span class="ls17 ws2">........................94<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y94 ff9 fs2 fc0 sc0 ls14 ws2">8.1.61<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYB01 Regist<span class="_ _7"></span>er<span class="_"> </span>................................................................................................................<span class="ls17 ws2">........................95<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y95 ff9 fs2 fc0 sc0 ls14 ws2">8.1.62<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYB23 Regist<span class="_ _7"></span>er<span class="_"> </span>................................................................................................................<span class="ls17 ws2">........................96<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y96 ff9 fs2 fc0 sc0 ls14 ws2">8.1.63<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYC01 Regist<span class="_ _7"></span>er<span class="_ _13"> </span>................................................................................................................<span class="ls17 ws2">........................97<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y97 ff9 fs2 fc0 sc0 ls14 ws2">8.1.64<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">DLYC23 Regist<span class="_ _7"></span>er<span class="_ _13"> </span>................................................................................................................<span class="ls17 ws2">........................98<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y98 ff9 fs2 fc0 sc0 ls14 ws2">8.1.65<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls43 ws2f">Analog Control <span class="ls37 ws28">Register 5<span class="_ _13"> </span>......................................................................................................</span></span><span class="ls17">....................<span class="_ _2"></span>99<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y99 ff9 fs2 fc0 sc0 ls14 ws2">8.1.66<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3c ws22">Read Re</span><span class="ls37">gister<span class="_ _11"></span>............................................................................................................................................<span class="_ _2"></span>101<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x1 hb y9a ff2 fs1 fc0 sc0 ls2 ws2">9<span class="ff3"> <span class="_ _e"> </span></span>CONFIGURATION<span class="_ _17"></span>.................................................................................................................<span class="_ _f"> </span>102<span class="ff3"> </span></div><div class="t m0 x12 hf y9b ff3 fs2 fc0 sc0 ls14 ws2">9.1<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">L<span class="fs3 ls1d">ANE </span>M<span class="fs3 ls1d">ANAGEMENT<span class="_ _12"> </span></span><span class="ls1e">...............................................................................................................................<span class="ls39">..........102</span></span></span> </span></div><div class="t m0 x12 hf y9c ff3 fs2 fc0 sc0 ls14 ws2">9.2<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">U<span class="fs3 ls21 ws36">SE CASES<span class="_ _12"> </span></span><span class="ls1e">...............................................................................................................................<span class="ls37">..........................<span class="_ _2"></span>103</span></span></span> </span></div><div class="t m0 x13 h10 y9d ff9 fs2 fc0 sc0 ls14 ws2">9.2.1<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls1e ws37">RGB + SPI Interface<span class="_ _11"></span>............................................................................................................</span><span class="ls37">.....................103<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 y9e ff9 fs2 fc0 sc0 ls14 ws2">9.2.2<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls48 ws38">MIPI DC Char</span><span class="ls44">acteris<span class="ls37">tics<span class="_ _11"></span>..........................................................................................................................<span class="_ _2"></span>105<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y9f ff9 fs2 fc0 sc0 ls14 ws2">9.2.3<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls39 ws1f">High Speed Clock T<span class="_ _7"></span>ransmission<span class="_ _17"> </span>..................................................................................................<span class="ws2">.............<span class="_ _2"></span>106<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 ya0 ff9 fs2 fc0 sc0 ls14 ws2">9.2.4<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls1e">Data Lane <span class="_ _7"></span>State Flow<span class="_ _13"> </span>...........................................................................................................<span class="ls37">....................<span class="_ _2"></span>106<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 ya1 ff9 fs2 fc0 sc0 ls14 ws2">9.2.5<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls39 ws32">High Speed Data Transmissi<span class="_ _7"></span>on<span class="_ _2"></span>...................................................................................................<span class="ws2">..............107<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 ya2 ff9 fs2 fc0 sc0 ls14 ws2">9.2.6<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls3c ws25">Bi-Directional Data <span class="ls37 ws29">Lane Tur<span class="_ _7"></span>naround<span class="_ _17"></span>............................................................................................<span class="ls30 ws2">.........109<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 ya3 ff9 fs2 fc0 sc0 ls14 ws2">9.2.7<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls37 ws29">Escape Mode<span class="_ _11"></span>....................................................................................................................<span class="ws2">.........................109<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 ya4 ff9 fs2 fc0 sc0 ls14 ws2">9.2.8<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls3a ws2b">Low Power Data </span><span class="ls39">Transmissi<span class="_ _7"></span>on<span class="_ _11"></span>.................................................................................................................111<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 ya5 ff9 fs2 fc0 sc0 ls14 ws2">9.2.9<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls35 ws1c">Reset Tr</span><span class="ls37">igger.............................................................................................................................................<span class="_ _2"></span>112<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 ya6 ff9 fs2 fc0 sc0 ls14 ws2">9.2.10<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3e">Tearing <span class="ls37">Effect............................................................................................................................................113<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 ya7 ff9 fs2 fc0 sc0 ls14 ws2">9.2.11<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37">Acknowledge<span class="_ _17"></span>.............................................................................................................................................114<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 ya8 ff9 fs2 fc0 sc0 ls14 ws2">9.2.12<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls44 ws30">Packet Tran</span><span class="ls37">smission<span class="_ _12"></span>.................................................................................................................................<span class="_ _2"></span>115<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 ya9 ff9 fs2 fc0 sc0 ls14 ws2">9.2.13<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls46 ws34">HS Transmissi</span><span class="ls1e">on Exam<span class="_ _7"></span>ple<span class="_ _17"> </span>........................................................................................................<span class="ls39">................<span class="_ _2"></span>115<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 yaa ff9 fs2 fc0 sc0 ls14 ws2">9.2.14<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3a ws2b">General Packet </span><span class="ls37">Structure<span class="_ _2"></span>..........................................................................................................................<span class="_ _2"></span>116<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x13 h10 yab ff9 fs2 fc0 sc0 ls14 ws2">9.2.15<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls37 ws29">Long Packet Format<span class="_ _14"> </span>.............................................................................................................<span class="ws2">....................116<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 yac ff9 fs2 fc0 sc0 ls14 ws2">9.2.16<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls49 ws39">Short Packet </span><span class="ls37">Structure<span class="_ _17"></span>..............................................................................................................................117<span class="ff3 fs1 ls2"> </span></span></div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>
<div id="pf5" class="pf w0 h0" data-page-no="5"><div class="pc pc5 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/628c8a1d16e0ca7141659c0d/bg5.jpg"><div class="t m0 x1 h4 y32 ff3 fs2 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y33 ff1 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 xc h7 y34 ff1 fs3 fc0 sc0 ls10 ws2">SSD2828QN4 <span class="_ _3"> </span><span class="ff4 ls8 ws7">Rev 1.3 <span class="_ _4"> </span>P 5/168 <span class="_ _1"> </span>Mar 2013<span class="_ _5"> </span> <span class="_ _6"> </span></span><span class="ls11 wsc">Solomo<span class="_ _7"></span>n Systec<span class="_ _7"></span>h</span></div><div class="t m0 x1 h5 y35 ff4 fs3 fc0 sc0 ls2 ws2"> </div><div class="t m0 x13 h10 y72 ff9 fs2 fc0 sc0 ls14 ws2">9.2.17<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls30 ws3a">Data Iden<span class="ls18 ws13">tifier (D</span></span><span class="ls1e">I)<span class="_ _11"></span>...........................................................................................................<span class="ls37">........................117<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y73 ff9 fs2 fc0 sc0 ls14 ws2">9.2.18<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls42 ws2e">Victual Channel <span class="ls39 ws1f">Identifier (VC)<span class="_ _11"></span>................................................................................................<span class="ws2">................<span class="_ _2"></span>118<span class="ff3 fs1 ls2"> </span></span></span></span></div><div class="t m0 x13 h10 y74 ff9 fs2 fc0 sc0 ls14 ws2">9.2.19<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls1e">Data Type (<span class="_ _7"></span>DT)<span class="_ _12"></span>.................................................................................................................<span class="ls37">........................118<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x12 hf y75 ff3 fs2 fc0 sc0 ls14 ws2">9.3<span class="fs1 ls2"> <span class="_ _10"> </span><span class="fs2">O<span class="fs3 ls32">PERATING </span>M<span class="fs3 ls1d">ODES<span class="_ _17"> </span></span><span class="ls1e">...............................................................................................................................<span class="ls39">............<span class="_ _2"></span>122</span></span></span> </span></div><div class="t m0 x13 h10 y76 ff9 fs2 fc0 sc0 ls14 ws2">9.3.2<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls37 ws28">State machine operation........................................................................................................<span class="_ _7"></span><span class="ws2">....................<span class="_ _2"></span>135<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y77 ff9 fs2 fc0 sc0 ls14 ws2">9.3.3<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls37 ws29">D-PHY operation<span class="_ _17"></span>................................................................................................................<span class="ws2">......................136<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y78 ff9 fs2 fc0 sc0 ls14 ws2">9.3.4<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls2 ws3b">Analog Tr</span><span class="ls36">anscei<span class="ls37">ver<span class="_ _11"></span>...................................................................................................................................<span class="_ _2"></span>137<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y79 ff9 fs2 fc0 sc0 ls14 ws2">9.3.5<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls1e">PLL<span class="_"> </span>............................................................................................................................<span class="ls37">...............................137<span class="ff3 fs1 ls2"> </span></span></span></div><div class="t m0 x13 h10 y7a ff9 fs2 fc0 sc0 ls14 ws2">9.3.6<span class="ff3 fs1 ls2"> <span class="_ _16"> </span></span><span class="ls3b ws21">Clock Source </span><span class="ls37">Example<span class="_ _17"></span>..............................................................................................................................138<span class="ff3 fs1 ls2"> </span></span></div><div class="t m0 x1 hb yad ff2 fs1 fc0 sc0 ls2 ws2">10<span class="ff3"> <span class="_ _18"> </span></span><span class="ls20 ws17">EXTERNAL INTERFACE<span class="_ _11"></span>..................................................................................................<span class="_ _f"> </span>139</span><span class="ff3"> </span></div><div class="t m0 x12 hf yae ff3 fs2 fc0 sc0 ls4a ws2">10.1<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3f">SPI<span class="fs3 ls2"> <span class="fs2">I</span><span class="ls9">NTERFACE </span><span class="fs2">8</span><span class="ls4b ws4"> BIT </span><span class="fs2">4</span> <span class="fs2">W</span>IRE<span class="_ _11"> </span></span><span class="ls1e">.............................................................................................................................<span class="_ _2"></span>13<span class="ls2">9<span class="fs1"> </span></span></span></span></div><div class="t m0 x12 hf yaf ff3 fs2 fc0 sc0 ls4a ws2">10.2<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3f">SPI<span class="fs3 ls2"> <span class="fs2">I</span><span class="ls9">NTERFACE </span><span class="fs2">8</span><span class="ls4b ws4"> BIT </span><span class="fs2">3</span> <span class="fs2">W</span>IRE<span class="_ _11"> </span></span><span class="ls1e">.............................................................................................................................<span class="_ _2"></span>14<span class="ls2">1<span class="fs1"> </span></span></span></span></div><div class="t m0 x13 h10 yb0 ff9 fs2 fc0 sc0 ls38 ws2">10.2.1<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls3c ws25">3 or 4 wires 8bit <span class="_ _2"></span>SPI read back sequence for 0xFF re<span class="ls40 ws2c">gister which is <span class="_ _7"></span>stored MIPI read <span class="_ _7"></span>back data<span class="_ _14"> </span>.........143<span class="ff3 fs1 ls2 ws2"> </span></span></span></div><div class="t m0 x12 hf yb1 ff3 fs2 fc0 sc0 ls4a ws2">10.3<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3f">SPI<span class="fs3 ls2"> <span class="fs2">I</span><span class="ls9">NTERFACE </span></span><span class="ls14">24<span class="fs3 ls4b ws4"> BIT </span><span class="ls2">3<span class="fs3"> </span>W<span class="fs3">IRE<span class="_ _11"> </span></span><span class="ls1e">...........................................................................................................................<span class="_ _2"></span>145</span><span class="fs1"> </span></span></span></span></div><div class="t m0 x13 h10 yb2 ff9 fs2 fc0 sc0 ls38 ws2">10.3.1<span class="ff3 fs1 ls2"> <span class="_ _c"> </span></span><span class="ls40 ws2c">3 wires 24bit SPI read back seque<span class="_ _7"></span>nce for 0xFF regist<span class="_ _7"></span><span class="ls12">er which is stored MIPI read back dat<span class="_ _7"></span>a<span class="_ _11"></span>...............<span class="_ _2"></span>147<span class="ff3 fs1 ls2 ws2"> </span></span></span></div><div class="t m0 x1 hb yb3 ff2 fs1 fc0 sc0 ls2 ws2">11<span class="ff3"> <span class="_ _18"> </span></span>MAXIMUM RATINGS<span class="_ _11"></span>........................................................................................................<span class="_ _14"> </span>149<span class="_ _2"></span><span class="ff3"> </span></div><div class="t m0 x1 hb yb4 ff2 fs1 fc0 sc0 ls2 ws2">12<span class="ff3"> <span class="_ _18"> </span></span>RECOMMENDED OPERATING CONDITIONS<span class="_"> </span>...........................................................<span class="_ _14"> </span>150<span class="ff3"> </span></div><div class="t m0 x1 hb yb5 ff2 fs1 fc0 sc0 ls2 ws2">13<span class="ff3"> <span class="_ _18"> </span></span><span class="ls20 ws17">DC CHARACTERISTICS<span class="_ _12"></span>...................................................................................................<span class="_ _14"> </span>151<span class="_ _2"></span></span><span class="ff3"> </span></div><div class="t m0 x1 hb yb6 ff2 fs1 fc0 sc0 ls2 ws2">14<span class="ff3"> <span class="_ _18"> </span></span><span class="ls20 ws17">AC CHARACTERISTICS<span class="_ _12"></span>...................................................................................................<span class="_ _14"> </span>153<span class="_ _2"></span></span><span class="ff3"> </span></div><div class="t m0 x12 hf yb7 ff3 fs2 fc0 sc0 ls4a ws2">14.1<span class="fs1 ls2"> <span class="_ _15"> </span><span class="fs2">8<span class="fs3"> </span>B<span class="fs3 ls4c">IT </span>4<span class="fs3"> </span>W<span class="fs3 ls1d">IRE </span><span class="ls3f">SPI</span><span class="fs3"> </span>I<span class="fs3 ls23">NTERFACE </span>T<span class="fs3 ls4d">IMIN<span class="_ _2"></span>G<span class="_ _2"></span></span><span class="ls1e">................................................................................................................154</span></span> </span></div><div class="t m0 x12 hf yb8 ff3 fs2 fc0 sc0 ls4a ws2">14.2<span class="fs1 ls2"> <span class="_ _15"> </span><span class="fs2">8<span class="fs3"> </span>B<span class="fs3 ls4c">IT </span>3<span class="fs3"> </span>W<span class="fs3 ls1d">IRE </span><span class="ls3f">SPI</span><span class="fs3"> </span>I<span class="fs3 ls23">NTERFACE </span>T<span class="fs3 ls4d">IMIN<span class="_ _2"></span>G<span class="_ _2"></span></span><span class="ls1e">................................................................................................................155</span></span> </span></div><div class="t m0 x12 hf yb9 ff3 fs2 fc0 sc0 ls4a ws2">14.3<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls14">24<span class="fs3 ls2"> <span class="fs2">B</span><span class="ls4c">IT </span><span class="fs2">3</span> <span class="fs2">W</span><span class="ls1d">IRE </span></span><span class="ls3f">SPI<span class="fs3 ls2"> <span class="fs2">I</span><span class="ls9">NTERFACE </span><span class="fs2">T</span><span class="ls4d">IMING<span class="_ _2"></span></span></span><span class="ls1e">..............................................................................................................<span class="_ _2"></span>156<span class="fs1 ls2"> </span></span></span></span></div><div class="t m0 x12 hf yba ff3 fs2 fc0 sc0 ls4a ws2">14.4<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3c">RGB<span class="fs3 ls2"> <span class="fs2">I</span><span class="ls22">NTERFACE </span><span class="fs2">T</span><span class="ls24">IMING<span class="_ _11"> </span></span></span><span class="ls1e">...............................................................................................................................<span class="ls41">....<span class="_ _2"></span>157<span class="fs1 ls2"> </span></span></span></span></div><div class="t m0 x12 hf ybb ff3 fs2 fc0 sc0 ls4a ws2">14.5<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3e">RESET<span class="fs3 ls2"> <span class="fs2">T</span><span class="ls4d">IMING<span class="_ _14"> </span></span></span><span class="ls1e">...............................................................................................................................<span class="ls37">..................<span class="_ _2"></span>158<span class="fs1 ls2"> </span></span></span></span></div><div class="t m0 x12 hf ybc ff3 fs2 fc0 sc0 ls4a ws2">14.6<span class="fs1 ls2"> <span class="_ _15"> </span></span><span class="ls3e">TX_CLK<span class="fs3 ls2"> <span class="fs2">T</span><span class="ls34">IMING<span class="_"> </span></span></span><span class="ls1e">...............................................................................................................................<span class="ls39">...............<span class="_ _2"></span>158<span class="fs1 ls2"> </span></span></span></span></div><div class="t m0 x1 hb ybd ff2 fs1 fc0 sc0 ls2 ws2">15<span class="ff3"> <span class="_ _18"> </span></span>POWER UP SEQUENCE<span class="_ _17"></span>....................................................................................................<span class="_ _f"> </span>159<span class="ff3"> </span></div><div class="t m0 x1 hb ybe ff2 fs1 fc0 sc0 ls2 ws2">16<span class="ff3"> <span class="_ _18"> </span></span><span class="ls20 ws17">POWER OFF SEQUENCE<span class="_"> </span>.................................................................................................<span class="_ _14"> </span>160</span><span class="ff3"> </span></div><div class="t m0 x1 hb ybf ff2 fs1 fc0 sc0 ls2 ws2">17<span class="ff3"> <span class="_ _18"> </span></span><span class="ls4e ws3c">EXAMPLE FOR SYSTEM SLEEP IN AND OUT<span class="_ _14"> </span>...........................................................<span class="_ _f"> </span>161</span><span class="ff3"> </span></div><div class="t m0 x1 hb yc0 ff2 fs1 fc0 sc0 ls2 ws2">18<span class="ff3"> <span class="_ _18"> </span></span><span class="ls4e ws3d">SERIAL LINK DATA ORDER<span class="_ _2"></span>...........................................................................................<span class="_ _f"> </span>162<span class="_ _2"></span></span><span class="ff3"> </span></div><div class="t m0 x1 hb yc1 ff2 fs1 fc0 sc0 ls2 ws2">19<span class="ff3"> <span class="_ _18"> </span></span>PACKAGE INFORMATION<span class="_ _11"></span>..............................................................................................<span class="_ _f"> </span>165<span class="ff3"> </span></div><div class="t m0 x12 hf yc2 ff3 fs2 fc0 sc0 ls4a ws2">19.1<span class="fs1 ls2"> <span class="_ _15"> </span><span class="fs2">D<span class="fs3 ls23 ws1b">IMENSION FOR </span><span class="ls37">SSD2828QN4<span class="_ _17"> </span>.....................................................................................................................<span class="ls41">....<span class="_ _2"></span>165</span></span></span> </span></div></div><div class="pi" data-data='{"ctm":[1.611639,0.000000,0.000000,1.611639,0.000000,0.000000]}'></div></div>