RTSP服务器 （C语言）

/****************************************************************************** Some simple Hisilicon Hi35xx video input functions. Copyright (C), 2010-2011, Hisilicon Tech. Co., Ltd. ****************************************************************************** Modification: 2011-8 Created ******************************************************************************/ #ifdef __cplusplus #if __cplusplus extern "C" { #endif #endif /* End of #ifdef __cplusplus */ #include <stdio.h> #include <stdlib.h> #include <string.h> #include <sys/types.h> #include <sys/stat.h> #include <sys/ioctl.h> #include <sys/poll.h> #include <sys/time.h> #include <fcntl.h> #include <errno.h> #include <pthread.h> #include <math.h> #include <unistd.h> #include <signal.h> #include "hi_mipi.h" #include "hi_common.h" #include "sample_comm.h" VI_DEV_ATTR_S DEV_ATTR_BT656D1_1MUX = { /* interface mode */ VI_MODE_BT656, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFF000000, 0x0}, /* progessive or interleaving */ VI_SCAN_INTERLACED, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_YVYU, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_FIELD, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_VALID_SINGAL, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 0, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 0, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* ISP bypass */ VI_PATH_BYPASS, /* input data type */ VI_DATA_TYPE_YUV }; /* BT1120 1080I输入 */ VI_DEV_ATTR_S DEV_ATTR_BT1120_1080I_1MUX = { /* interface mode */ VI_MODE_BT1120_STANDARD, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFF000000, 0xFF0000}, /* progessive or interleaving */ VI_SCAN_INTERLACED, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_UVUV, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_NORM_PULSE, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 0, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 0, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* ISP bypass */ VI_PATH_BYPASS, /* input data type */ VI_DATA_TYPE_YUV, /* bReverse */ HI_FALSE, /* DEV CROP */ {0, 0, 1920, 1080} }; /* BT1120 1080p */ VI_DEV_ATTR_S DEV_ATTR_BT1120_1080P_BASE = { /* interface mode */ VI_MODE_BT1120_STANDARD, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFF000000, 0xFF0000}, /* progessive or interleaving */ VI_SCAN_PROGRESSIVE, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_UVUV, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_NORM_PULSE, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 0, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 0, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* ISP bypass */ VI_PATH_BYPASS, /* input data type */ VI_DATA_TYPE_YUV, /* bReverse */ HI_FALSE, /* DEV CROP */ {0, 0, 1920, 1080} }; /* BT1120 720P */ VI_DEV_ATTR_S DEV_ATTR_BT1120_720P_BASE = /* classical timing 3:7441 BT1120 720P@60fps*/ { /* interface mode */ VI_MODE_BT1120_STANDARD, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFF000000, 0xFF0000}, /* progessive or interleaving */ VI_SCAN_PROGRESSIVE, //VI_SCAN_INTERLACED, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_UVUV, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_NORM_PULSE, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 1280, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 720, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* ISP bypass */ VI_PATH_BYPASS, /* input data type */ VI_DATA_TYPE_YUV, /* bReverse */ HI_FALSE, /* DEV CROP */ {0, 0, 1280, 720} }; VI_DEV_ATTR_S DEV_ATTR_LVDS_BASE = { /* interface mode */ VI_MODE_LVDS, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFFF00000, 0x0}, /* progessive or interleaving */ VI_SCAN_PROGRESSIVE, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_YUYV, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_VALID_SINGAL, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 1280, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 720, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* use interior ISP */ VI_PATH_ISP, /* input data type */ VI_DATA_TYPE_RGB, /* bRever */ HI_FALSE, /* DEV CROP */ {0, 0, 1920, 1080} }; VI_DEV_ATTR_S DEV_ATTR_MIPI_BASE = { /* interface mode */ VI_MODE_MIPI, /* multiplex mode */ VI_WORK_MODE_1Multiplex, /* r_mask g_mask b_mask*/ {0xFFF00000, 0x0}, /* progessive or interleaving */ VI_SCAN_PROGRESSIVE, /*AdChnId*/ { -1, -1, -1, -1}, /*enDataSeq, only support yuv*/ VI_INPUT_DATA_YUYV, /* synchronization information */ { /*port_vsync port_vsync_neg port_hsync port_hsync_neg */ VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH, VI_VSYNC_VALID_SINGAL, VI_VSYNC_VALID_NEG_HIGH, /*hsync_hfb hsync_act hsync_hhb*/ { 0, 1280, 0, /*vsync0_vhb vsync0_act vsync0_hhb*/ 0, 720, 0, /*vsync1_vhb vsync1_act vsync1_hhb*/ 0, 0, 0 } }, /* use interior ISP */ VI_PATH_ISP, /* input data type */ VI_DATA_TYPE_RGB, /* bRever */ HI_FALSE, /* DEV CROP */ {0, 0, 1920, 1080} }; combo_dev_attr_t LVDS_4lane_SENSOR_IMX136_12BIT_1080_NOWDR_ATTR = { /* input mode */ .input_mode = INPUT_MODE_LVDS, { .lvds_attr = { .img_size = {1920, 1080}, HI_WDR_MODE_NONE, LVDS_SYNC_MODE_SAV, RAW_DATA_12BIT, LVDS_ENDIAN_BIG, LVDS_ENDIAN_BIG, .lane_id = {0, 1, 2, 3, -1, -1, -1, -1}, .sync_code = { { {0xab0, 0xb60, 0x800, 0x9d0}, {0xab0, 0xb60, 0x800, 0x9d0},