GS2972_DS

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3G/HD/SD-SDI Serializer with Complete SMPTE Audio & Video Support Operation at 2.970Gb/s, 2.970/1.001Gb/s, 1.485Gb/s,1.485/1.001Gb/s and 270Mb/s • Supports SMPTE ST 425 (Level A and Level B),SMPTE ST 424, SMPTE ST 292, SMPTE ST 259-C and DVB-ASI • Integrated Cable Driver • Integrated, low-noise VCO
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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/638f674197bc301588149cdc/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/638f674197bc301588149cdc/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">1 of 125</div><div class="t m0 x2 h2 y2 ff1 fs0 fc0 sc0 ls1 ws1"> </div><div class="t m0 x3 h2 y1 ff1 fs0 fc0 sc0 ls2 ws2">GS2972 3G/HD/SD-SDI Serializer with Complete </div><div class="t m0 x3 h2 y3 ff1 fs0 fc0 sc0 ls3 ws3">SMPTE Audio &amp; Video Support</div><div class="t m0 x3 h2 y4 ff1 fs0 fc0 sc0 ls1 ws4">Final Data Sheet<span class="_ _0"> </span>Rev. 9</div><div class="t m0 x3 h2 y5 ff1 fs0 fc0 sc0 ls4 ws5">GENDOC-047479<span class="_ _1"> </span>September 2013</div><div class="t m0 x4 h3 y6 ff2 fs1 fc0 sc0 ls5 ws6">3G/HD/SD-SDI Serializer with Comp<span class="ls6 ws7">lete SMPTE Audio <span class="ls7 ws8">&amp; Video Support</span></span></div><div class="c x5 y7 w2 h4"><div class="t m0 x6 h5 y8 ff2 fs2 fc0 sc0 ls8 ws1">GS2972</div></div><div class="t m0 x7 h6 y9 ff3 fs3 fc1 sc0 ls9 ws1">www.semtech.com</div><div class="t m0 x3 h7 ya ff2 fs4 fc0 sc0 lsa ws9">Key Features</div><div class="t m0 x3 h6 yb ff3 fs3 fc0 sc0 lsb wsa">&#8226;<span class="_ _2"> </span>Operation at 2.970Gb/s, <span class="lsc wsb">2.970/1.001Gb/s, 1.485Gb/s, </span></div><div class="t m0 x8 h6 yc ff3 fs3 fc0 sc0 lsd wsc">1.485/1.001Gb/s and 270Mb/s</div><div class="t m0 x3 h6 yd ff3 fs3 fc0 sc0 lse wsd">&#8226;<span class="_ _2"> </span>Supports SMPTE ST 425 (Level<span class="_ _3"></span> A and Level B), <span class="ff4 ls1 ws1"> </span></div><div class="t m0 x8 h6 ye ff3 fs3 fc0 sc0 lsd wsc">SMPTE ST 424, SMPTE ST 292, SMPTE ST 259-C and </div><div class="t m0 x8 h6 yf ff3 fs3 fc0 sc0 lsf ws1">DVB-ASI</div><div class="t m0 x3 h6 y10 ff3 fs3 fc0 sc0 ls10 wse">&#8226;<span class="_ _2"> </span>Integr<span class="_ _4"></span>ated Cable Driver</div><div class="t m0 x3 h6 y11 ff3 fs3 fc0 sc0 ls11 wsf">&#8226;<span class="_ _2"> </span>Integrated, low-noise VCO</div><div class="t m0 x3 h6 y12 ff3 fs3 fc0 sc0 ls12 ws10">&#8226;<span class="_ _2"> </span>Integr<span class="_ _4"></span>ated Narrow-Bandwi<span class="_ _4"></span>dth PLL</div><div class="t m0 x3 h6 y13 ff3 fs3 fc0 sc0 ls13 ws11">&#8226;<span class="_ _2"> </span>Integr<span class="_ _4"></span>ated Audio Embedder for up to 8 channels of </div><div class="t m0 x8 h6 y14 ff3 fs3 fc0 sc0 ls14 ws12">48kHz audio</div><div class="t m0 x3 h6 y15 ff3 fs3 fc0 sc0 ls15 ws13">&#8226;<span class="_ _2"> </span>Ancillary data insert<span class="_ _4"></span>ion</div><div class="t m0 x3 h6 y16 ff3 fs3 fc0 sc0 ls16 ws14">&#8226;<span class="_ _2"> </span>Optional conversion from SMPTE ST 425 Level A to </div><div class="t m0 x8 h6 y17 ff3 fs3 fc0 sc0 ls16 ws14">Level B for 1080p 50/60 4:2:2 10-bit</div><div class="t m0 x3 h6 y18 ff3 fs3 fc0 sc0 ls17 ws15">&#8226;<span class="_ _2"> </span>P<span class="_ _5"></span>arallel data bus selectable <span class="ls16 ws14">as either 20-bit or 10-bit</span></div><div class="t m0 x3 h6 y19 ff3 fs3 fc0 sc0 ls18 ws16">&#8226;<span class="_ _2"> </span>SMPTE video pr<span class="_ _4"></span>ocessing inc<span class="_ _4"></span>luding TRS calculation and </div><div class="t m0 x8 h6 y1a ff3 fs3 fc0 sc0 ls19 ws17">insertion, <span class="_ _3"></span>line number<span class="_ _3"></span> calculatio<span class="_ _3"></span>n and inse<span class="_ _3"></span>rtion, line<span class="_ _3"></span> </div><div class="t m0 x8 h6 y1b ff3 fs3 fc0 sc0 lsc wsb">based CRC calculation and <span class="ls1a ws18">insertion, illegal code </span></div><div class="t m0 x8 h6 y1c ff3 fs3 fc0 sc0 ls14 ws12">re-mapping, SMPTE ST 352 payload identifier </div><div class="t m0 x8 h6 y1d ff3 fs3 fc0 sc0 ls1b ws19">generation and in<span class="_ _3"></span>sertion</div><div class="t m0 x3 h6 y1e ff3 fs3 fc0 sc0 ls1c ws1a">&#8226;G<span class="_ _6"></span>S<span class="_ _6"></span>P<span class="_ _6"></span>I<span class="_ _6"></span> h<span class="_ _6"></span>o<span class="_ _6"></span>s<span class="_ _6"></span>t<span class="_ _6"></span> i<span class="_ _6"></span>n<span class="_ _6"></span>t<span class="_ _6"></span>e<span class="_ _6"></span>r<span class="_ _6"></span>f<span class="_ _7"></span>a<span class="_ _6"></span>c<span class="_ _6"></span>e</div><div class="t m0 x3 h6 y1f ff3 fs3 fc0 sc0 lsc wsb">&#8226;<span class="_ _2"> </span>+1.2V digital core power supply<span class="_ _5"></span>, +1.2V and +3.3V </div><div class="t m0 x8 h6 y20 ff3 fs3 fc0 sc0 ls1d ws1b">analog power supplies, a<span class="_ _4"></span>nd <span class="lsb wsa">selectable +1.8V or +3.3V </span></div><div class="t m0 x8 h6 y21 ff3 fs3 fc0 sc0 ls1e ws1c">I/O power supply</div><div class="t m0 x3 h6 y22 ff3 fs3 fc0 sc0 ls1f ws1d">&#8226;<span class="_ _0"> </span>-20&#186;C to +85&#186;C<span class="_ _4"></span> operati<span class="_ _4"></span>ng temper<span class="_ _4"></span>atur<span class="_ _4"></span>e ra<span class="_ _4"></span>nge</div><div class="t m0 x3 h6 y23 ff3 fs3 fc0 sc0 ls1d ws1e">&#8226;<span class="_ _2"> </span>Low power operation (typic<span class="_ _4"></span><span class="ls20 ws1f">ally at 400mW<span class="_ _5"></span>, including </span></div><div class="t m0 x8 h6 y24 ff3 fs3 fc0 sc0 ls21 ws20">Cable Driver)</div><div class="t m0 x3 h6 y25 ff3 fs3 fc0 sc0 lsb wsa">&#8226;<span class="_ _2"> </span>Small 11mm x 11mm 100-bal<span class="_ _3"></span>l BGA package</div><div class="t m0 x3 h6 y26 ff3 fs3 fc0 sc0 ls22 ws21">&#8226;<span class="_ _2"> </span>Pb-free and RoHS com<span class="_ _3"></span>pliant</div><div class="t m0 x9 h7 ya ff2 fs4 fc0 sc0 ls23 ws1">Applications</div><div class="c xa y27 w3 h8"><div class="t m1 x0 h9 y28 ff1 fs5 fc2 sc0 ls24 ws1">A<span class="_ _3"></span>p<span class="_ _8"></span>p<span class="_ _3"></span>lic<span class="_ _3"></span>a<span class="_ _3"></span>tio<span class="_ _8"></span>n:<span class="_ _3"></span><span class="ff5 ls1"> 1080p 50/60 Camera/Camcorder</span></div><div class="t m2 xb ha y29 ff5 fs6 fc2 sc0 ls25 ws1">ADC</div><div class="t m2 xc ha y2a ff5 fs6 fc2 sc0 ls26 ws1">Audio</div><div class="t m2 xd ha y2b ff5 fs6 fc2 sc0 ls27 ws1">Pr<span class="_ _3"></span>oc<span class="_ _3"></span>es<span class="_ _3"></span>s<span class="_ _3"></span>or</div><div class="t m2 xc ha y2c ff5 fs6 fc2 sc0 ls28 ws1">Vi<span class="_ _3"></span>deo</div><div class="t m2 xd ha y2d ff5 fs6 fc2 sc0 ls27 ws1">Pr<span class="_ _3"></span>oc<span class="_ _3"></span>es<span class="_ _3"></span>s<span class="_ _3"></span>or</div><div class="t m2 xe ha y2e ff5 fs6 fc2 sc0 ls25 ws1">CCD</div><div class="t m2 xf ha y2f ff5 fs6 fc2 sc0 ls29 ws1">20<span class="_ _8"> </span>-bi<span class="_ _3"></span>t</div><div class="t m2 x10 ha y30 ff5 fs6 fc2 sc0 ls2a ws1">GS29<span class="_ _4"></span>7<span class="_ _4"></span>2</div><div class="t m2 x11 ha y31 ff5 fs6 fc2 sc0 ls2b ws1">3G-<span class="_ _4"></span>S<span class="_ _4"></span>DI</div><div class="t m1 xf hb y32 ff5 fs7 fc2 sc0 ls1 ws1">HV<span class="_"> </span>F/PCLK</div><div class="t m1 x12 hb y33 ff5 fs7 fc2 sc0 ls1 ws1">CTRL/TIM<span class="_ _4"></span>E<span class="_ _3"> </span>C<span class="_ _3"></span>OD<span class="_ _3"></span>E</div><div class="t m2 x13 ha y34 ff5 fs6 fc2 sc0 ls1 ws1">AES - IN</div><div class="t m1 x14 hb y35 ff5 fs7 fc2 sc0 ls2c ws22">AUDI<span class="_ _4"></span>O 1<span class="_ _4"></span>/2</div><div class="t m1 x15 hb y36 ff5 fs7 fc2 sc0 ls2c ws23">AUDI<span class="_ _4"></span>O 3<span class="_ _4"></span>/<span class="_ _4"></span>4<span class="_ _9"></span><span class="ls2d ws24">Aud<span class="_ _4"></span>i<span class="_ _5"></span>o Cl<span class="_ _4"></span>o<span class="_ _4"></span>cks</span></div><div class="t m2 x16 ha y37 ff5 fs6 fc2 sc0 ls28 ws1">Stor<span class="_ _3"></span>age<span class="_ _3"></span>:</div><div class="t m2 x17 ha y38 ff5 fs6 fc2 sc0 ls29 ws25">T<span class="_ _3"></span>ape<span class="_ _8"> </span>/D<span class="_ _3"></span>i<span class="_ _8"> </span>s<span class="_ _3"></span>c<span class="_ _8"> </span>/<span class="_ _3"></span>Sol<span class="_ _3"></span>i<span class="_ _8"> </span>d Stat<span class="_ _3"></span>e</div><div class="t m2 x18 ha y39 ff5 fs6 fc2 sc0 ls2e ws1">MI<span class="_ _4"></span>C</div><div class="t m2 x19 ha y3a ff5 fs6 fc2 sc0 ls2f ws1">OPTIC<span class="_ _3"></span>S</div></div><div class="c x1a y3b w4 hc"><div class="t m3 x1b h9 y3c ff1 fs5 fc2 sc0 ls30 ws1">A<span class="_ _3"></span>p<span class="_ _8"></span>p<span class="_ _3"></span>lic<span class="_ _3"></span>a<span class="_ _3"></span>tio<span class="_ _3"></span>n<span class="_ _3"></span>:<span class="_ _3"></span><span class="ff5 ls1"> Dual Link (HD-SDI) </span></div><div class="t m3 x1b h9 y3d ff5 fs5 fc2 sc0 ls1 ws1">to Single Link (3G-SDI) Converter</div><div class="t m3 x1c ha y3e ff5 fs6 fc2 sc0 ls1 ws1">HD-SDI</div><div class="t m3 x1d ha y3f ff5 fs6 fc2 sc0 ls31 ws1">De<span class="_ _4"></span>se<span class="_ _4"></span>ria<span class="_ _4"></span>lize<span class="_ _5"></span>r</div><div class="t m3 x1d ha y40 ff5 fs6 fc2 sc0 ls1 ws1">(GS1559 or</div><div class="t m3 x1e ha y41 ff5 fs6 fc2 sc0 ls1 ws1">GS2970)</div><div class="t m3 x19 ha y42 ff5 fs6 fc2 sc0 ls32 ws26">Link<span class="_ _4"></span> A</div><div class="t m3 x1f ha y43 ff5 fs6 fc2 sc0 ls32 ws1">FIFO</div><div class="t m4 x20 hb y44 ff5 fs7 fc2 sc0 ls33 ws1">WR</div><div class="t m3 x1d ha y45 ff5 fs6 fc2 sc0 ls31 ws1">De<span class="_ _4"></span>se<span class="_ _4"></span>ria<span class="_ _4"></span>lize<span class="_ _5"></span>r</div><div class="t m3 x19 ha y46 ff5 fs6 fc2 sc0 ls32 ws26">Link<span class="_ _4"></span> B</div><div class="t m3 x1f ha y47 ff5 fs6 fc2 sc0 ls32 ws1">FIFO</div><div class="t m4 x20 hb y48 ff5 fs7 fc2 sc0 ls33 ws1">WR</div><div class="t m3 x21 ha y49 ff5 fs6 fc2 sc0 ls2a ws1">GS2972</div><div class="t m3 x22 ha y4a ff5 fs6 fc2 sc0 ls1 ws1">GS4910</div><div class="t m3 x23 ha y4b ff5 fs6 fc2 sc0 ls1 ws1">10-bit</div><div class="t m3 x24 ha y4c ff5 fs6 fc2 sc0 ls2a ws1">3G-SDI</div><div class="t m4 x25 hb y4d ff5 fs7 fc2 sc0 ls34 ws1">HVF</div><div class="t m4 x20 hb y4e ff5 fs7 fc2 sc0 ls35 ws1">XT<span class="_ _4"></span>AL</div><div class="t m4 x26 hb y4f ff5 fs7 fc2 sc0 ls1 ws1">HV<span class="_"> </span>F/PCLK</div><div class="t m4 x26 hb y50 ff5 fs7 fc2 sc0 ls1 ws1">HV<span class="_"> </span>F/PCLK</div><div class="t m4 x27 hb y51 ff5 fs7 fc2 sc0 ls1 ws1">HV<span class="_"> </span>F/PCLK</div><div class="t m3 x1d ha y52 ff5 fs6 fc2 sc0 ls1 ws1">(GS1559 or</div><div class="t m3 x1e ha y53 ff5 fs6 fc2 sc0 ls1 ws1">GS2970)</div><div class="t m3 x23 ha y54 ff5 fs6 fc2 sc0 ls1 ws1">10-bit</div><div class="t m3 x28 ha y55 ff5 fs6 fc2 sc0 ls1 ws1">10-bit</div><div class="t m3 x25 ha y56 ff5 fs6 fc2 sc0 ls1 ws1">10-bit</div><div class="t m3 x1c ha y57 ff5 fs6 fc2 sc0 ls1 ws1">HD-SDI</div><div class="t m3 x0 ha y58 ff5 fs6 fc2 sc0 ls1 ws1">HD-SDI</div><div class="t m3 x0 ha y59 ff5 fs6 fc2 sc0 ls1 ws1">HD-SDI</div><div class="t m3 x29 ha y5a ff5 fs6 fc2 sc0 ls1 ws1">EQ</div><div class="t m3 x29 ha y5b ff5 fs6 fc2 sc0 ls1 ws1">EQ</div><div class="t m5 x2a hd y5c ff5 fs8 fc2 sc0 ls1 ws1">GS2974B</div><div class="t m5 x2a hd y5d ff5 fs8 fc2 sc0 ls1 ws1">GS2974B</div></div><div class="c x2b y5e w5 he"><div class="t m1 x18 h9 y5f ff1 fs5 fc2 sc0 ls24 ws1">A<span class="_ _3"></span>p<span class="_ _8"></span>p<span class="_ _3"></span>lic<span class="_ _3"></span>a<span class="_ _3"></span>tio<span class="_ _8"></span>n:<span class="_ _3"></span><span class="ff5 ls1"> Multi-format Audio Embedder Module</span></div><div class="t m2 x0 ha y60 ff5 fs6 fc2 sc0 ls1 ws1">SD/HD/3G-SDI</div><div class="t m1 x2c hb y61 ff5 fs7 fc2 sc0 ls36 ws1">PCL<span class="_ _5"></span>K</div><div class="t m2 x2d ha y62 ff5 fs6 fc2 sc0 ls37 ws1">10<span class="_ _8"> </span>-<span class="_ _3"></span>b<span class="_ _3"></span>i<span class="_ _3"></span>t</div><div class="t m2 x25 ha y60 ff5 fs6 fc2 sc0 ls1 ws1">GS2970</div><div class="t m2 x2e ha y63 ff5 fs6 fc2 sc0 ls2a ws1">GS2972</div><div class="t m2 x2f ha y64 ff5 fs6 fc2 sc0 ls25 ws1">ADC</div><div class="t m2 xf ha y65 ff5 fs6 fc2 sc0 ls25 ws1">S<span class="_ _4"></span>witc<span class="_ _4"></span>h<span class="_ _4"></span> </div><div class="t m2 x30 ha y66 ff5 fs6 fc2 sc0 ls29 ws1">Logi<span class="_ _3"></span>c</div><div class="t m2 x12 ha y67 ff5 fs6 fc2 sc0 ls1 ws1">&amp;</div><div class="t m2 xf ha y68 ff5 fs6 fc2 sc0 ls28 ws1">Buffer<span class="_ _3"></span>s</div><div class="t m2 x31 ha y69 ff5 fs6 fc2 sc0 ls1 ws1">SD/HD/3G-SDI</div><div class="t m2 x18 ha y64 ff5 fs6 fc2 sc0 ls31 ws1">Ana<span class="_ _4"></span>l<span class="_ _4"></span>og</div><div class="t m2 x32 ha y6a ff5 fs6 fc2 sc0 ls32 ws1">Audio</div><div class="t m2 x32 ha y6b ff5 fs6 fc2 sc0 ls2f ws1">Inp<span class="_ _3"></span>u<span class="_ _3"></span>t<span class="_ _3"></span>s</div><div class="t m2 x33 ha y6c ff5 fs6 fc2 sc0 ls31 ws1">AE<span class="_ _4"></span>S</div><div class="t m2 x32 ha y6d ff5 fs6 fc2 sc0 ls32 ws1">Audio</div><div class="t m2 x32 ha y6e ff5 fs6 fc2 sc0 ls2f ws1">Inp<span class="_ _3"></span>u<span class="_ _3"></span>t<span class="_ _3"></span>s</div><div class="t m1 x2d hb y6f ff5 fs7 fc2 sc0 ls34 ws27">AUDI<span class="_ _4"></span>O 1<span class="_ _4"></span>/2</div><div class="t m1 x2d hb y70 ff5 fs7 fc2 sc0 ls34 ws27">AUDI<span class="_ _4"></span>O 3<span class="_ _4"></span>/4</div><div class="t m1 x2d hb y71 ff5 fs7 fc2 sc0 ls34 ws27">AUDI<span class="_ _4"></span>O 5<span class="_ _4"></span>/6</div><div class="t m1 x2d hb y72 ff5 fs7 fc2 sc0 ls34 ws27">AUDI<span class="_ _4"></span>O 7<span class="_ _4"></span>/8</div><div class="t m2 x34 ha y73 ff5 fs6 fc2 sc0 ls28 ws1">SR<span class="_ _3"></span>C</div><div class="t m2 x35 ha y74 ff5 fs6 fc2 sc0 ls1 ws1">GS4911</div><div class="t m6 x36 hf y75 ff5 fs9 fc2 sc0 ls38 ws1">XTA<span class="_ _4"></span>L</div><div class="t m1 x12 hb y76 ff5 fs7 fc2 sc0 ls34 ws1">HVF</div><div class="t m1 x37 hb y77 ff5 fs7 fc2 sc0 ls39 ws28">Audio C<span class="_ _3"></span>locks</div><div class="t m2 x3 ha y78 ff5 fs6 fc2 sc0 ls1 ws1">EQ</div><div class="t m5 x37 hd y79 ff5 fs8 fc2 sc0 ls3a ws1">GS2974B</div></div><a class="l" rel='nofollow' onclick='return false;'><div class="d m7"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>
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