xapp134_vhdl.zip - The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated
with Micron SDRAM models. The design is verified with timing constraints at
115 MHZ.,2008-01-11 14:51:20,下载25次
xst3_IDE.zip - Access IDE harddisk by Xilinx FPGA
Support PIO2,2008-01-11 14:47:26,下载52次
MXIC-SPIFlash-Model.zip - Verilog based simluation model for MXIC SPI Flash.,2008-01-11 14:34:51,下载168次
m25p10-copy.zip - Making a cheap 1M SPI Rom Emulator
8 second to copy from parallel to SPI
re-Program STM Serial Flash M25P10 by reading 29010 parallel ROM
Running on standard 8051 32 I/O, a TTL 7407 as bus switch.
Total programming time is about 8 seconds including Erase, Program,2008-01-11 14:28:40,下载25次