16_COMLEX ADDER.rar - Complex Numbers are denoted in the form a+ib where a is the real part and b is the imaginary part,2018-04-21 16:16:50,下载1次
HDL_equation.rar - Verilog Program to implement the function f=x+yz and Testbench for all the possible inputs using For Loop,2018-04-21 16:15:59,下载1次
4bit_moore.rar - Moore machine is state machine whose output is a function of only the current state.,2018-04-21 16:12:49,下载1次
4bit_mealy.rar - Mealy machine is a state machine whose output is determined by the current state and the current inputs.,2018-04-21 16:11:49,下载2次
ADC_SA_8bit.rar - the successive approximation part of the circuit. trial_root is loaded with value 8'b1000_0000 on the rising egde that makes count = 3'b000.,2018-04-21 16:08:47,下载2次
PWN.rar - Pulse Width modulation using Verilog HDL,2018-04-21 15:58:22,下载3次
FP_multiplier.rar - Multiplier for 32 bit with test bench using verilog HDL,2018-04-21 15:54:54,下载1次
FP_divider.rar - floating point divider for 32 bit with test bench,2018-04-21 15:54:08,下载1次
FP_adder.rar - 32 bit floating point adder with testbench,2018-04-21 15:53:11,下载1次
Fixed-Floating-Point-Adder-Multiplier-master.zip - Fixed-Floating-Point-Adder-Multiplier with test bench,2018-04-21 15:51:37,下载2次